Group : flash_ctrl_env_pkg::flash_ctrl_env_cov::std_fault_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : flash_ctrl_env_pkg::flash_ctrl_env_cov::std_fault_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
37.50 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_flash_ctrl_env_0.1/flash_ctrl_env_cov.sv



Summary for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::std_fault_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 8 5 3 37.50


Variables for Group flash_ctrl_env_pkg::flash_ctrl_env_cov::std_fault_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_arb_fsm_err 1 1 0 0.00 100 1 1 0
cp_ctrl_cnt_err 1 1 0 0.00 100 1 1 0
cp_fifo_err 1 1 0 0.00 100 1 1 0
cp_lcmgr_err 1 0 1 100.00 100 1 1 0
cp_lcmgr_intg_err 1 0 1 100.00 100 1 1 0
cp_phy_fsm_err 1 1 0 0.00 100 1 1 0
cp_prog_intg_err 1 0 1 100.00 100 1 1 0
cp_storage_err 1 1 0 0.00 100 1 1 0


Summary for Variable cp_arb_fsm_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 1 0 0.00


User Defined Bins for cp_arb_fsm_err

Uncovered bins
NAMECOUNTAT LEASTNUMBER
seen 0 1 1



Summary for Variable cp_ctrl_cnt_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 1 0 0.00


User Defined Bins for cp_ctrl_cnt_err

Uncovered bins
NAMECOUNTAT LEASTNUMBER
seen 0 1 1



Summary for Variable cp_fifo_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 1 0 0.00


User Defined Bins for cp_fifo_err

Uncovered bins
NAMECOUNTAT LEASTNUMBER
seen 0 1 1



Summary for Variable cp_lcmgr_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_lcmgr_err

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
seen 3 1 T20 1 T111 1 T112 1



Summary for Variable cp_lcmgr_intg_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_lcmgr_intg_err

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
seen 20 1 T87 1 T103 1 T104 1



Summary for Variable cp_phy_fsm_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 1 0 0.00


User Defined Bins for cp_phy_fsm_err

Uncovered bins
NAMECOUNTAT LEASTNUMBER
seen 0 1 1



Summary for Variable cp_prog_intg_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_prog_intg_err

Bins
NAMECOUNTAT LEASTTESTCOUNTTESTCOUNTTESTCOUNT
seen 15 1 T11 5 T229 5 T230 5



Summary for Variable cp_storage_err

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 1 0 0.00


User Defined Bins for cp_storage_err

Uncovered bins
NAMECOUNTAT LEASTNUMBER
seen 0 1 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%