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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.01 95.85 93.45 94.81 90.48 98.07 94.61 97.78


Total test records in report: 1094
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T829 /workspace/coverage/default/18.flash_ctrl_intr_rd.114782111 May 05 01:49:59 PM PDT 24 May 05 01:52:48 PM PDT 24 4705900400 ps
T830 /workspace/coverage/default/1.flash_ctrl_intr_rd_slow_flash.3524652784 May 05 01:47:34 PM PDT 24 May 05 01:51:05 PM PDT 24 8696990500 ps
T332 /workspace/coverage/default/31.flash_ctrl_disable.1600485659 May 05 01:51:08 PM PDT 24 May 05 01:51:30 PM PDT 24 10709500 ps
T831 /workspace/coverage/default/38.flash_ctrl_connect.23154736 May 05 01:51:32 PM PDT 24 May 05 01:51:46 PM PDT 24 21398900 ps
T832 /workspace/coverage/default/46.flash_ctrl_smoke.1213270575 May 05 01:51:56 PM PDT 24 May 05 01:54:24 PM PDT 24 177529100 ps
T361 /workspace/coverage/default/4.flash_ctrl_invalid_op.1968739533 May 05 01:48:01 PM PDT 24 May 05 01:49:27 PM PDT 24 1974341000 ps
T833 /workspace/coverage/default/25.flash_ctrl_alert_test.2505533159 May 05 01:50:45 PM PDT 24 May 05 01:50:59 PM PDT 24 106497800 ps
T834 /workspace/coverage/default/19.flash_ctrl_intr_rd_slow_flash.2934287270 May 05 01:50:08 PM PDT 24 May 05 01:53:56 PM PDT 24 30837614300 ps
T835 /workspace/coverage/default/4.flash_ctrl_mp_regions.1232617133 May 05 01:47:57 PM PDT 24 May 05 01:55:19 PM PDT 24 18471026400 ps
T836 /workspace/coverage/default/77.flash_ctrl_connect.4094398594 May 05 01:52:28 PM PDT 24 May 05 01:52:44 PM PDT 24 59731800 ps
T837 /workspace/coverage/default/31.flash_ctrl_smoke.345903937 May 05 01:51:09 PM PDT 24 May 05 01:52:50 PM PDT 24 80162800 ps
T838 /workspace/coverage/default/13.flash_ctrl_phy_arb.2303645150 May 05 01:49:13 PM PDT 24 May 05 01:56:17 PM PDT 24 3453459300 ps
T839 /workspace/coverage/default/17.flash_ctrl_intr_rd_slow_flash.3165182916 May 05 01:49:53 PM PDT 24 May 05 01:53:43 PM PDT 24 30603719900 ps
T840 /workspace/coverage/default/5.flash_ctrl_rand_ops.3229948856 May 05 01:48:03 PM PDT 24 May 05 01:52:14 PM PDT 24 94345500 ps
T841 /workspace/coverage/default/21.flash_ctrl_connect.1370038690 May 05 01:50:24 PM PDT 24 May 05 01:50:41 PM PDT 24 28833900 ps
T842 /workspace/coverage/default/8.flash_ctrl_re_evict.2028794608 May 05 01:48:41 PM PDT 24 May 05 01:49:14 PM PDT 24 94964200 ps
T843 /workspace/coverage/default/3.flash_ctrl_phy_ack_consistency.3244989636 May 05 01:47:55 PM PDT 24 May 05 01:48:12 PM PDT 24 75166800 ps
T844 /workspace/coverage/default/12.flash_ctrl_hw_read_seed_err.952798545 May 05 01:49:16 PM PDT 24 May 05 01:49:30 PM PDT 24 46284000 ps
T845 /workspace/coverage/default/6.flash_ctrl_re_evict.2725596041 May 05 01:48:20 PM PDT 24 May 05 01:48:51 PM PDT 24 153874100 ps
T846 /workspace/coverage/default/7.flash_ctrl_alert_test.2866777694 May 05 01:48:33 PM PDT 24 May 05 01:48:48 PM PDT 24 177161000 ps
T847 /workspace/coverage/default/7.flash_ctrl_lcmgr_intg.2531962626 May 05 01:48:34 PM PDT 24 May 05 01:48:47 PM PDT 24 26764400 ps
T354 /workspace/coverage/default/30.flash_ctrl_sec_info_access.2214770138 May 05 01:51:04 PM PDT 24 May 05 01:52:07 PM PDT 24 2109224600 ps
T848 /workspace/coverage/default/30.flash_ctrl_connect.2507949798 May 05 01:51:02 PM PDT 24 May 05 01:51:18 PM PDT 24 14139900 ps
T849 /workspace/coverage/default/66.flash_ctrl_otp_reset.2747877551 May 05 01:52:19 PM PDT 24 May 05 01:54:28 PM PDT 24 35491700 ps
T850 /workspace/coverage/default/0.flash_ctrl_mp_regions.1385126161 May 05 01:47:20 PM PDT 24 May 05 01:50:41 PM PDT 24 5152812200 ps
T851 /workspace/coverage/default/48.flash_ctrl_connect.210831286 May 05 01:52:01 PM PDT 24 May 05 01:52:17 PM PDT 24 25997500 ps
T852 /workspace/coverage/default/3.flash_ctrl_read_word_sweep_serr.3837166831 May 05 01:47:48 PM PDT 24 May 05 01:48:11 PM PDT 24 23654900 ps
T853 /workspace/coverage/default/17.flash_ctrl_lcmgr_intg.1768674007 May 05 01:49:53 PM PDT 24 May 05 01:50:07 PM PDT 24 15739300 ps
T854 /workspace/coverage/default/60.flash_ctrl_otp_reset.1015127075 May 05 01:52:18 PM PDT 24 May 05 01:54:28 PM PDT 24 71501200 ps
T855 /workspace/coverage/default/73.flash_ctrl_connect.1987901615 May 05 01:52:21 PM PDT 24 May 05 01:52:37 PM PDT 24 49036500 ps
T856 /workspace/coverage/default/61.flash_ctrl_otp_reset.1771359902 May 05 01:52:19 PM PDT 24 May 05 01:54:30 PM PDT 24 37210800 ps
T857 /workspace/coverage/default/59.flash_ctrl_connect.529559437 May 05 01:52:08 PM PDT 24 May 05 01:52:22 PM PDT 24 16428500 ps
T858 /workspace/coverage/default/15.flash_ctrl_hw_sec_otp.2045168289 May 05 01:49:23 PM PDT 24 May 05 01:50:56 PM PDT 24 4334817800 ps
T859 /workspace/coverage/default/1.flash_ctrl_ro_derr.440272540 May 05 01:47:28 PM PDT 24 May 05 01:49:47 PM PDT 24 815263700 ps
T860 /workspace/coverage/default/7.flash_ctrl_connect.3005658286 May 05 01:48:36 PM PDT 24 May 05 01:48:52 PM PDT 24 23745700 ps
T861 /workspace/coverage/default/9.flash_ctrl_wo.4256046368 May 05 01:48:43 PM PDT 24 May 05 01:52:05 PM PDT 24 4658001400 ps
T862 /workspace/coverage/default/0.flash_ctrl_erase_suspend.3110959764 May 05 01:47:26 PM PDT 24 May 05 01:53:17 PM PDT 24 2791195400 ps
T863 /workspace/coverage/default/3.flash_ctrl_alert_test.3183893677 May 05 01:47:57 PM PDT 24 May 05 01:48:11 PM PDT 24 36038400 ps
T864 /workspace/coverage/default/17.flash_ctrl_connect.1214852008 May 05 01:49:53 PM PDT 24 May 05 01:50:09 PM PDT 24 57413000 ps
T865 /workspace/coverage/default/25.flash_ctrl_smoke.1980381322 May 05 01:50:38 PM PDT 24 May 05 01:52:38 PM PDT 24 36674400 ps
T866 /workspace/coverage/default/3.flash_ctrl_sw_op.3232440773 May 05 01:47:46 PM PDT 24 May 05 01:48:13 PM PDT 24 22594500 ps
T867 /workspace/coverage/default/16.flash_ctrl_intr_rd_slow_flash.1050773528 May 05 01:49:40 PM PDT 24 May 05 01:53:01 PM PDT 24 18994315000 ps
T868 /workspace/coverage/default/28.flash_ctrl_disable.3221033739 May 05 01:50:57 PM PDT 24 May 05 01:51:19 PM PDT 24 12754100 ps
T869 /workspace/coverage/default/10.flash_ctrl_hw_read_seed_err.2224325996 May 05 01:49:07 PM PDT 24 May 05 01:49:21 PM PDT 24 46451700 ps
T870 /workspace/coverage/default/11.flash_ctrl_hw_prog_rma_wipe_err.3175360827 May 05 01:48:59 PM PDT 24 May 05 01:50:04 PM PDT 24 10035211600 ps
T871 /workspace/coverage/default/31.flash_ctrl_rw_evict_all_en.988917205 May 05 01:51:11 PM PDT 24 May 05 01:51:43 PM PDT 24 33441700 ps
T872 /workspace/coverage/default/22.flash_ctrl_otp_reset.3326241594 May 05 01:50:23 PM PDT 24 May 05 01:52:33 PM PDT 24 132409500 ps
T873 /workspace/coverage/default/2.flash_ctrl_alert_test.3248808540 May 05 01:47:45 PM PDT 24 May 05 01:48:00 PM PDT 24 114112800 ps
T874 /workspace/coverage/default/16.flash_ctrl_hw_sec_otp.4007172831 May 05 01:49:39 PM PDT 24 May 05 01:50:47 PM PDT 24 2164813700 ps
T875 /workspace/coverage/default/3.flash_ctrl_intr_rd_slow_flash.930738776 May 05 01:47:46 PM PDT 24 May 05 01:51:37 PM PDT 24 8946685800 ps
T876 /workspace/coverage/default/3.flash_ctrl_full_mem_access.3165535571 May 05 01:47:43 PM PDT 24 May 05 02:33:40 PM PDT 24 372418534700 ps
T877 /workspace/coverage/default/39.flash_ctrl_intr_rd_slow_flash.701672878 May 05 01:51:36 PM PDT 24 May 05 01:55:32 PM PDT 24 8936272700 ps
T356 /workspace/coverage/default/31.flash_ctrl_sec_info_access.3294039946 May 05 01:51:08 PM PDT 24 May 05 01:52:12 PM PDT 24 1149933000 ps
T333 /workspace/coverage/default/44.flash_ctrl_disable.2758496065 May 05 01:51:52 PM PDT 24 May 05 01:52:13 PM PDT 24 20477200 ps
T878 /workspace/coverage/default/23.flash_ctrl_rw_evict_all_en.871863704 May 05 01:50:35 PM PDT 24 May 05 01:51:07 PM PDT 24 102423400 ps
T879 /workspace/coverage/default/5.flash_ctrl_hw_prog_rma_wipe_err.3772305983 May 05 01:48:11 PM PDT 24 May 05 01:49:05 PM PDT 24 10037458800 ps
T880 /workspace/coverage/default/30.flash_ctrl_smoke.1292599946 May 05 01:51:04 PM PDT 24 May 05 01:52:18 PM PDT 24 85357500 ps
T881 /workspace/coverage/default/14.flash_ctrl_hw_prog_rma_wipe_err.560091689 May 05 01:49:26 PM PDT 24 May 05 01:50:43 PM PDT 24 10021520900 ps
T882 /workspace/coverage/default/16.flash_ctrl_disable.4211180347 May 05 01:49:44 PM PDT 24 May 05 01:50:07 PM PDT 24 25008600 ps
T883 /workspace/coverage/default/5.flash_ctrl_smoke.4074812919 May 05 01:48:06 PM PDT 24 May 05 01:49:23 PM PDT 24 43376000 ps
T884 /workspace/coverage/default/12.flash_ctrl_rand_ops.951683861 May 05 01:48:58 PM PDT 24 May 05 01:52:42 PM PDT 24 67764400 ps
T885 /workspace/coverage/default/18.flash_ctrl_phy_arb.3442914280 May 05 01:50:02 PM PDT 24 May 05 01:56:45 PM PDT 24 1423666300 ps
T886 /workspace/coverage/default/9.flash_ctrl_otp_reset.3017564043 May 05 01:48:38 PM PDT 24 May 05 01:50:29 PM PDT 24 39739100 ps
T887 /workspace/coverage/default/47.flash_ctrl_smoke.1977138715 May 05 01:51:55 PM PDT 24 May 05 01:54:00 PM PDT 24 42686200 ps
T888 /workspace/coverage/default/9.flash_ctrl_error_mp.2071751140 May 05 01:48:41 PM PDT 24 May 05 02:25:29 PM PDT 24 3397428100 ps
T889 /workspace/coverage/default/45.flash_ctrl_connect.1265909298 May 05 01:51:51 PM PDT 24 May 05 01:52:08 PM PDT 24 61828900 ps
T245 /workspace/coverage/default/44.flash_ctrl_hw_sec_otp.368448705 May 05 01:51:46 PM PDT 24 May 05 01:54:17 PM PDT 24 7608421600 ps
T890 /workspace/coverage/default/44.flash_ctrl_smoke.1802246308 May 05 01:51:45 PM PDT 24 May 05 01:53:23 PM PDT 24 46842300 ps
T891 /workspace/coverage/default/4.flash_ctrl_lcmgr_intg.1167372955 May 05 01:48:06 PM PDT 24 May 05 01:48:19 PM PDT 24 101602600 ps
T892 /workspace/coverage/default/78.flash_ctrl_otp_reset.3746725708 May 05 01:52:27 PM PDT 24 May 05 01:54:16 PM PDT 24 142739300 ps
T893 /workspace/coverage/default/63.flash_ctrl_connect.3274371267 May 05 01:52:15 PM PDT 24 May 05 01:52:28 PM PDT 24 15195600 ps
T894 /workspace/coverage/default/39.flash_ctrl_smoke.3123106541 May 05 01:51:35 PM PDT 24 May 05 01:54:01 PM PDT 24 43442700 ps
T895 /workspace/coverage/default/38.flash_ctrl_hw_sec_otp.1742861940 May 05 01:51:31 PM PDT 24 May 05 01:53:16 PM PDT 24 2676573000 ps
T896 /workspace/coverage/default/33.flash_ctrl_sec_info_access.1010797035 May 05 01:51:18 PM PDT 24 May 05 01:52:31 PM PDT 24 6340901500 ps
T897 /workspace/coverage/default/5.flash_ctrl_rw.2395806993 May 05 01:48:06 PM PDT 24 May 05 01:57:48 PM PDT 24 4798896800 ps
T898 /workspace/coverage/default/4.flash_ctrl_config_regwen.2836521716 May 05 01:48:07 PM PDT 24 May 05 01:48:21 PM PDT 24 24666100 ps
T347 /workspace/coverage/default/27.flash_ctrl_sec_info_access.3698373103 May 05 01:50:53 PM PDT 24 May 05 01:51:53 PM PDT 24 910538900 ps
T899 /workspace/coverage/default/41.flash_ctrl_alert_test.1759849312 May 05 01:51:42 PM PDT 24 May 05 01:51:56 PM PDT 24 50325700 ps
T900 /workspace/coverage/default/43.flash_ctrl_hw_sec_otp.3312798269 May 05 01:51:46 PM PDT 24 May 05 01:53:57 PM PDT 24 4417538900 ps
T901 /workspace/coverage/default/2.flash_ctrl_connect.4036543827 May 05 01:47:46 PM PDT 24 May 05 01:48:02 PM PDT 24 24459600 ps
T902 /workspace/coverage/default/5.flash_ctrl_error_mp.3697962562 May 05 01:48:05 PM PDT 24 May 05 02:25:04 PM PDT 24 16099334100 ps
T903 /workspace/coverage/default/3.flash_ctrl_rand_ops.689727351 May 05 01:47:44 PM PDT 24 May 05 01:58:52 PM PDT 24 151479900 ps
T904 /workspace/coverage/default/39.flash_ctrl_connect.3603911812 May 05 01:51:35 PM PDT 24 May 05 01:51:49 PM PDT 24 15246500 ps
T348 /workspace/coverage/default/40.flash_ctrl_sec_info_access.2235520257 May 05 01:51:41 PM PDT 24 May 05 01:52:55 PM PDT 24 4182823400 ps
T905 /workspace/coverage/default/3.flash_ctrl_hw_read_seed_err.178603042 May 05 01:47:55 PM PDT 24 May 05 01:48:09 PM PDT 24 72970400 ps
T906 /workspace/coverage/default/8.flash_ctrl_hw_read_seed_err.364175018 May 05 01:48:40 PM PDT 24 May 05 01:48:54 PM PDT 24 48976100 ps
T907 /workspace/coverage/default/12.flash_ctrl_wo.3387303002 May 05 01:49:03 PM PDT 24 May 05 01:50:49 PM PDT 24 14744400800 ps
T908 /workspace/coverage/default/2.flash_ctrl_lcmgr_intg.4198913384 May 05 01:47:43 PM PDT 24 May 05 01:47:57 PM PDT 24 25996400 ps
T312 /workspace/coverage/default/10.flash_ctrl_re_evict.1184633189 May 05 01:48:50 PM PDT 24 May 05 01:49:26 PM PDT 24 89928500 ps
T909 /workspace/coverage/default/17.flash_ctrl_ro.2302721532 May 05 01:49:47 PM PDT 24 May 05 01:52:08 PM PDT 24 2861028100 ps
T910 /workspace/coverage/default/1.flash_ctrl_hw_rma.91800782 May 05 01:47:28 PM PDT 24 May 05 02:17:56 PM PDT 24 169354666400 ps
T911 /workspace/coverage/default/7.flash_ctrl_ro.2953572740 May 05 01:48:23 PM PDT 24 May 05 01:50:16 PM PDT 24 895034600 ps
T912 /workspace/coverage/default/17.flash_ctrl_smoke.3860239110 May 05 01:49:47 PM PDT 24 May 05 01:51:02 PM PDT 24 45176900 ps
T913 /workspace/coverage/default/78.flash_ctrl_connect.2741440721 May 05 01:52:26 PM PDT 24 May 05 01:52:40 PM PDT 24 15282300 ps
T914 /workspace/coverage/default/0.flash_ctrl_otp_reset.3284178051 May 05 01:47:26 PM PDT 24 May 05 01:49:18 PM PDT 24 293525400 ps
T915 /workspace/coverage/default/29.flash_ctrl_connect.3565427082 May 05 01:51:03 PM PDT 24 May 05 01:51:19 PM PDT 24 40968700 ps
T183 /workspace/coverage/default/4.flash_ctrl_host_ctrl_arb.981283241 May 05 01:47:53 PM PDT 24 May 05 02:22:51 PM PDT 24 348185093100 ps
T336 /workspace/coverage/default/47.flash_ctrl_disable.1827147388 May 05 01:51:56 PM PDT 24 May 05 01:52:19 PM PDT 24 61833000 ps
T916 /workspace/coverage/default/10.flash_ctrl_rand_ops.1655293348 May 05 01:48:49 PM PDT 24 May 05 02:01:46 PM PDT 24 1373989300 ps
T917 /workspace/coverage/default/0.flash_ctrl_intr_rd_slow_flash.1873964962 May 05 01:47:27 PM PDT 24 May 05 01:50:34 PM PDT 24 8311373300 ps
T918 /workspace/coverage/default/35.flash_ctrl_otp_reset.2145214825 May 05 01:51:25 PM PDT 24 May 05 01:53:42 PM PDT 24 76158000 ps
T919 /workspace/coverage/default/6.flash_ctrl_intr_rd_slow_flash.3656710126 May 05 01:48:24 PM PDT 24 May 05 01:51:38 PM PDT 24 35357838000 ps
T920 /workspace/coverage/default/74.flash_ctrl_otp_reset.3993785532 May 05 01:52:24 PM PDT 24 May 05 01:54:20 PM PDT 24 162976700 ps
T921 /workspace/coverage/default/0.flash_ctrl_rd_intg.3177873892 May 05 01:47:29 PM PDT 24 May 05 01:47:59 PM PDT 24 63569800 ps
T922 /workspace/coverage/default/56.flash_ctrl_otp_reset.301655062 May 05 01:52:21 PM PDT 24 May 05 01:54:34 PM PDT 24 41521400 ps
T923 /workspace/coverage/default/37.flash_ctrl_alert_test.204081537 May 05 01:51:32 PM PDT 24 May 05 01:51:46 PM PDT 24 48470300 ps
T924 /workspace/coverage/default/3.flash_ctrl_erase_suspend.3022315795 May 05 01:47:47 PM PDT 24 May 05 01:53:37 PM PDT 24 2900264100 ps
T925 /workspace/coverage/default/53.flash_ctrl_connect.1201155047 May 05 01:52:05 PM PDT 24 May 05 01:52:21 PM PDT 24 50600100 ps
T926 /workspace/coverage/default/0.flash_ctrl_hw_rma.1840704891 May 05 01:47:27 PM PDT 24 May 05 02:22:09 PM PDT 24 340358507800 ps
T927 /workspace/coverage/default/17.flash_ctrl_re_evict.1287292968 May 05 01:49:53 PM PDT 24 May 05 01:50:28 PM PDT 24 112359600 ps
T928 /workspace/coverage/default/6.flash_ctrl_alert_test.2669723047 May 05 01:48:17 PM PDT 24 May 05 01:48:31 PM PDT 24 112316900 ps
T929 /workspace/coverage/default/79.flash_ctrl_connect.2836664948 May 05 01:52:24 PM PDT 24 May 05 01:52:40 PM PDT 24 27857700 ps
T930 /workspace/coverage/default/6.flash_ctrl_smoke.2252625906 May 05 01:48:08 PM PDT 24 May 05 01:49:48 PM PDT 24 116988200 ps
T931 /workspace/coverage/default/5.flash_ctrl_connect.1906742730 May 05 01:48:14 PM PDT 24 May 05 01:48:28 PM PDT 24 25496300 ps
T932 /workspace/coverage/default/35.flash_ctrl_intr_rd.3212983407 May 05 01:51:23 PM PDT 24 May 05 01:54:47 PM PDT 24 2055067200 ps
T334 /workspace/coverage/default/10.flash_ctrl_disable.845893173 May 05 01:48:53 PM PDT 24 May 05 01:49:14 PM PDT 24 36374300 ps
T933 /workspace/coverage/default/15.flash_ctrl_alert_test.789430565 May 05 01:49:38 PM PDT 24 May 05 01:49:52 PM PDT 24 21021100 ps
T934 /workspace/coverage/default/37.flash_ctrl_sec_info_access.2156201398 May 05 01:51:33 PM PDT 24 May 05 01:52:35 PM PDT 24 1273967400 ps
T935 /workspace/coverage/default/41.flash_ctrl_hw_sec_otp.683577230 May 05 01:51:42 PM PDT 24 May 05 01:52:30 PM PDT 24 1241943900 ps
T936 /workspace/coverage/default/51.flash_ctrl_otp_reset.119893054 May 05 01:52:07 PM PDT 24 May 05 01:54:19 PM PDT 24 148289000 ps
T197 /workspace/coverage/default/2.flash_ctrl_phy_arb_redun.1791136437 May 05 01:47:45 PM PDT 24 May 05 01:48:10 PM PDT 24 895846600 ps
T937 /workspace/coverage/default/18.flash_ctrl_rw.2114536342 May 05 01:50:00 PM PDT 24 May 05 01:59:05 PM PDT 24 3446499300 ps
T938 /workspace/coverage/default/10.flash_ctrl_alert_test.2925269215 May 05 01:48:53 PM PDT 24 May 05 01:49:07 PM PDT 24 47140500 ps
T939 /workspace/coverage/default/47.flash_ctrl_alert_test.1090922075 May 05 01:52:00 PM PDT 24 May 05 01:52:14 PM PDT 24 171292900 ps
T940 /workspace/coverage/default/0.flash_ctrl_invalid_op.647530664 May 05 01:47:39 PM PDT 24 May 05 01:48:52 PM PDT 24 1990752300 ps
T941 /workspace/coverage/default/11.flash_ctrl_hw_sec_otp.4114142832 May 05 01:48:55 PM PDT 24 May 05 01:51:17 PM PDT 24 10095619300 ps
T942 /workspace/coverage/default/8.flash_ctrl_intr_rd_slow_flash.2032612968 May 05 01:48:32 PM PDT 24 May 05 01:52:11 PM PDT 24 9180634700 ps
T943 /workspace/coverage/default/7.flash_ctrl_fetch_code.311558060 May 05 01:48:24 PM PDT 24 May 05 01:48:47 PM PDT 24 183363000 ps
T944 /workspace/coverage/default/48.flash_ctrl_alert_test.859292638 May 05 01:52:00 PM PDT 24 May 05 01:52:15 PM PDT 24 365321300 ps
T62 /workspace/coverage/cover_reg_top/13.flash_ctrl_csr_rw.1299483529 May 05 02:45:03 PM PDT 24 May 05 02:45:21 PM PDT 24 144598100 ps
T216 /workspace/coverage/cover_reg_top/3.flash_ctrl_mem_partial_access.1778850412 May 05 02:44:49 PM PDT 24 May 05 02:45:03 PM PDT 24 58989300 ps
T945 /workspace/coverage/cover_reg_top/3.flash_ctrl_mem_walk.3233815433 May 05 02:44:49 PM PDT 24 May 05 02:45:03 PM PDT 24 15586000 ps
T256 /workspace/coverage/cover_reg_top/41.flash_ctrl_intr_test.2677657719 May 05 02:45:29 PM PDT 24 May 05 02:45:43 PM PDT 24 19997200 ps
T946 /workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors.1141437382 May 05 02:44:48 PM PDT 24 May 05 02:45:05 PM PDT 24 51302300 ps
T63 /workspace/coverage/cover_reg_top/19.flash_ctrl_tl_intg_err.2647595552 May 05 02:45:12 PM PDT 24 May 05 02:57:45 PM PDT 24 951683600 ps
T132 /workspace/coverage/cover_reg_top/4.flash_ctrl_same_csr_outstanding.2075127433 May 05 02:44:52 PM PDT 24 May 05 02:45:10 PM PDT 24 133965400 ps
T221 /workspace/coverage/cover_reg_top/18.flash_ctrl_same_csr_outstanding.2672900556 May 05 02:45:11 PM PDT 24 May 05 02:45:43 PM PDT 24 879776000 ps
T257 /workspace/coverage/cover_reg_top/27.flash_ctrl_intr_test.315326068 May 05 02:45:23 PM PDT 24 May 05 02:45:37 PM PDT 24 17011600 ps
T258 /workspace/coverage/cover_reg_top/40.flash_ctrl_intr_test.4014820863 May 05 02:45:29 PM PDT 24 May 05 02:45:43 PM PDT 24 53566900 ps
T64 /workspace/coverage/cover_reg_top/18.flash_ctrl_tl_errors.3323741265 May 05 02:45:09 PM PDT 24 May 05 02:45:28 PM PDT 24 47212800 ps
T296 /workspace/coverage/cover_reg_top/1.flash_ctrl_intr_test.1333671450 May 05 02:44:39 PM PDT 24 May 05 02:44:53 PM PDT 24 46402600 ps
T947 /workspace/coverage/cover_reg_top/4.flash_ctrl_shadow_reg_errors_with_csr_rw.3502180499 May 05 02:44:57 PM PDT 24 May 05 02:45:13 PM PDT 24 19800700 ps
T297 /workspace/coverage/cover_reg_top/13.flash_ctrl_intr_test.2813328080 May 05 02:45:02 PM PDT 24 May 05 02:45:16 PM PDT 24 52535200 ps
T298 /workspace/coverage/cover_reg_top/29.flash_ctrl_intr_test.2318441991 May 05 02:45:24 PM PDT 24 May 05 02:45:38 PM PDT 24 28156800 ps
T948 /workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors.229654666 May 05 02:44:59 PM PDT 24 May 05 02:45:15 PM PDT 24 12756700 ps
T299 /workspace/coverage/cover_reg_top/32.flash_ctrl_intr_test.4054518255 May 05 02:45:25 PM PDT 24 May 05 02:45:39 PM PDT 24 26729700 ps
T68 /workspace/coverage/cover_reg_top/3.flash_ctrl_csr_aliasing.465840130 May 05 02:44:50 PM PDT 24 May 05 02:45:43 PM PDT 24 461052400 ps
T222 /workspace/coverage/cover_reg_top/16.flash_ctrl_csr_rw.1951615687 May 05 02:45:08 PM PDT 24 May 05 02:45:25 PM PDT 24 91963200 ps
T67 /workspace/coverage/cover_reg_top/5.flash_ctrl_tl_errors.810263052 May 05 02:44:53 PM PDT 24 May 05 02:45:12 PM PDT 24 73804100 ps
T223 /workspace/coverage/cover_reg_top/12.flash_ctrl_csr_rw.2033877124 May 05 02:45:03 PM PDT 24 May 05 02:45:21 PM PDT 24 229004100 ps
T949 /workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors_with_csr_rw.2391437967 May 05 02:44:56 PM PDT 24 May 05 02:45:12 PM PDT 24 25692100 ps
T950 /workspace/coverage/cover_reg_top/7.flash_ctrl_shadow_reg_errors.1054597654 May 05 02:44:53 PM PDT 24 May 05 02:45:07 PM PDT 24 13446700 ps
T951 /workspace/coverage/cover_reg_top/3.flash_ctrl_intr_test.3326209878 May 05 02:44:49 PM PDT 24 May 05 02:45:03 PM PDT 24 77503900 ps
T200 /workspace/coverage/cover_reg_top/1.flash_ctrl_csr_hw_reset.1459492089 May 05 02:44:41 PM PDT 24 May 05 02:45:21 PM PDT 24 190163000 ps
T224 /workspace/coverage/cover_reg_top/1.flash_ctrl_same_csr_outstanding.4205527187 May 05 02:44:42 PM PDT 24 May 05 02:45:03 PM PDT 24 247191600 ps
T952 /workspace/coverage/cover_reg_top/17.flash_ctrl_shadow_reg_errors.478570811 May 05 02:45:07 PM PDT 24 May 05 02:45:21 PM PDT 24 35827000 ps
T225 /workspace/coverage/cover_reg_top/19.flash_ctrl_csr_rw.2890129180 May 05 02:45:13 PM PDT 24 May 05 02:45:28 PM PDT 24 162543500 ps
T953 /workspace/coverage/cover_reg_top/4.flash_ctrl_mem_walk.3272357265 May 05 02:44:53 PM PDT 24 May 05 02:45:07 PM PDT 24 21467900 ps
T65 /workspace/coverage/cover_reg_top/6.flash_ctrl_csr_mem_rw_with_rand_reset.2378775264 May 05 02:44:53 PM PDT 24 May 05 02:45:11 PM PDT 24 49121300 ps
T954 /workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors_with_csr_rw.495227404 May 05 02:44:56 PM PDT 24 May 05 02:45:12 PM PDT 24 132758600 ps
T955 /workspace/coverage/cover_reg_top/15.flash_ctrl_intr_test.128866460 May 05 02:45:07 PM PDT 24 May 05 02:45:21 PM PDT 24 81597400 ps
T956 /workspace/coverage/cover_reg_top/18.flash_ctrl_shadow_reg_errors_with_csr_rw.2777354454 May 05 02:45:10 PM PDT 24 May 05 02:45:27 PM PDT 24 44769500 ps
T201 /workspace/coverage/cover_reg_top/9.flash_ctrl_csr_rw.1474035501 May 05 02:44:56 PM PDT 24 May 05 02:45:13 PM PDT 24 87598200 ps
T66 /workspace/coverage/cover_reg_top/8.flash_ctrl_csr_mem_rw_with_rand_reset.632887405 May 05 02:44:58 PM PDT 24 May 05 02:45:19 PM PDT 24 93523500 ps
T208 /workspace/coverage/cover_reg_top/10.flash_ctrl_csr_mem_rw_with_rand_reset.2234627465 May 05 02:45:03 PM PDT 24 May 05 02:45:20 PM PDT 24 393015600 ps
T957 /workspace/coverage/cover_reg_top/15.flash_ctrl_same_csr_outstanding.2450274979 May 05 02:45:06 PM PDT 24 May 05 02:45:42 PM PDT 24 1421372300 ps
T958 /workspace/coverage/cover_reg_top/35.flash_ctrl_intr_test.186388215 May 05 02:45:25 PM PDT 24 May 05 02:45:38 PM PDT 24 48669700 ps
T959 /workspace/coverage/cover_reg_top/9.flash_ctrl_shadow_reg_errors_with_csr_rw.3770340101 May 05 02:44:56 PM PDT 24 May 05 02:45:12 PM PDT 24 12461600 ps
T209 /workspace/coverage/cover_reg_top/19.flash_ctrl_csr_mem_rw_with_rand_reset.4101820624 May 05 02:45:16 PM PDT 24 May 05 02:45:36 PM PDT 24 95448000 ps
T960 /workspace/coverage/cover_reg_top/31.flash_ctrl_intr_test.1148233340 May 05 02:45:26 PM PDT 24 May 05 02:45:40 PM PDT 24 15097200 ps
T210 /workspace/coverage/cover_reg_top/12.flash_ctrl_tl_errors.432190313 May 05 02:45:03 PM PDT 24 May 05 02:45:19 PM PDT 24 122168800 ps
T211 /workspace/coverage/cover_reg_top/15.flash_ctrl_csr_mem_rw_with_rand_reset.60976875 May 05 02:45:10 PM PDT 24 May 05 02:45:29 PM PDT 24 162657700 ps
T961 /workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors_with_csr_rw.1749709981 May 05 02:44:40 PM PDT 24 May 05 02:44:54 PM PDT 24 24821700 ps
T212 /workspace/coverage/cover_reg_top/17.flash_ctrl_tl_errors.349890104 May 05 02:45:10 PM PDT 24 May 05 02:45:30 PM PDT 24 460215200 ps
T213 /workspace/coverage/cover_reg_top/9.flash_ctrl_csr_mem_rw_with_rand_reset.559512242 May 05 02:44:57 PM PDT 24 May 05 02:45:15 PM PDT 24 200803300 ps
T962 /workspace/coverage/cover_reg_top/17.flash_ctrl_intr_test.2761552431 May 05 02:45:11 PM PDT 24 May 05 02:45:25 PM PDT 24 53755400 ps
T331 /workspace/coverage/cover_reg_top/4.flash_ctrl_csr_rw.3429228660 May 05 02:44:53 PM PDT 24 May 05 02:45:10 PM PDT 24 58580800 ps
T963 /workspace/coverage/cover_reg_top/30.flash_ctrl_intr_test.4054365049 May 05 02:45:25 PM PDT 24 May 05 02:45:39 PM PDT 24 27234000 ps
T330 /workspace/coverage/cover_reg_top/15.flash_ctrl_csr_rw.2495032569 May 05 02:45:08 PM PDT 24 May 05 02:45:24 PM PDT 24 101973300 ps
T964 /workspace/coverage/cover_reg_top/44.flash_ctrl_intr_test.1068908363 May 05 02:45:30 PM PDT 24 May 05 02:45:45 PM PDT 24 111936000 ps
T965 /workspace/coverage/cover_reg_top/2.flash_ctrl_shadow_reg_errors.760253065 May 05 02:44:41 PM PDT 24 May 05 02:44:58 PM PDT 24 31775500 ps
T248 /workspace/coverage/cover_reg_top/17.flash_ctrl_csr_mem_rw_with_rand_reset.894997867 May 05 02:45:07 PM PDT 24 May 05 02:45:27 PM PDT 24 41502500 ps
T966 /workspace/coverage/cover_reg_top/16.flash_ctrl_shadow_reg_errors_with_csr_rw.796278281 May 05 02:45:08 PM PDT 24 May 05 02:45:24 PM PDT 24 20287000 ps
T231 /workspace/coverage/cover_reg_top/5.flash_ctrl_tl_intg_err.619698218 May 05 02:44:54 PM PDT 24 May 05 02:59:50 PM PDT 24 791042700 ps
T967 /workspace/coverage/cover_reg_top/9.flash_ctrl_intr_test.1609398446 May 05 02:44:58 PM PDT 24 May 05 02:45:13 PM PDT 24 24260700 ps
T968 /workspace/coverage/cover_reg_top/49.flash_ctrl_intr_test.3015590691 May 05 02:45:30 PM PDT 24 May 05 02:45:44 PM PDT 24 27643400 ps
T969 /workspace/coverage/cover_reg_top/22.flash_ctrl_intr_test.2483328456 May 05 02:45:19 PM PDT 24 May 05 02:45:33 PM PDT 24 20059200 ps
T970 /workspace/coverage/cover_reg_top/25.flash_ctrl_intr_test.417303821 May 05 02:45:19 PM PDT 24 May 05 02:45:33 PM PDT 24 16361200 ps
T260 /workspace/coverage/cover_reg_top/4.flash_ctrl_tl_errors.3102437765 May 05 02:44:48 PM PDT 24 May 05 02:45:05 PM PDT 24 111329100 ps
T971 /workspace/coverage/cover_reg_top/11.flash_ctrl_csr_mem_rw_with_rand_reset.2253364144 May 05 02:44:59 PM PDT 24 May 05 02:45:17 PM PDT 24 235706900 ps
T972 /workspace/coverage/cover_reg_top/37.flash_ctrl_intr_test.2986074055 May 05 02:45:29 PM PDT 24 May 05 02:45:43 PM PDT 24 54952000 ps
T252 /workspace/coverage/cover_reg_top/8.flash_ctrl_tl_errors.4177068492 May 05 02:45:00 PM PDT 24 May 05 02:45:17 PM PDT 24 35069300 ps
T973 /workspace/coverage/cover_reg_top/14.flash_ctrl_csr_mem_rw_with_rand_reset.3167666508 May 05 02:45:03 PM PDT 24 May 05 02:45:21 PM PDT 24 93170600 ps
T974 /workspace/coverage/cover_reg_top/19.flash_ctrl_intr_test.1378684881 May 05 02:45:10 PM PDT 24 May 05 02:45:24 PM PDT 24 15304000 ps
T975 /workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors.2603627748 May 05 02:45:03 PM PDT 24 May 05 02:45:16 PM PDT 24 39464600 ps
T976 /workspace/coverage/cover_reg_top/38.flash_ctrl_intr_test.2650955929 May 05 02:45:30 PM PDT 24 May 05 02:45:44 PM PDT 24 51345400 ps
T232 /workspace/coverage/cover_reg_top/10.flash_ctrl_tl_intg_err.3550559179 May 05 02:44:57 PM PDT 24 May 05 02:51:26 PM PDT 24 344855500 ps
T977 /workspace/coverage/cover_reg_top/5.flash_ctrl_shadow_reg_errors.1911127319 May 05 02:45:04 PM PDT 24 May 05 02:45:18 PM PDT 24 19888900 ps
T978 /workspace/coverage/cover_reg_top/18.flash_ctrl_csr_rw.2643462909 May 05 02:45:12 PM PDT 24 May 05 02:45:29 PM PDT 24 53578000 ps
T261 /workspace/coverage/cover_reg_top/1.flash_ctrl_tl_errors.1619406018 May 05 02:44:35 PM PDT 24 May 05 02:44:52 PM PDT 24 188479100 ps
T979 /workspace/coverage/cover_reg_top/45.flash_ctrl_intr_test.544930136 May 05 02:45:30 PM PDT 24 May 05 02:45:44 PM PDT 24 17686500 ps
T249 /workspace/coverage/cover_reg_top/19.flash_ctrl_tl_errors.933483800 May 05 02:45:10 PM PDT 24 May 05 02:45:28 PM PDT 24 54754700 ps
T980 /workspace/coverage/cover_reg_top/7.flash_ctrl_csr_rw.2340888500 May 05 02:44:52 PM PDT 24 May 05 02:45:07 PM PDT 24 52856100 ps
T981 /workspace/coverage/cover_reg_top/14.flash_ctrl_csr_rw.1833056598 May 05 02:45:02 PM PDT 24 May 05 02:45:20 PM PDT 24 56039100 ps
T259 /workspace/coverage/cover_reg_top/7.flash_ctrl_tl_errors.1086845936 May 05 02:44:59 PM PDT 24 May 05 02:45:18 PM PDT 24 216095800 ps
T289 /workspace/coverage/cover_reg_top/3.flash_ctrl_csr_bit_bash.1198033255 May 05 02:44:49 PM PDT 24 May 05 02:45:45 PM PDT 24 9117672300 ps
T982 /workspace/coverage/cover_reg_top/1.flash_ctrl_csr_bit_bash.1889376396 May 05 02:44:40 PM PDT 24 May 05 02:45:36 PM PDT 24 1970507300 ps
T323 /workspace/coverage/cover_reg_top/3.flash_ctrl_tl_intg_err.3863070385 May 05 02:44:42 PM PDT 24 May 05 02:59:56 PM PDT 24 1313745900 ps
T983 /workspace/coverage/cover_reg_top/28.flash_ctrl_intr_test.3454820429 May 05 02:45:26 PM PDT 24 May 05 02:45:40 PM PDT 24 38519000 ps
T984 /workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors_with_csr_rw.1987606795 May 05 02:44:37 PM PDT 24 May 05 02:44:54 PM PDT 24 75023600 ps
T985 /workspace/coverage/cover_reg_top/42.flash_ctrl_intr_test.1642893222 May 05 02:45:29 PM PDT 24 May 05 02:45:43 PM PDT 24 17439100 ps
T986 /workspace/coverage/cover_reg_top/2.flash_ctrl_csr_aliasing.1677427548 May 05 02:44:43 PM PDT 24 May 05 02:45:36 PM PDT 24 1734150300 ps
T987 /workspace/coverage/cover_reg_top/0.flash_ctrl_intr_test.3002562490 May 05 02:44:34 PM PDT 24 May 05 02:44:48 PM PDT 24 25870200 ps
T290 /workspace/coverage/cover_reg_top/9.flash_ctrl_same_csr_outstanding.1544128425 May 05 02:44:59 PM PDT 24 May 05 02:45:20 PM PDT 24 213948800 ps
T988 /workspace/coverage/cover_reg_top/19.flash_ctrl_shadow_reg_errors.2778642908 May 05 02:45:13 PM PDT 24 May 05 02:45:29 PM PDT 24 13311000 ps
T989 /workspace/coverage/cover_reg_top/2.flash_ctrl_csr_hw_reset.2506672049 May 05 02:44:45 PM PDT 24 May 05 02:45:16 PM PDT 24 29913800 ps
T291 /workspace/coverage/cover_reg_top/1.flash_ctrl_csr_mem_rw_with_rand_reset.3716716675 May 05 02:44:39 PM PDT 24 May 05 02:44:59 PM PDT 24 104807600 ps
T990 /workspace/coverage/cover_reg_top/34.flash_ctrl_intr_test.2186838922 May 05 02:45:25 PM PDT 24 May 05 02:45:39 PM PDT 24 46428000 ps
T324 /workspace/coverage/cover_reg_top/12.flash_ctrl_tl_intg_err.1684549314 May 05 02:44:57 PM PDT 24 May 05 03:00:01 PM PDT 24 1483545500 ps
T217 /workspace/coverage/cover_reg_top/0.flash_ctrl_mem_partial_access.1591329106 May 05 02:44:34 PM PDT 24 May 05 02:44:48 PM PDT 24 33398700 ps
T991 /workspace/coverage/cover_reg_top/5.flash_ctrl_csr_rw.650381940 May 05 02:45:04 PM PDT 24 May 05 02:45:22 PM PDT 24 34157000 ps
T992 /workspace/coverage/cover_reg_top/8.flash_ctrl_shadow_reg_errors.362747370 May 05 02:44:58 PM PDT 24 May 05 02:45:12 PM PDT 24 23818900 ps
T326 /workspace/coverage/cover_reg_top/8.flash_ctrl_tl_intg_err.396011470 May 05 02:44:59 PM PDT 24 May 05 02:52:40 PM PDT 24 1492861500 ps
T993 /workspace/coverage/cover_reg_top/2.flash_ctrl_intr_test.3766004029 May 05 02:44:42 PM PDT 24 May 05 02:44:56 PM PDT 24 135304400 ps
T994 /workspace/coverage/cover_reg_top/2.flash_ctrl_csr_rw.4123819981 May 05 02:44:44 PM PDT 24 May 05 02:45:01 PM PDT 24 49310000 ps
T995 /workspace/coverage/cover_reg_top/6.flash_ctrl_same_csr_outstanding.3848420725 May 05 02:45:06 PM PDT 24 May 05 02:45:26 PM PDT 24 551070600 ps
T996 /workspace/coverage/cover_reg_top/4.flash_ctrl_csr_hw_reset.2924177015 May 05 02:44:53 PM PDT 24 May 05 02:45:20 PM PDT 24 92966200 ps
T292 /workspace/coverage/cover_reg_top/11.flash_ctrl_same_csr_outstanding.3785772965 May 05 02:44:58 PM PDT 24 May 05 02:45:16 PM PDT 24 140466000 ps
T997 /workspace/coverage/cover_reg_top/26.flash_ctrl_intr_test.157653702 May 05 02:45:19 PM PDT 24 May 05 02:45:33 PM PDT 24 17612500 ps
T998 /workspace/coverage/cover_reg_top/14.flash_ctrl_shadow_reg_errors_with_csr_rw.1165340326 May 05 02:45:03 PM PDT 24 May 05 02:45:20 PM PDT 24 56219900 ps
T999 /workspace/coverage/cover_reg_top/17.flash_ctrl_same_csr_outstanding.2996279965 May 05 02:45:07 PM PDT 24 May 05 02:45:26 PM PDT 24 311252600 ps
T1000 /workspace/coverage/cover_reg_top/11.flash_ctrl_csr_rw.3793803342 May 05 02:44:58 PM PDT 24 May 05 02:45:15 PM PDT 24 36268200 ps
T1001 /workspace/coverage/cover_reg_top/16.flash_ctrl_intr_test.2954338728 May 05 02:45:08 PM PDT 24 May 05 02:45:21 PM PDT 24 15042400 ps
T1002 /workspace/coverage/cover_reg_top/8.flash_ctrl_csr_rw.1332326942 May 05 02:44:58 PM PDT 24 May 05 02:45:16 PM PDT 24 50665200 ps
T255 /workspace/coverage/cover_reg_top/6.flash_ctrl_tl_intg_err.3422498318 May 05 02:44:59 PM PDT 24 May 05 02:51:27 PM PDT 24 643637700 ps
T1003 /workspace/coverage/cover_reg_top/0.flash_ctrl_shadow_reg_errors.3428001136 May 05 02:44:37 PM PDT 24 May 05 02:44:54 PM PDT 24 18348400 ps
T1004 /workspace/coverage/cover_reg_top/14.flash_ctrl_same_csr_outstanding.3118924750 May 05 02:45:02 PM PDT 24 May 05 02:45:20 PM PDT 24 246836300 ps
T1005 /workspace/coverage/cover_reg_top/3.flash_ctrl_shadow_reg_errors_with_csr_rw.1837393586 May 05 02:44:51 PM PDT 24 May 05 02:45:07 PM PDT 24 76044200 ps
T1006 /workspace/coverage/cover_reg_top/0.flash_ctrl_mem_walk.4168451005 May 05 02:44:35 PM PDT 24 May 05 02:44:49 PM PDT 24 29223200 ps
T1007 /workspace/coverage/cover_reg_top/0.flash_ctrl_same_csr_outstanding.2980982944 May 05 02:44:35 PM PDT 24 May 05 02:44:53 PM PDT 24 37134500 ps
T325 /workspace/coverage/cover_reg_top/11.flash_ctrl_tl_intg_err.389822970 May 05 02:44:58 PM PDT 24 May 05 02:57:33 PM PDT 24 1428424700 ps
T265 /workspace/coverage/cover_reg_top/10.flash_ctrl_tl_errors.3309083513 May 05 02:44:58 PM PDT 24 May 05 02:45:18 PM PDT 24 99027500 ps
T1008 /workspace/coverage/cover_reg_top/15.flash_ctrl_shadow_reg_errors_with_csr_rw.562057944 May 05 02:45:02 PM PDT 24 May 05 02:45:18 PM PDT 24 35290500 ps
T1009 /workspace/coverage/cover_reg_top/1.flash_ctrl_shadow_reg_errors_with_csr_rw.4056363455 May 05 02:44:38 PM PDT 24 May 05 02:44:54 PM PDT 24 15776300 ps
T1010 /workspace/coverage/cover_reg_top/3.flash_ctrl_csr_rw.191762777 May 05 02:44:52 PM PDT 24 May 05 02:45:07 PM PDT 24 136207700 ps
T253 /workspace/coverage/cover_reg_top/13.flash_ctrl_tl_errors.3355545850 May 05 02:45:07 PM PDT 24 May 05 02:45:26 PM PDT 24 221390300 ps
T1011 /workspace/coverage/cover_reg_top/16.flash_ctrl_csr_mem_rw_with_rand_reset.3899459447 May 05 02:45:10 PM PDT 24 May 05 02:45:30 PM PDT 24 588300400 ps
T293 /workspace/coverage/cover_reg_top/3.flash_ctrl_csr_hw_reset.3894165406 May 05 02:44:50 PM PDT 24 May 05 02:45:21 PM PDT 24 61962600 ps
T1012 /workspace/coverage/cover_reg_top/33.flash_ctrl_intr_test.520560261 May 05 02:45:26 PM PDT 24 May 05 02:45:40 PM PDT 24 44602600 ps
T218 /workspace/coverage/cover_reg_top/1.flash_ctrl_mem_partial_access.1526139075 May 05 02:44:40 PM PDT 24 May 05 02:44:54 PM PDT 24 27892100 ps
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