Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info0_page_cfg_9.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info1_page_cfg.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank0_info2_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
225 |
1 |
|
T28 |
2 |
|
T13 |
1 |
|
T18 |
1 |
| others[1] |
227 |
1 |
|
T28 |
1 |
|
T18 |
1 |
|
T131 |
9 |
| others[2] |
230 |
1 |
|
T28 |
2 |
|
T18 |
1 |
|
T147 |
1 |
| others[3] |
382 |
1 |
|
T183 |
1 |
|
T50 |
1 |
|
T174 |
1 |
| false |
103 |
1 |
|
T28 |
2 |
|
T218 |
1 |
|
T348 |
1 |
| true |
12887 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8660 |
1 |
|
T25 |
247 |
|
T9 |
15 |
|
T10 |
2 |
| others[1] |
1203 |
1 |
|
T9 |
23 |
|
T78 |
1 |
|
T39 |
4 |
| others[2] |
1229 |
1 |
|
T6 |
1 |
|
T9 |
19 |
|
T78 |
2 |
| others[3] |
2011 |
1 |
|
T9 |
31 |
|
T39 |
6 |
|
T7 |
1 |
| false |
618 |
1 |
|
T9 |
12 |
|
T78 |
1 |
|
T39 |
2 |
| true |
333 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8601 |
1 |
|
T25 |
247 |
|
T9 |
10 |
|
T10 |
2 |
| others[1] |
1223 |
1 |
|
T9 |
18 |
|
T78 |
2 |
|
T39 |
2 |
| others[2] |
1264 |
1 |
|
T6 |
1 |
|
T9 |
24 |
|
T11 |
1 |
| others[3] |
2049 |
1 |
|
T9 |
33 |
|
T78 |
3 |
|
T39 |
3 |
| false |
616 |
1 |
|
T9 |
15 |
|
T39 |
3 |
|
T43 |
2 |
| true |
301 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
109 |
1 |
|
T28 |
2 |
|
T238 |
1 |
|
T131 |
4 |
| others[1] |
128 |
1 |
|
T28 |
2 |
|
T348 |
1 |
|
T349 |
2 |
| others[2] |
123 |
1 |
|
T28 |
3 |
|
T13 |
1 |
|
T346 |
1 |
| others[3] |
167 |
1 |
|
T28 |
5 |
|
T218 |
2 |
|
T233 |
1 |
| false |
37 |
1 |
|
T28 |
1 |
|
T238 |
1 |
|
T154 |
1 |
| true |
13490 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
211 |
1 |
|
T28 |
2 |
|
T218 |
1 |
|
T233 |
1 |
| others[1] |
199 |
1 |
|
T28 |
1 |
|
T13 |
1 |
|
T50 |
1 |
| others[2] |
232 |
1 |
|
T28 |
3 |
|
T95 |
1 |
|
T218 |
1 |
| others[3] |
366 |
1 |
|
T2 |
1 |
|
T59 |
1 |
|
T33 |
1 |
| false |
114 |
1 |
|
T4 |
1 |
|
T28 |
1 |
|
T131 |
2 |
| true |
12932 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T25 |
247 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8481 |
1 |
|
T25 |
247 |
|
T9 |
12 |
|
T10 |
2 |
| others[1] |
1045 |
1 |
|
T9 |
9 |
|
T78 |
4 |
|
T39 |
4 |
| others[2] |
1018 |
1 |
|
T6 |
1 |
|
T9 |
11 |
|
T39 |
1 |
| others[3] |
1693 |
1 |
|
T3 |
1 |
|
T5 |
1 |
|
T9 |
15 |
| false |
500 |
1 |
|
T9 |
3 |
|
T39 |
1 |
|
T43 |
1 |
| true |
1317 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T12 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
204 |
1 |
|
T33 |
1 |
|
T349 |
1 |
|
T131 |
8 |
| others[1] |
234 |
1 |
|
T28 |
2 |
|
T346 |
1 |
|
T131 |
11 |
| others[2] |
251 |
1 |
|
T74 |
1 |
|
T348 |
1 |
|
T131 |
8 |
| others[3] |
363 |
1 |
|
T71 |
1 |
|
T17 |
1 |
|
T28 |
4 |
| false |
99 |
1 |
|
T28 |
1 |
|
T131 |
6 |
|
T81 |
1 |
| true |
12903 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
210 |
1 |
|
T28 |
2 |
|
T233 |
1 |
|
T238 |
1 |
| others[1] |
236 |
1 |
|
T33 |
1 |
|
T28 |
1 |
|
T183 |
1 |
| others[2] |
201 |
1 |
|
T28 |
1 |
|
T18 |
2 |
|
T174 |
1 |
| others[3] |
347 |
1 |
|
T17 |
1 |
|
T28 |
1 |
|
T13 |
1 |
| false |
106 |
1 |
|
T28 |
1 |
|
T131 |
6 |
|
T154 |
9 |
| true |
12954 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
8604 |
1 |
|
T25 |
247 |
|
T9 |
23 |
|
T10 |
2 |
| others[1] |
1259 |
1 |
|
T9 |
25 |
|
T78 |
2 |
|
T39 |
2 |
| others[2] |
1218 |
1 |
|
T9 |
18 |
|
T39 |
3 |
|
T7 |
1 |
| others[3] |
1998 |
1 |
|
T6 |
1 |
|
T9 |
19 |
|
T78 |
1 |
| false |
638 |
1 |
|
T9 |
15 |
|
T11 |
1 |
|
T78 |
1 |
| true |
337 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1244 |
1 |
|
T9 |
14 |
|
T78 |
1 |
|
T39 |
2 |
| others[1] |
1260 |
1 |
|
T9 |
26 |
|
T39 |
3 |
|
T7 |
1 |
| others[2] |
1180 |
1 |
|
T6 |
1 |
|
T9 |
15 |
|
T78 |
3 |
| others[3] |
2038 |
1 |
|
T9 |
34 |
|
T78 |
1 |
|
T39 |
5 |
| false |
639 |
1 |
|
T9 |
11 |
|
T11 |
1 |
|
T39 |
3 |
| true |
298 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
114 |
1 |
|
T33 |
1 |
|
T28 |
5 |
|
T218 |
1 |
| others[1] |
112 |
1 |
|
T28 |
1 |
|
T233 |
1 |
|
T346 |
1 |
| others[2] |
107 |
1 |
|
T28 |
1 |
|
T349 |
1 |
|
T238 |
1 |
| others[3] |
175 |
1 |
|
T28 |
6 |
|
T218 |
1 |
|
T348 |
1 |
| false |
50 |
1 |
|
T13 |
1 |
|
T349 |
1 |
|
T238 |
1 |
| true |
6101 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
214 |
1 |
|
T71 |
1 |
|
T28 |
1 |
|
T346 |
1 |
| others[1] |
225 |
1 |
|
T2 |
1 |
|
T28 |
1 |
|
T131 |
7 |
| others[2] |
203 |
1 |
|
T28 |
1 |
|
T49 |
1 |
|
T18 |
1 |
| others[3] |
400 |
1 |
|
T13 |
1 |
|
T183 |
1 |
|
T174 |
1 |
| false |
115 |
1 |
|
T28 |
2 |
|
T131 |
3 |
|
T154 |
4 |
| true |
5502 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1019 |
1 |
|
T3 |
1 |
|
T9 |
6 |
|
T39 |
2 |
| others[1] |
1076 |
1 |
|
T9 |
15 |
|
T78 |
1 |
|
T39 |
1 |
| others[2] |
1070 |
1 |
|
T6 |
1 |
|
T9 |
8 |
|
T78 |
4 |
| others[3] |
1646 |
1 |
|
T4 |
1 |
|
T12 |
1 |
|
T9 |
8 |
| false |
564 |
1 |
|
T9 |
4 |
|
T39 |
1 |
|
T27 |
3 |
| true |
1284 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T9 |
59 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T28 |
1 |
|
T95 |
1 |
|
T349 |
1 |
| others[1] |
230 |
1 |
|
T33 |
1 |
|
T28 |
2 |
|
T218 |
1 |
| others[2] |
244 |
1 |
|
T71 |
1 |
|
T28 |
2 |
|
T13 |
1 |
| others[3] |
376 |
1 |
|
T12 |
1 |
|
T28 |
3 |
|
T218 |
1 |
| false |
128 |
1 |
|
T174 |
1 |
|
T348 |
1 |
|
T131 |
4 |
| true |
5452 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
216 |
1 |
|
T17 |
1 |
|
T28 |
2 |
|
T183 |
1 |
| others[1] |
221 |
1 |
|
T28 |
2 |
|
T131 |
11 |
|
T347 |
1 |
| others[2] |
222 |
1 |
|
T28 |
3 |
|
T84 |
1 |
|
T346 |
1 |
| others[3] |
372 |
1 |
|
T28 |
3 |
|
T218 |
2 |
|
T49 |
1 |
| false |
108 |
1 |
|
T131 |
3 |
|
T154 |
3 |
|
T132 |
4 |
| true |
5520 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1286 |
1 |
|
T9 |
14 |
|
T78 |
1 |
|
T39 |
4 |
| others[1] |
1195 |
1 |
|
T9 |
13 |
|
T43 |
5 |
|
T27 |
3 |
| others[2] |
1222 |
1 |
|
T9 |
24 |
|
T11 |
1 |
|
T17 |
1 |
| others[3] |
1977 |
1 |
|
T6 |
1 |
|
T9 |
35 |
|
T78 |
1 |
| false |
664 |
1 |
|
T9 |
14 |
|
T78 |
1 |
|
T39 |
2 |
| true |
315 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1208 |
1 |
|
T9 |
26 |
|
T39 |
5 |
|
T7 |
1 |
| others[1] |
1234 |
1 |
|
T9 |
20 |
|
T78 |
1 |
|
T39 |
3 |
| others[2] |
1232 |
1 |
|
T9 |
11 |
|
T39 |
1 |
|
T43 |
2 |
| others[3] |
2025 |
1 |
|
T6 |
1 |
|
T4 |
1 |
|
T9 |
30 |
| false |
662 |
1 |
|
T9 |
13 |
|
T39 |
2 |
|
T43 |
2 |
| true |
298 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
95 |
1 |
|
T28 |
1 |
|
T346 |
1 |
|
T190 |
1 |
| others[1] |
108 |
1 |
|
T28 |
3 |
|
T238 |
1 |
|
T131 |
4 |
| others[2] |
109 |
1 |
|
T28 |
4 |
|
T218 |
1 |
|
T233 |
1 |
| others[3] |
182 |
1 |
|
T28 |
3 |
|
T218 |
1 |
|
T348 |
1 |
| false |
47 |
1 |
|
T28 |
2 |
|
T346 |
1 |
|
T131 |
2 |
| true |
6118 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
248 |
1 |
|
T28 |
1 |
|
T18 |
1 |
|
T131 |
9 |
| others[1] |
257 |
1 |
|
T28 |
2 |
|
T18 |
1 |
|
T348 |
1 |
| others[2] |
191 |
1 |
|
T28 |
2 |
|
T95 |
1 |
|
T18 |
2 |
| others[3] |
365 |
1 |
|
T28 |
2 |
|
T218 |
1 |
|
T74 |
1 |
| false |
130 |
1 |
|
T50 |
1 |
|
T190 |
1 |
|
T238 |
1 |
| true |
5468 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1070 |
1 |
|
T6 |
1 |
|
T5 |
1 |
|
T9 |
8 |
| others[1] |
1039 |
1 |
|
T9 |
8 |
|
T71 |
1 |
|
T39 |
4 |
| others[2] |
998 |
1 |
|
T9 |
10 |
|
T78 |
1 |
|
T39 |
1 |
| others[3] |
1757 |
1 |
|
T9 |
13 |
|
T17 |
1 |
|
T78 |
2 |
| false |
512 |
1 |
|
T9 |
6 |
|
T78 |
1 |
|
T39 |
2 |
| true |
1283 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
215 |
1 |
|
T4 |
1 |
|
T28 |
2 |
|
T346 |
1 |
| others[1] |
211 |
1 |
|
T131 |
9 |
|
T354 |
1 |
|
T154 |
7 |
| others[2] |
238 |
1 |
|
T59 |
1 |
|
T28 |
1 |
|
T218 |
1 |
| others[3] |
397 |
1 |
|
T2 |
1 |
|
T28 |
3 |
|
T218 |
1 |
| false |
111 |
1 |
|
T348 |
1 |
|
T238 |
1 |
|
T126 |
1 |
| true |
5487 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
201 |
1 |
|
T33 |
1 |
|
T28 |
1 |
|
T84 |
1 |
| others[1] |
212 |
1 |
|
T28 |
1 |
|
T233 |
1 |
|
T346 |
1 |
| others[2] |
208 |
1 |
|
T28 |
2 |
|
T131 |
14 |
|
T154 |
7 |
| others[3] |
370 |
1 |
|
T28 |
2 |
|
T95 |
1 |
|
T18 |
1 |
| false |
114 |
1 |
|
T49 |
1 |
|
T346 |
1 |
|
T131 |
8 |
| true |
5554 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1338 |
1 |
|
T6 |
1 |
|
T9 |
32 |
|
T39 |
3 |
| others[1] |
1140 |
1 |
|
T9 |
14 |
|
T11 |
1 |
|
T78 |
1 |
| others[2] |
1213 |
1 |
|
T9 |
14 |
|
T39 |
3 |
|
T33 |
1 |
| others[3] |
2021 |
1 |
|
T9 |
31 |
|
T78 |
3 |
|
T39 |
5 |
| false |
620 |
1 |
|
T9 |
9 |
|
T78 |
1 |
|
T39 |
1 |
| true |
327 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1234 |
1 |
|
T9 |
19 |
|
T78 |
2 |
|
T39 |
3 |
| others[1] |
1180 |
1 |
|
T9 |
16 |
|
T39 |
2 |
|
T43 |
5 |
| others[2] |
1209 |
1 |
|
T6 |
1 |
|
T9 |
22 |
|
T78 |
1 |
| others[3] |
2109 |
1 |
|
T9 |
39 |
|
T78 |
2 |
|
T39 |
5 |
| false |
621 |
1 |
|
T9 |
4 |
|
T11 |
1 |
|
T43 |
1 |
| true |
306 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
86 |
1 |
|
T28 |
3 |
|
T50 |
1 |
|
T349 |
1 |
| others[1] |
113 |
1 |
|
T28 |
4 |
|
T218 |
1 |
|
T238 |
2 |
| others[2] |
94 |
1 |
|
T28 |
2 |
|
T218 |
1 |
|
T346 |
1 |
| others[3] |
176 |
1 |
|
T28 |
4 |
|
T95 |
1 |
|
T233 |
1 |
| false |
56 |
1 |
|
T131 |
4 |
|
T154 |
1 |
|
T132 |
5 |
| true |
6134 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
242 |
1 |
|
T17 |
1 |
|
T28 |
1 |
|
T84 |
1 |
| others[1] |
218 |
1 |
|
T28 |
1 |
|
T50 |
1 |
|
T131 |
11 |
| others[2] |
224 |
1 |
|
T13 |
1 |
|
T218 |
1 |
|
T74 |
1 |
| others[3] |
381 |
1 |
|
T33 |
1 |
|
T28 |
1 |
|
T183 |
1 |
| false |
114 |
1 |
|
T233 |
1 |
|
T349 |
1 |
|
T131 |
7 |
| true |
5480 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1044 |
1 |
|
T9 |
7 |
|
T78 |
2 |
|
T39 |
1 |
| others[1] |
963 |
1 |
|
T6 |
1 |
|
T9 |
10 |
|
T78 |
1 |
| others[2] |
1087 |
1 |
|
T3 |
1 |
|
T4 |
1 |
|
T9 |
10 |
| others[3] |
1726 |
1 |
|
T2 |
1 |
|
T9 |
25 |
|
T78 |
2 |
| false |
524 |
1 |
|
T9 |
1 |
|
T27 |
1 |
|
T28 |
2 |
| true |
1315 |
1 |
|
T5 |
1 |
|
T12 |
1 |
|
T9 |
47 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
226 |
1 |
|
T12 |
1 |
|
T59 |
1 |
|
T28 |
2 |
| others[1] |
207 |
1 |
|
T28 |
2 |
|
T174 |
1 |
|
T131 |
12 |
| others[2] |
202 |
1 |
|
T131 |
6 |
|
T154 |
9 |
|
T132 |
9 |
| others[3] |
383 |
1 |
|
T2 |
1 |
|
T71 |
1 |
|
T28 |
1 |
| false |
118 |
1 |
|
T95 |
1 |
|
T346 |
1 |
|
T131 |
5 |
| true |
5523 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
217 |
1 |
|
T28 |
2 |
|
T18 |
1 |
|
T190 |
1 |
| others[1] |
200 |
1 |
|
T13 |
1 |
|
T18 |
1 |
|
T131 |
11 |
| others[2] |
222 |
1 |
|
T17 |
1 |
|
T95 |
1 |
|
T18 |
2 |
| others[3] |
359 |
1 |
|
T28 |
5 |
|
T183 |
1 |
|
T50 |
1 |
| false |
98 |
1 |
|
T218 |
1 |
|
T84 |
1 |
|
T18 |
1 |
| true |
5563 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1257 |
1 |
|
T9 |
23 |
|
T11 |
1 |
|
T78 |
2 |
| others[1] |
1202 |
1 |
|
T6 |
1 |
|
T9 |
20 |
|
T78 |
2 |
| others[2] |
1243 |
1 |
|
T9 |
22 |
|
T39 |
3 |
|
T7 |
1 |
| others[3] |
2006 |
1 |
|
T9 |
28 |
|
T78 |
1 |
|
T39 |
6 |
| false |
634 |
1 |
|
T3 |
1 |
|
T9 |
7 |
|
T27 |
3 |
| true |
317 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1275 |
1 |
|
T12 |
1 |
|
T9 |
12 |
|
T78 |
2 |
| others[1] |
1246 |
1 |
|
T9 |
21 |
|
T39 |
3 |
|
T43 |
2 |
| others[2] |
1211 |
1 |
|
T9 |
22 |
|
T11 |
1 |
|
T39 |
3 |
| others[3] |
2045 |
1 |
|
T6 |
1 |
|
T9 |
37 |
|
T17 |
1 |
| false |
586 |
1 |
|
T9 |
8 |
|
T39 |
2 |
|
T43 |
1 |
| true |
296 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |