Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_0.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_1.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_2.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_3.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
115 |
1 |
|
T28 |
2 |
|
T349 |
2 |
|
T131 |
5 |
| others[1] |
98 |
1 |
|
T33 |
1 |
|
T218 |
1 |
|
T346 |
2 |
| others[2] |
106 |
1 |
|
T28 |
2 |
|
T13 |
1 |
|
T183 |
1 |
| others[3] |
176 |
1 |
|
T28 |
9 |
|
T218 |
1 |
|
T233 |
1 |
| false |
57 |
1 |
|
T126 |
1 |
|
T131 |
2 |
|
T347 |
1 |
| true |
6107 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
214 |
1 |
|
T28 |
3 |
|
T18 |
1 |
|
T147 |
1 |
| others[1] |
237 |
1 |
|
T59 |
1 |
|
T17 |
1 |
|
T74 |
1 |
| others[2] |
260 |
1 |
|
T28 |
1 |
|
T95 |
1 |
|
T18 |
1 |
| others[3] |
360 |
1 |
|
T28 |
2 |
|
T218 |
1 |
|
T84 |
1 |
| false |
106 |
1 |
|
T4 |
1 |
|
T28 |
1 |
|
T190 |
1 |
| true |
5482 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1049 |
1 |
|
T9 |
12 |
|
T78 |
1 |
|
T39 |
4 |
| others[1] |
988 |
1 |
|
T9 |
11 |
|
T59 |
1 |
|
T11 |
1 |
| others[2] |
1021 |
1 |
|
T9 |
4 |
|
T39 |
2 |
|
T43 |
2 |
| others[3] |
1760 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T12 |
1 |
| false |
520 |
1 |
|
T9 |
4 |
|
T39 |
3 |
|
T43 |
2 |
| true |
1321 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
236 |
1 |
|
T28 |
2 |
|
T131 |
7 |
|
T352 |
1 |
| others[1] |
199 |
1 |
|
T71 |
1 |
|
T28 |
1 |
|
T349 |
1 |
| others[2] |
218 |
1 |
|
T28 |
1 |
|
T49 |
1 |
|
T131 |
8 |
| others[3] |
389 |
1 |
|
T28 |
2 |
|
T95 |
1 |
|
T218 |
1 |
| false |
120 |
1 |
|
T346 |
1 |
|
T238 |
1 |
|
T131 |
8 |
| true |
5497 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
222 |
1 |
|
T28 |
1 |
|
T13 |
1 |
|
T18 |
2 |
| others[1] |
220 |
1 |
|
T28 |
2 |
|
T50 |
1 |
|
T349 |
1 |
| others[2] |
218 |
1 |
|
T28 |
1 |
|
T218 |
1 |
|
T183 |
1 |
| others[3] |
352 |
1 |
|
T28 |
1 |
|
T218 |
1 |
|
T147 |
1 |
| false |
135 |
1 |
|
T28 |
1 |
|
T346 |
1 |
|
T131 |
8 |
| true |
5512 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1307 |
1 |
|
T9 |
25 |
|
T33 |
1 |
|
T7 |
1 |
| others[1] |
1166 |
1 |
|
T5 |
1 |
|
T9 |
18 |
|
T78 |
1 |
| others[2] |
1256 |
1 |
|
T9 |
14 |
|
T78 |
1 |
|
T39 |
4 |
| others[3] |
1993 |
1 |
|
T6 |
1 |
|
T9 |
32 |
|
T78 |
3 |
| false |
614 |
1 |
|
T9 |
11 |
|
T11 |
1 |
|
T39 |
2 |
| true |
323 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1213 |
1 |
|
T9 |
17 |
|
T11 |
1 |
|
T78 |
1 |
| others[1] |
1206 |
1 |
|
T9 |
25 |
|
T39 |
2 |
|
T43 |
2 |
| others[2] |
1274 |
1 |
|
T9 |
13 |
|
T39 |
5 |
|
T43 |
3 |
| others[3] |
2026 |
1 |
|
T6 |
1 |
|
T9 |
30 |
|
T78 |
4 |
| false |
641 |
1 |
|
T9 |
15 |
|
T39 |
1 |
|
T27 |
1 |
| true |
299 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
110 |
1 |
|
T28 |
3 |
|
T218 |
1 |
|
T346 |
1 |
| others[1] |
97 |
1 |
|
T28 |
1 |
|
T349 |
1 |
|
T126 |
1 |
| others[2] |
101 |
1 |
|
T28 |
3 |
|
T349 |
1 |
|
T238 |
1 |
| others[3] |
171 |
1 |
|
T28 |
5 |
|
T218 |
1 |
|
T233 |
1 |
| false |
64 |
1 |
|
T28 |
1 |
|
T183 |
1 |
|
T131 |
1 |
| true |
6116 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
276 |
1 |
|
T74 |
1 |
|
T18 |
1 |
|
T131 |
16 |
| others[1] |
239 |
1 |
|
T59 |
1 |
|
T218 |
2 |
|
T14 |
1 |
| others[2] |
207 |
1 |
|
T28 |
2 |
|
T18 |
1 |
|
T131 |
6 |
| others[3] |
370 |
1 |
|
T71 |
1 |
|
T28 |
1 |
|
T84 |
1 |
| false |
116 |
1 |
|
T17 |
1 |
|
T28 |
1 |
|
T131 |
3 |
| true |
5451 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1065 |
1 |
|
T9 |
8 |
|
T39 |
4 |
|
T7 |
1 |
| others[1] |
1027 |
1 |
|
T3 |
1 |
|
T5 |
1 |
|
T9 |
10 |
| others[2] |
1032 |
1 |
|
T6 |
1 |
|
T4 |
1 |
|
T9 |
9 |
| others[3] |
1769 |
1 |
|
T9 |
19 |
|
T17 |
1 |
|
T78 |
3 |
| false |
500 |
1 |
|
T9 |
6 |
|
T39 |
2 |
|
T33 |
1 |
| true |
1266 |
1 |
|
T2 |
1 |
|
T12 |
1 |
|
T9 |
48 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
225 |
1 |
|
T4 |
1 |
|
T95 |
1 |
|
T174 |
1 |
| others[1] |
216 |
1 |
|
T59 |
1 |
|
T218 |
1 |
|
T183 |
1 |
| others[2] |
232 |
1 |
|
T28 |
1 |
|
T49 |
1 |
|
T131 |
12 |
| others[3] |
362 |
1 |
|
T71 |
1 |
|
T28 |
2 |
|
T13 |
1 |
| false |
127 |
1 |
|
T218 |
1 |
|
T84 |
1 |
|
T190 |
1 |
| true |
5497 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
208 |
1 |
|
T28 |
3 |
|
T190 |
1 |
|
T349 |
1 |
| others[1] |
191 |
1 |
|
T18 |
1 |
|
T238 |
1 |
|
T126 |
1 |
| others[2] |
218 |
1 |
|
T28 |
1 |
|
T218 |
1 |
|
T50 |
1 |
| others[3] |
363 |
1 |
|
T28 |
1 |
|
T183 |
1 |
|
T233 |
1 |
| false |
117 |
1 |
|
T131 |
7 |
|
T154 |
3 |
|
T132 |
6 |
| true |
5562 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1216 |
1 |
|
T9 |
14 |
|
T78 |
1 |
|
T39 |
3 |
| others[1] |
1211 |
1 |
|
T9 |
24 |
|
T78 |
2 |
|
T39 |
4 |
| others[2] |
1260 |
1 |
|
T9 |
23 |
|
T11 |
1 |
|
T78 |
1 |
| others[3] |
2019 |
1 |
|
T6 |
1 |
|
T9 |
28 |
|
T78 |
1 |
| false |
627 |
1 |
|
T9 |
11 |
|
T39 |
1 |
|
T43 |
3 |
| true |
326 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1195 |
1 |
|
T9 |
19 |
|
T11 |
1 |
|
T39 |
1 |
| others[1] |
1252 |
1 |
|
T6 |
1 |
|
T9 |
21 |
|
T78 |
1 |
| others[2] |
1180 |
1 |
|
T9 |
22 |
|
T78 |
1 |
|
T39 |
1 |
| others[3] |
2102 |
1 |
|
T9 |
30 |
|
T78 |
3 |
|
T39 |
6 |
| false |
639 |
1 |
|
T9 |
8 |
|
T39 |
4 |
|
T33 |
1 |
| true |
291 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
110 |
1 |
|
T28 |
2 |
|
T218 |
2 |
|
T346 |
1 |
| others[1] |
103 |
1 |
|
T28 |
3 |
|
T131 |
2 |
|
T354 |
1 |
| others[2] |
87 |
1 |
|
T28 |
1 |
|
T233 |
1 |
|
T131 |
4 |
| others[3] |
154 |
1 |
|
T28 |
4 |
|
T346 |
1 |
|
T348 |
1 |
| false |
58 |
1 |
|
T28 |
3 |
|
T131 |
3 |
|
T154 |
2 |
| true |
6147 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
234 |
1 |
|
T71 |
1 |
|
T17 |
1 |
|
T33 |
1 |
| others[1] |
246 |
1 |
|
T2 |
1 |
|
T28 |
2 |
|
T346 |
1 |
| others[2] |
228 |
1 |
|
T4 |
1 |
|
T28 |
1 |
|
T346 |
1 |
| others[3] |
375 |
1 |
|
T59 |
1 |
|
T18 |
1 |
|
T131 |
17 |
| false |
118 |
1 |
|
T147 |
1 |
|
T131 |
7 |
|
T154 |
3 |
| true |
5458 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
982 |
1 |
|
T12 |
1 |
|
T9 |
11 |
|
T78 |
1 |
| others[1] |
1057 |
1 |
|
T2 |
1 |
|
T9 |
5 |
|
T71 |
1 |
| others[2] |
1043 |
1 |
|
T4 |
1 |
|
T9 |
13 |
|
T78 |
1 |
| others[3] |
1723 |
1 |
|
T5 |
1 |
|
T9 |
12 |
|
T39 |
4 |
| false |
539 |
1 |
|
T6 |
1 |
|
T9 |
6 |
|
T78 |
2 |
| true |
1315 |
1 |
|
T3 |
1 |
|
T9 |
53 |
|
T59 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
208 |
1 |
|
T346 |
1 |
|
T349 |
1 |
|
T147 |
1 |
| others[1] |
226 |
1 |
|
T28 |
2 |
|
T131 |
12 |
|
T97 |
1 |
| others[2] |
219 |
1 |
|
T17 |
1 |
|
T28 |
1 |
|
T74 |
1 |
| others[3] |
373 |
1 |
|
T28 |
2 |
|
T13 |
1 |
|
T218 |
1 |
| false |
110 |
1 |
|
T28 |
2 |
|
T233 |
1 |
|
T131 |
5 |
| true |
5523 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
235 |
1 |
|
T28 |
3 |
|
T349 |
1 |
|
T131 |
10 |
| others[1] |
199 |
1 |
|
T28 |
1 |
|
T18 |
2 |
|
T131 |
4 |
| others[2] |
224 |
1 |
|
T33 |
1 |
|
T84 |
1 |
|
T346 |
1 |
| others[3] |
366 |
1 |
|
T28 |
5 |
|
T349 |
1 |
|
T131 |
17 |
| false |
128 |
1 |
|
T28 |
1 |
|
T131 |
10 |
|
T154 |
2 |
| true |
5507 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1222 |
1 |
|
T9 |
20 |
|
T39 |
1 |
|
T43 |
3 |
| others[1] |
1207 |
1 |
|
T6 |
1 |
|
T9 |
24 |
|
T17 |
1 |
| others[2] |
1230 |
1 |
|
T9 |
19 |
|
T78 |
2 |
|
T39 |
6 |
| others[3] |
2053 |
1 |
|
T9 |
29 |
|
T11 |
1 |
|
T78 |
1 |
| false |
621 |
1 |
|
T9 |
8 |
|
T39 |
2 |
|
T7 |
1 |
| true |
326 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1226 |
1 |
|
T9 |
23 |
|
T78 |
1 |
|
T39 |
3 |
| others[1] |
1241 |
1 |
|
T9 |
19 |
|
T78 |
2 |
|
T39 |
4 |
| others[2] |
1243 |
1 |
|
T9 |
18 |
|
T78 |
1 |
|
T39 |
1 |
| others[3] |
2038 |
1 |
|
T9 |
33 |
|
T39 |
7 |
|
T43 |
4 |
| false |
607 |
1 |
|
T6 |
1 |
|
T9 |
7 |
|
T11 |
1 |
| true |
304 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
111 |
1 |
|
T28 |
2 |
|
T13 |
1 |
|
T218 |
1 |
| others[1] |
116 |
1 |
|
T28 |
3 |
|
T346 |
2 |
|
T348 |
1 |
| others[2] |
105 |
1 |
|
T28 |
5 |
|
T183 |
1 |
|
T131 |
4 |
| others[3] |
147 |
1 |
|
T28 |
2 |
|
T238 |
1 |
|
T131 |
10 |
| false |
58 |
1 |
|
T28 |
1 |
|
T218 |
1 |
|
T349 |
2 |
| true |
6122 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
209 |
1 |
|
T218 |
1 |
|
T84 |
1 |
|
T50 |
1 |
| others[1] |
247 |
1 |
|
T4 |
1 |
|
T28 |
1 |
|
T13 |
1 |
| others[2] |
223 |
1 |
|
T59 |
1 |
|
T71 |
1 |
|
T33 |
1 |
| others[3] |
361 |
1 |
|
T2 |
1 |
|
T18 |
2 |
|
T174 |
1 |
| false |
123 |
1 |
|
T28 |
1 |
|
T218 |
1 |
|
T49 |
1 |
| true |
5496 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
993 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T9 |
9 |
| others[1] |
1041 |
1 |
|
T3 |
1 |
|
T9 |
8 |
|
T71 |
1 |
| others[2] |
1075 |
1 |
|
T12 |
1 |
|
T9 |
6 |
|
T78 |
2 |
| others[3] |
1730 |
1 |
|
T6 |
1 |
|
T9 |
15 |
|
T39 |
5 |
| false |
539 |
1 |
|
T9 |
4 |
|
T39 |
1 |
|
T27 |
1 |
| true |
1281 |
1 |
|
T4 |
1 |
|
T9 |
58 |
|
T59 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
224 |
1 |
|
T33 |
1 |
|
T28 |
2 |
|
T346 |
1 |
| others[1] |
225 |
1 |
|
T4 |
1 |
|
T28 |
2 |
|
T349 |
1 |
| others[2] |
228 |
1 |
|
T28 |
1 |
|
T95 |
1 |
|
T131 |
10 |
| others[3] |
390 |
1 |
|
T28 |
1 |
|
T218 |
1 |
|
T74 |
1 |
| false |
119 |
1 |
|
T13 |
1 |
|
T84 |
1 |
|
T348 |
1 |
| true |
5473 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
192 |
1 |
|
T95 |
1 |
|
T218 |
1 |
|
T126 |
1 |
| others[1] |
213 |
1 |
|
T28 |
1 |
|
T13 |
1 |
|
T131 |
9 |
| others[2] |
218 |
1 |
|
T33 |
1 |
|
T218 |
1 |
|
T50 |
1 |
| others[3] |
390 |
1 |
|
T17 |
1 |
|
T28 |
3 |
|
T233 |
1 |
| false |
131 |
1 |
|
T28 |
4 |
|
T84 |
1 |
|
T238 |
1 |
| true |
5515 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1218 |
1 |
|
T9 |
21 |
|
T78 |
1 |
|
T39 |
1 |
| others[1] |
1213 |
1 |
|
T12 |
1 |
|
T9 |
23 |
|
T11 |
1 |
| others[2] |
1249 |
1 |
|
T9 |
19 |
|
T17 |
1 |
|
T78 |
2 |
| others[3] |
2001 |
1 |
|
T6 |
1 |
|
T9 |
32 |
|
T78 |
2 |
| false |
649 |
1 |
|
T9 |
5 |
|
T39 |
6 |
|
T43 |
1 |
| true |
329 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1222 |
1 |
|
T9 |
23 |
|
T11 |
1 |
|
T17 |
1 |
| others[1] |
1218 |
1 |
|
T9 |
17 |
|
T39 |
5 |
|
T7 |
1 |
| others[2] |
1205 |
1 |
|
T6 |
1 |
|
T9 |
18 |
|
T78 |
2 |
| others[3] |
2078 |
1 |
|
T9 |
32 |
|
T78 |
3 |
|
T39 |
2 |
| false |
635 |
1 |
|
T9 |
10 |
|
T39 |
1 |
|
T43 |
2 |
| true |
301 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
105 |
1 |
|
T28 |
1 |
|
T13 |
1 |
|
T218 |
1 |
| others[1] |
98 |
1 |
|
T28 |
4 |
|
T349 |
1 |
|
T131 |
3 |
| others[2] |
95 |
1 |
|
T28 |
2 |
|
T95 |
1 |
|
T218 |
1 |
| others[3] |
178 |
1 |
|
T28 |
4 |
|
T346 |
1 |
|
T349 |
1 |
| false |
59 |
1 |
|
T28 |
2 |
|
T49 |
1 |
|
T347 |
1 |
| true |
6124 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
234 |
1 |
|
T2 |
1 |
|
T71 |
1 |
|
T28 |
3 |
| others[1] |
211 |
1 |
|
T28 |
1 |
|
T18 |
1 |
|
T349 |
1 |
| others[2] |
230 |
1 |
|
T28 |
1 |
|
T18 |
1 |
|
T174 |
1 |
| others[3] |
363 |
1 |
|
T28 |
3 |
|
T218 |
1 |
|
T50 |
1 |
| false |
124 |
1 |
|
T59 |
1 |
|
T33 |
1 |
|
T95 |
1 |
| true |
5497 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1000 |
1 |
|
T6 |
1 |
|
T4 |
1 |
|
T9 |
12 |
| others[1] |
1007 |
1 |
|
T9 |
6 |
|
T39 |
3 |
|
T43 |
3 |
| others[2] |
1035 |
1 |
|
T5 |
1 |
|
T9 |
12 |
|
T39 |
3 |
| others[3] |
1739 |
1 |
|
T9 |
15 |
|
T17 |
1 |
|
T78 |
2 |
| false |
531 |
1 |
|
T9 |
4 |
|
T11 |
1 |
|
T39 |
1 |
| true |
1347 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T12 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |