Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_4.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_5.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_6.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_7.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.ecc_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.ecc_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.erase_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.erase_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.he_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.he_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.prog_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.prog_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.rd_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Variables |
6 |
0 |
6 |
100.00 |
Variables for Group Instance mubi4_cov_of_mubi4_cov_of_flash_ctrl_core_reg_block.bank1_info0_page_cfg_8.scramble_en
| VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
| cp_value |
6 |
0 |
6 |
100.00 |
100 |
1 |
1 |
0 |
|
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
216 |
1 |
|
T28 |
1 |
|
T218 |
1 |
|
T74 |
1 |
| others[1] |
213 |
1 |
|
T346 |
1 |
|
T131 |
9 |
|
T353 |
1 |
| others[2] |
232 |
1 |
|
T12 |
1 |
|
T33 |
1 |
|
T190 |
1 |
| others[3] |
387 |
1 |
|
T17 |
1 |
|
T28 |
1 |
|
T95 |
1 |
| false |
131 |
1 |
|
T131 |
11 |
|
T97 |
1 |
|
T154 |
3 |
| true |
5480 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
228 |
1 |
|
T28 |
2 |
|
T13 |
1 |
|
T95 |
1 |
| others[1] |
217 |
1 |
|
T33 |
1 |
|
T28 |
1 |
|
T131 |
9 |
| others[2] |
217 |
1 |
|
T17 |
1 |
|
T28 |
2 |
|
T218 |
1 |
| others[3] |
372 |
1 |
|
T28 |
2 |
|
T183 |
1 |
|
T18 |
3 |
| false |
108 |
1 |
|
T28 |
1 |
|
T346 |
1 |
|
T126 |
1 |
| true |
5517 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1195 |
1 |
|
T9 |
22 |
|
T78 |
1 |
|
T39 |
1 |
| others[1] |
1227 |
1 |
|
T6 |
1 |
|
T9 |
12 |
|
T39 |
6 |
| others[2] |
1185 |
1 |
|
T9 |
18 |
|
T78 |
1 |
|
T39 |
3 |
| others[3] |
2051 |
1 |
|
T9 |
33 |
|
T11 |
1 |
|
T78 |
1 |
| false |
674 |
1 |
|
T5 |
1 |
|
T9 |
15 |
|
T17 |
1 |
| true |
327 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1210 |
1 |
|
T9 |
21 |
|
T78 |
1 |
|
T43 |
3 |
| others[1] |
1249 |
1 |
|
T9 |
20 |
|
T78 |
1 |
|
T39 |
2 |
| others[2] |
1234 |
1 |
|
T9 |
17 |
|
T11 |
1 |
|
T78 |
1 |
| others[3] |
2032 |
1 |
|
T6 |
1 |
|
T9 |
32 |
|
T78 |
1 |
| false |
627 |
1 |
|
T9 |
10 |
|
T78 |
1 |
|
T43 |
1 |
| true |
307 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
105 |
1 |
|
T28 |
3 |
|
T233 |
1 |
|
T349 |
1 |
| others[1] |
105 |
1 |
|
T28 |
1 |
|
T218 |
1 |
|
T346 |
1 |
| others[2] |
96 |
1 |
|
T28 |
4 |
|
T218 |
1 |
|
T238 |
1 |
| others[3] |
173 |
1 |
|
T28 |
3 |
|
T346 |
1 |
|
T348 |
1 |
| false |
47 |
1 |
|
T28 |
2 |
|
T131 |
1 |
|
T154 |
2 |
| true |
6133 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
253 |
1 |
|
T28 |
1 |
|
T49 |
1 |
|
T47 |
1 |
| others[1] |
234 |
1 |
|
T59 |
1 |
|
T28 |
3 |
|
T95 |
1 |
| others[2] |
209 |
1 |
|
T218 |
1 |
|
T346 |
1 |
|
T349 |
1 |
| others[3] |
377 |
1 |
|
T2 |
1 |
|
T71 |
1 |
|
T33 |
1 |
| false |
111 |
1 |
|
T28 |
1 |
|
T131 |
5 |
|
T154 |
5 |
| true |
5475 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
998 |
1 |
|
T9 |
8 |
|
T78 |
1 |
|
T39 |
4 |
| others[1] |
1069 |
1 |
|
T6 |
1 |
|
T9 |
12 |
|
T39 |
3 |
| others[2] |
1039 |
1 |
|
T5 |
1 |
|
T9 |
7 |
|
T59 |
1 |
| others[3] |
1711 |
1 |
|
T3 |
1 |
|
T4 |
1 |
|
T9 |
15 |
| false |
534 |
1 |
|
T9 |
3 |
|
T78 |
1 |
|
T39 |
3 |
| true |
1308 |
1 |
|
T2 |
1 |
|
T12 |
1 |
|
T9 |
55 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
206 |
1 |
|
T2 |
1 |
|
T28 |
1 |
|
T346 |
1 |
| others[1] |
223 |
1 |
|
T28 |
1 |
|
T13 |
1 |
|
T50 |
1 |
| others[2] |
216 |
1 |
|
T71 |
1 |
|
T95 |
1 |
|
T218 |
1 |
| others[3] |
336 |
1 |
|
T33 |
1 |
|
T28 |
3 |
|
T183 |
1 |
| false |
115 |
1 |
|
T28 |
1 |
|
T131 |
7 |
|
T154 |
5 |
| true |
5563 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
226 |
1 |
|
T28 |
3 |
|
T349 |
1 |
|
T131 |
9 |
| others[1] |
199 |
1 |
|
T183 |
1 |
|
T18 |
2 |
|
T131 |
9 |
| others[2] |
228 |
1 |
|
T28 |
4 |
|
T18 |
1 |
|
T131 |
11 |
| others[3] |
380 |
1 |
|
T28 |
1 |
|
T174 |
1 |
|
T131 |
12 |
| false |
99 |
1 |
|
T218 |
1 |
|
T18 |
1 |
|
T131 |
9 |
| true |
5527 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1200 |
1 |
|
T9 |
20 |
|
T78 |
2 |
|
T39 |
2 |
| others[1] |
1268 |
1 |
|
T9 |
22 |
|
T78 |
2 |
|
T39 |
5 |
| others[2] |
1227 |
1 |
|
T9 |
22 |
|
T11 |
1 |
|
T39 |
3 |
| others[3] |
2004 |
1 |
|
T6 |
1 |
|
T9 |
20 |
|
T78 |
1 |
| false |
650 |
1 |
|
T9 |
16 |
|
T39 |
1 |
|
T43 |
2 |
| true |
310 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1249 |
1 |
|
T9 |
29 |
|
T78 |
1 |
|
T39 |
1 |
| others[1] |
1216 |
1 |
|
T9 |
19 |
|
T78 |
1 |
|
T39 |
1 |
| others[2] |
1241 |
1 |
|
T6 |
1 |
|
T9 |
14 |
|
T78 |
1 |
| others[3] |
2018 |
1 |
|
T3 |
1 |
|
T9 |
32 |
|
T17 |
1 |
| false |
634 |
1 |
|
T9 |
6 |
|
T11 |
1 |
|
T43 |
2 |
| true |
301 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
97 |
1 |
|
T28 |
4 |
|
T349 |
1 |
|
T238 |
1 |
| others[1] |
112 |
1 |
|
T28 |
1 |
|
T218 |
1 |
|
T183 |
1 |
| others[2] |
96 |
1 |
|
T233 |
1 |
|
T348 |
1 |
|
T131 |
1 |
| others[3] |
164 |
1 |
|
T28 |
7 |
|
T218 |
1 |
|
T50 |
1 |
| false |
58 |
1 |
|
T28 |
1 |
|
T49 |
1 |
|
T238 |
1 |
| true |
6132 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
223 |
1 |
|
T71 |
1 |
|
T28 |
1 |
|
T95 |
1 |
| others[1] |
211 |
1 |
|
T4 |
1 |
|
T28 |
3 |
|
T131 |
4 |
| others[2] |
251 |
1 |
|
T346 |
1 |
|
T131 |
11 |
|
T154 |
6 |
| others[3] |
379 |
1 |
|
T28 |
3 |
|
T233 |
1 |
|
T18 |
1 |
| false |
104 |
1 |
|
T28 |
1 |
|
T131 |
2 |
|
T241 |
1 |
| true |
5491 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
992 |
1 |
|
T3 |
1 |
|
T9 |
11 |
|
T17 |
1 |
| others[1] |
1040 |
1 |
|
T2 |
1 |
|
T9 |
16 |
|
T39 |
4 |
| others[2] |
1047 |
1 |
|
T6 |
1 |
|
T9 |
6 |
|
T78 |
3 |
| others[3] |
1722 |
1 |
|
T12 |
1 |
|
T9 |
15 |
|
T39 |
4 |
| false |
534 |
1 |
|
T5 |
1 |
|
T9 |
6 |
|
T59 |
1 |
| true |
1324 |
1 |
|
T4 |
1 |
|
T9 |
46 |
|
T71 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
237 |
1 |
|
T28 |
3 |
|
T218 |
1 |
|
T49 |
1 |
| others[1] |
212 |
1 |
|
T59 |
1 |
|
T17 |
1 |
|
T28 |
1 |
| others[2] |
231 |
1 |
|
T28 |
2 |
|
T131 |
14 |
|
T354 |
1 |
| others[3] |
387 |
1 |
|
T28 |
2 |
|
T13 |
1 |
|
T183 |
1 |
| false |
119 |
1 |
|
T71 |
1 |
|
T50 |
1 |
|
T131 |
6 |
| true |
5473 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
195 |
1 |
|
T238 |
1 |
|
T131 |
9 |
|
T146 |
1 |
| others[1] |
224 |
1 |
|
T28 |
1 |
|
T218 |
1 |
|
T183 |
1 |
| others[2] |
259 |
1 |
|
T28 |
1 |
|
T49 |
1 |
|
T18 |
1 |
| others[3] |
360 |
1 |
|
T28 |
4 |
|
T13 |
1 |
|
T95 |
1 |
| false |
105 |
1 |
|
T131 |
8 |
|
T154 |
4 |
|
T209 |
1 |
| true |
5516 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1191 |
1 |
|
T9 |
19 |
|
T78 |
1 |
|
T39 |
2 |
| others[1] |
1289 |
1 |
|
T6 |
1 |
|
T9 |
23 |
|
T11 |
1 |
| others[2] |
1196 |
1 |
|
T9 |
11 |
|
T78 |
2 |
|
T39 |
3 |
| others[3] |
1991 |
1 |
|
T9 |
35 |
|
T17 |
1 |
|
T78 |
1 |
| false |
660 |
1 |
|
T9 |
12 |
|
T78 |
1 |
|
T39 |
1 |
| true |
332 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1246 |
1 |
|
T9 |
16 |
|
T11 |
1 |
|
T78 |
3 |
| others[1] |
1194 |
1 |
|
T9 |
19 |
|
T39 |
2 |
|
T43 |
4 |
| others[2] |
1222 |
1 |
|
T9 |
20 |
|
T17 |
1 |
|
T39 |
2 |
| others[3] |
2092 |
1 |
|
T6 |
1 |
|
T9 |
38 |
|
T78 |
1 |
| false |
600 |
1 |
|
T9 |
7 |
|
T78 |
1 |
|
T39 |
1 |
| true |
305 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
90 |
1 |
|
T174 |
1 |
|
T131 |
5 |
|
T354 |
1 |
| others[1] |
115 |
1 |
|
T28 |
1 |
|
T218 |
1 |
|
T348 |
1 |
| others[2] |
129 |
1 |
|
T28 |
3 |
|
T346 |
1 |
|
T349 |
1 |
| others[3] |
169 |
1 |
|
T28 |
8 |
|
T233 |
1 |
|
T346 |
1 |
| false |
57 |
1 |
|
T28 |
1 |
|
T218 |
1 |
|
T238 |
1 |
| true |
6099 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
229 |
1 |
|
T33 |
1 |
|
T28 |
1 |
|
T218 |
2 |
| others[1] |
208 |
1 |
|
T28 |
1 |
|
T95 |
1 |
|
T84 |
1 |
| others[2] |
240 |
1 |
|
T28 |
2 |
|
T18 |
1 |
|
T131 |
9 |
| others[3] |
372 |
1 |
|
T28 |
3 |
|
T349 |
1 |
|
T131 |
14 |
| false |
146 |
1 |
|
T71 |
1 |
|
T346 |
1 |
|
T131 |
11 |
| true |
5464 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1007 |
1 |
|
T9 |
8 |
|
T78 |
1 |
|
T39 |
1 |
| others[1] |
1057 |
1 |
|
T6 |
1 |
|
T9 |
8 |
|
T78 |
1 |
| others[2] |
994 |
1 |
|
T9 |
12 |
|
T17 |
1 |
|
T39 |
6 |
| others[3] |
1715 |
1 |
|
T3 |
1 |
|
T9 |
16 |
|
T59 |
1 |
| false |
563 |
1 |
|
T9 |
7 |
|
T78 |
1 |
|
T39 |
2 |
| true |
1323 |
1 |
|
T2 |
1 |
|
T4 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
230 |
1 |
|
T71 |
1 |
|
T28 |
1 |
|
T13 |
1 |
| others[1] |
242 |
1 |
|
T28 |
2 |
|
T218 |
1 |
|
T49 |
1 |
| others[2] |
185 |
1 |
|
T28 |
2 |
|
T131 |
7 |
|
T145 |
1 |
| others[3] |
338 |
1 |
|
T17 |
1 |
|
T33 |
1 |
|
T28 |
4 |
| false |
119 |
1 |
|
T74 |
1 |
|
T131 |
2 |
|
T154 |
9 |
| true |
5545 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
233 |
1 |
|
T28 |
3 |
|
T183 |
1 |
|
T49 |
1 |
| others[1] |
222 |
1 |
|
T346 |
1 |
|
T190 |
1 |
|
T238 |
1 |
| others[2] |
235 |
1 |
|
T28 |
2 |
|
T18 |
1 |
|
T131 |
7 |
| others[3] |
381 |
1 |
|
T28 |
2 |
|
T13 |
1 |
|
T95 |
1 |
| false |
118 |
1 |
|
T33 |
1 |
|
T28 |
1 |
|
T50 |
1 |
| true |
5470 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1251 |
1 |
|
T9 |
20 |
|
T11 |
1 |
|
T39 |
3 |
| others[1] |
1208 |
1 |
|
T9 |
20 |
|
T78 |
1 |
|
T7 |
1 |
| others[2] |
1174 |
1 |
|
T6 |
1 |
|
T9 |
14 |
|
T78 |
1 |
| others[3] |
2071 |
1 |
|
T9 |
39 |
|
T78 |
3 |
|
T39 |
7 |
| false |
627 |
1 |
|
T9 |
7 |
|
T39 |
2 |
|
T43 |
2 |
| true |
328 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1191 |
1 |
|
T9 |
21 |
|
T78 |
2 |
|
T39 |
4 |
| others[1] |
1233 |
1 |
|
T9 |
19 |
|
T78 |
1 |
|
T43 |
4 |
| others[2] |
1247 |
1 |
|
T6 |
1 |
|
T9 |
27 |
|
T39 |
2 |
| others[3] |
2042 |
1 |
|
T9 |
28 |
|
T11 |
1 |
|
T78 |
1 |
| false |
642 |
1 |
|
T9 |
5 |
|
T78 |
1 |
|
T39 |
2 |
| true |
304 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
85 |
1 |
|
T28 |
2 |
|
T346 |
1 |
|
T131 |
1 |
| others[1] |
120 |
1 |
|
T28 |
1 |
|
T95 |
1 |
|
T349 |
1 |
| others[2] |
90 |
1 |
|
T33 |
1 |
|
T28 |
1 |
|
T348 |
1 |
| others[3] |
170 |
1 |
|
T28 |
7 |
|
T218 |
2 |
|
T49 |
1 |
| false |
57 |
1 |
|
T28 |
2 |
|
T233 |
1 |
|
T346 |
1 |
| true |
6137 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
245 |
1 |
|
T28 |
3 |
|
T84 |
1 |
|
T18 |
1 |
| others[1] |
229 |
1 |
|
T28 |
2 |
|
T13 |
1 |
|
T190 |
1 |
| others[2] |
197 |
1 |
|
T59 |
1 |
|
T33 |
1 |
|
T346 |
1 |
| others[3] |
367 |
1 |
|
T4 |
1 |
|
T71 |
1 |
|
T28 |
3 |
| false |
111 |
1 |
|
T2 |
1 |
|
T28 |
1 |
|
T218 |
1 |
| true |
5510 |
1 |
|
T3 |
1 |
|
T6 |
1 |
|
T5 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1046 |
1 |
|
T4 |
1 |
|
T9 |
7 |
|
T78 |
1 |
| others[1] |
1019 |
1 |
|
T3 |
1 |
|
T9 |
7 |
|
T39 |
2 |
| others[2] |
1060 |
1 |
|
T6 |
1 |
|
T9 |
6 |
|
T78 |
1 |
| others[3] |
1685 |
1 |
|
T9 |
16 |
|
T71 |
1 |
|
T78 |
3 |
| false |
507 |
1 |
|
T9 |
4 |
|
T39 |
3 |
|
T28 |
1 |
| true |
1342 |
1 |
|
T2 |
1 |
|
T5 |
1 |
|
T12 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
219 |
1 |
|
T28 |
1 |
|
T84 |
1 |
|
T14 |
1 |
| others[1] |
224 |
1 |
|
T28 |
2 |
|
T74 |
1 |
|
T49 |
1 |
| others[2] |
237 |
1 |
|
T233 |
1 |
|
T349 |
1 |
|
T147 |
1 |
| others[3] |
373 |
1 |
|
T17 |
1 |
|
T33 |
1 |
|
T28 |
4 |
| false |
119 |
1 |
|
T28 |
3 |
|
T238 |
1 |
|
T131 |
7 |
| true |
5487 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
209 |
1 |
|
T28 |
2 |
|
T18 |
1 |
|
T349 |
1 |
| others[1] |
251 |
1 |
|
T28 |
1 |
|
T18 |
1 |
|
T349 |
1 |
| others[2] |
221 |
1 |
|
T28 |
2 |
|
T50 |
1 |
|
T233 |
1 |
| others[3] |
366 |
1 |
|
T28 |
3 |
|
T13 |
1 |
|
T218 |
1 |
| false |
105 |
1 |
|
T84 |
1 |
|
T131 |
2 |
|
T148 |
1 |
| true |
5507 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T6 |
1 |
Summary for Variable cp_value
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| User Defined Bins |
6 |
0 |
6 |
100.00 |
User Defined Bins for cp_value
Bins
| NAME | COUNT | AT LEAST | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| others[0] |
1213 |
1 |
|
T9 |
24 |
|
T39 |
6 |
|
T43 |
4 |
| others[1] |
1225 |
1 |
|
T9 |
16 |
|
T78 |
1 |
|
T39 |
1 |
| others[2] |
1189 |
1 |
|
T9 |
19 |
|
T78 |
2 |
|
T39 |
3 |
| others[3] |
2083 |
1 |
|
T6 |
1 |
|
T9 |
32 |
|
T11 |
1 |
| false |
610 |
1 |
|
T9 |
9 |
|
T43 |
1 |
|
T27 |
3 |
| true |
339 |
1 |
|
T2 |
1 |
|
T3 |
1 |
|
T4 |
1 |
| 0% |
10% |
20% |
30% |
40% |
50% |
60% |
70% |
80% |
90% |
100% |