Summary for Variable intr_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14863810 |
1 |
|
|
T1 |
1 |
|
T2 |
14 |
|
T3 |
1 |
| auto[1] |
11245205 |
1 |
|
|
T1 |
5 |
|
T2 |
16 |
|
T7 |
1 |
Summary for Variable intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for intr_state
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
21483895 |
1 |
|
|
T1 |
5 |
|
T2 |
30 |
|
T3 |
1 |
| auto[1] |
4625120 |
1 |
|
|
T1 |
1 |
|
T4 |
5 |
|
T5 |
5 |
Summary for Variable type_ctrl_en
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
| Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for type_ctrl_en
Bins
| NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[0] |
14499150 |
1 |
|
|
T1 |
3 |
|
T2 |
30 |
|
T3 |
1 |
| auto[1] |
11609865 |
1 |
|
|
T1 |
3 |
|
T7 |
3 |
|
T9 |
3 |
Summary for Cross cp_cross_type_en_state
Samples crossed: type_ctrl_en intr_en intr_state
| CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
| TOTAL |
4 |
0 |
4 |
100.00 |
|
| Automatically Generated Cross Bins |
4 |
0 |
4 |
100.00 |
|
| User Defined Cross Bins |
0 |
0 |
0 |
|
|
Automatically Generated Cross Bins for cp_cross_type_en_state
Bins
| type_ctrl_en | intr_en | intr_state | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
| auto[1] |
auto[0] |
auto[0] |
3589620 |
1 |
|
|
T7 |
2 |
|
T9 |
2 |
|
T10 |
2 |
| auto[1] |
auto[0] |
auto[1] |
2334560 |
1 |
|
|
T4 |
3 |
|
T5 |
3 |
|
T6 |
3 |
| auto[1] |
auto[1] |
auto[0] |
3395125 |
1 |
|
|
T1 |
2 |
|
T7 |
1 |
|
T9 |
1 |
| auto[1] |
auto[1] |
auto[1] |
2290560 |
1 |
|
|
T1 |
1 |
|
T4 |
2 |
|
T5 |
2 |
User Defined Cross Bins for cp_cross_type_en_state
Excluded/Illegal bins
| NAME | COUNT | STATUS |
| intr_type_disabled |
0 |
Excluded |