GPIO Simulation Results

Wednesday November 22 2023 20:02:38 UTC

GitHub Revision: 4002b28ec4

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 56541452733628775295814943325285397402671097056517970046183331126493552547969

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke gpio_smoke 1.580s 112.796us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.630s 112.796us 50 50 100.00
gpio_smoke_en_cdc_prim 1.480s 115.064us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.590s 115.064us 50 50 100.00
V1 csr_hw_reset gpio_csr_hw_reset 0.680s 31.279us 5 5 100.00
V1 csr_rw gpio_csr_rw 0.800s 22.994us 20 20 100.00
V1 csr_bit_bash gpio_csr_bit_bash 3.270s 446.472us 5 5 100.00
V1 csr_aliasing gpio_csr_aliasing 0.910s 53.172us 5 5 100.00
V1 csr_mem_rw_with_rand_reset gpio_csr_mem_rw_with_rand_reset 0.980s 50.029us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr gpio_csr_rw 0.800s 22.994us 20 20 100.00
gpio_csr_aliasing 0.910s 53.172us 5 5 100.00
V1 TOTAL 255 255 100.00
V2 direct_and_masked_out gpio_random_dout_din 1.490s 81.279us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.360s 81.279us 50 50 100.00
V2 out_in_regs_read_write gpio_dout_din_regs_random_rw 1.050s 57.922us 50 50 100.00
V2 gpio_interrupt_programming gpio_intr_rand_pgm 1.520s 119.314us 50 50 100.00
V2 random_interrupt_trigger gpio_rand_intr_trigger 3.100s 228.921us 50 50 100.00
V2 interrupt_and_noise_filter gpio_intr_with_filter_rand_intr_event 3.350s 134.636us 50 50 100.00
V2 noise_filter_stress gpio_filter_stress 23.430s 1.136ms 50 50 100.00
V2 regs_long_reads_and_writes gpio_random_long_reg_writes_reg_reads 5.490s 572.864us 50 50 100.00
V2 full_random gpio_full_random 1.190s 137.439us 50 50 100.00
V2 stress_all gpio_stress_all 2.994m 21.105ms 50 50 100.00
V2 alert_test gpio_alert_test 0.770s 22.440us 50 50 100.00
V2 intr_test gpio_intr_test 0.890s 25.976us 50 50 100.00
V2 tl_d_oob_addr_access gpio_tl_errors 3.000s 245.206us 20 20 100.00
V2 tl_d_illegal_access gpio_tl_errors 3.000s 245.206us 20 20 100.00
V2 tl_d_outstanding_access gpio_csr_rw 0.800s 22.994us 20 20 100.00
gpio_same_csr_outstanding 0.840s 49.261us 20 20 100.00
gpio_csr_aliasing 0.910s 53.172us 5 5 100.00
gpio_csr_hw_reset 0.680s 31.279us 5 5 100.00
V2 tl_d_partial_access gpio_csr_rw 0.800s 22.994us 20 20 100.00
gpio_same_csr_outstanding 0.840s 49.261us 20 20 100.00
gpio_csr_aliasing 0.910s 53.172us 5 5 100.00
gpio_csr_hw_reset 0.680s 31.279us 5 5 100.00
V2 TOTAL 640 640 100.00
V2S tl_intg_err gpio_tl_intg_err 1.620s 185.439us 20 20 100.00
gpio_sec_cm 1.000s 134.886us 5 5 100.00
V2S sec_cm_bus_integrity gpio_tl_intg_err 1.620s 185.439us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 stress_all_with_rand_reset gpio_stress_all_with_rand_reset 19.455m 133.069ms 50 50 100.00
V3 TOTAL 50 50 100.00
TOTAL 970 970 100.00

Testplan Progress

Items Total Written Passing Progress
V1 9 9 9 100.00
V2 14 14 14 100.00
V2S 2 2 2 100.00
V3 1 1 1 100.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
98.50 99.06 98.64 97.88 -- 99.60 95.82 99.97

Past Results