GPIO Simulation Results

Tuesday May 30 2023 07:03:17 UTC

GitHub Revision: f8b3c19a2

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 1284268927

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke gpio_smoke 1.430s 259.491us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.450s 176.877us 50 50 100.00
V1 csr_hw_reset gpio_csr_hw_reset 0.640s 37.938us 5 5 100.00
V1 csr_rw gpio_csr_rw 0.690s 50.372us 20 20 100.00
V1 csr_bit_bash gpio_csr_bit_bash 3.300s 255.641us 5 5 100.00
V1 csr_aliasing gpio_csr_aliasing 0.840s 32.343us 5 5 100.00
V1 csr_mem_rw_with_rand_reset gpio_csr_mem_rw_with_rand_reset 1.820s 34.133us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr gpio_csr_rw 0.690s 50.372us 20 20 100.00
gpio_csr_aliasing 0.840s 32.343us 5 5 100.00
V1 TOTAL 155 155 100.00
V2 direct_and_masked_out gpio_random_dout_din 1.430s 125.325us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.320s 55.605us 50 50 100.00
V2 out_in_regs_read_write gpio_dout_din_regs_random_rw 1.050s 115.652us 50 50 100.00
V2 gpio_interrupt_programming gpio_intr_rand_pgm 1.360s 55.641us 50 50 100.00
V2 random_interrupt_trigger gpio_rand_intr_trigger 3.430s 126.930us 50 50 100.00
V2 interrupt_and_noise_filter gpio_intr_with_filter_rand_intr_event 3.700s 96.104us 50 50 100.00
V2 noise_filter_stress gpio_filter_stress 27.470s 7.423ms 50 50 100.00
V2 regs_long_reads_and_writes gpio_random_long_reg_writes_reg_reads 6.630s 2.894ms 50 50 100.00
V2 full_random gpio_full_random 1.100s 388.598us 50 50 100.00
V2 stress_all gpio_stress_all 3.836m 108.631ms 50 50 100.00
V2 alert_test gpio_alert_test 0.630s 13.407us 50 50 100.00
V2 intr_test gpio_intr_test 0.670s 47.664us 28 50 56.00
V2 tl_d_oob_addr_access gpio_tl_errors 3.320s 169.630us 20 20 100.00
V2 tl_d_illegal_access gpio_tl_errors 3.320s 169.630us 20 20 100.00
V2 tl_d_outstanding_access gpio_csr_rw 0.690s 50.372us 20 20 100.00
gpio_same_csr_outstanding 0.870s 36.717us 20 20 100.00
gpio_csr_aliasing 0.840s 32.343us 5 5 100.00
gpio_csr_hw_reset 0.640s 37.938us 5 5 100.00
V2 tl_d_partial_access gpio_csr_rw 0.690s 50.372us 20 20 100.00
gpio_same_csr_outstanding 0.870s 36.717us 20 20 100.00
gpio_csr_aliasing 0.840s 32.343us 5 5 100.00
gpio_csr_hw_reset 0.640s 37.938us 5 5 100.00
V2 TOTAL 618 640 96.56
V2S tl_intg_err gpio_tl_intg_err 1.510s 638.229us 20 20 100.00
gpio_sec_cm 1.060s 636.244us 5 5 100.00
V2S sec_cm_bus_integrity gpio_tl_intg_err 1.510s 638.229us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 stress_all_with_rand_reset gpio_stress_all_with_rand_reset 34.874m 120.423ms 50 50 100.00
V3 TOTAL 50 50 100.00
TOTAL 848 870 97.47

Testplan Progress

Items Total Written Passing Progress
V1 7 7 7 100.00
V2 14 14 13 92.86
V2S 2 2 2 100.00
V3 1 1 1 100.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
99.61 99.07 99.10 100.00 -- 99.80 99.68 100.00

Failure Buckets

Past Results