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Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3435563 1 T42 80 T43 134 T44 168
auto[1] 3009493 1 T42 78 T43 114 T44 170


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4051354 1 T42 90 T43 130 T44 178
auto[1] 2393702 1 T42 68 T43 118 T44 160


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2228985 1 T42 48 T43 71 T44 87
auto[0] auto[1] 1206578 1 T42 32 T43 63 T44 81
auto[1] auto[0] 1822369 1 T42 42 T43 59 T44 91
auto[1] auto[1] 1187124 1 T42 36 T43 55 T44 79


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3438596 1 T42 70 T43 122 T44 154
auto[1] 3006460 1 T42 88 T43 126 T44 184


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4055877 1 T42 69 T43 129 T44 154
auto[1] 2389179 1 T42 89 T43 119 T44 184


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2233293 1 T42 28 T43 57 T44 73
auto[0] auto[1] 1205303 1 T42 42 T43 65 T44 81
auto[1] auto[0] 1822584 1 T42 41 T43 72 T44 81
auto[1] auto[1] 1183876 1 T42 47 T43 54 T44 103


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3435004 1 T42 92 T43 120 T44 192
auto[1] 3010052 1 T42 66 T43 128 T44 146


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4057161 1 T42 87 T43 117 T44 173
auto[1] 2387895 1 T42 71 T43 131 T44 165


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2231566 1 T42 53 T43 50 T44 100
auto[0] auto[1] 1203438 1 T42 39 T43 70 T44 92
auto[1] auto[0] 1825595 1 T42 34 T43 67 T44 73
auto[1] auto[1] 1184457 1 T42 32 T43 61 T44 73


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3437854 1 T42 64 T43 106 T44 162
auto[1] 3007202 1 T42 94 T43 142 T44 176


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4057726 1 T42 87 T43 120 T44 179
auto[1] 2387330 1 T42 71 T43 128 T44 159


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2234802 1 T42 38 T43 53 T44 86
auto[0] auto[1] 1203052 1 T42 26 T43 53 T44 76
auto[1] auto[0] 1822924 1 T42 49 T43 67 T44 93
auto[1] auto[1] 1184278 1 T42 45 T43 75 T44 83


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3437047 1 T42 80 T43 122 T44 144
auto[1] 3008009 1 T42 78 T43 126 T44 194


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4052652 1 T42 67 T43 122 T44 196
auto[1] 2392404 1 T42 91 T43 126 T44 142


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2230904 1 T42 37 T43 58 T44 82
auto[0] auto[1] 1206143 1 T42 43 T43 64 T44 62
auto[1] auto[0] 1821748 1 T42 30 T43 64 T44 114
auto[1] auto[1] 1186261 1 T42 48 T43 62 T44 80


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3435097 1 T42 48 T43 146 T44 156
auto[1] 3009959 1 T42 110 T43 102 T44 182


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4050379 1 T42 72 T43 137 T44 190
auto[1] 2394677 1 T42 86 T43 111 T44 148


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2229343 1 T42 20 T43 80 T44 90
auto[0] auto[1] 1205754 1 T42 28 T43 66 T44 66
auto[1] auto[0] 1821036 1 T42 52 T43 57 T44 100
auto[1] auto[1] 1188923 1 T42 58 T43 45 T44 82


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3433897 1 T42 82 T43 142 T44 168
auto[1] 3011159 1 T42 76 T43 106 T44 170


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4052450 1 T42 72 T43 125 T44 161
auto[1] 2392606 1 T42 86 T43 123 T44 177


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2229773 1 T42 35 T43 78 T44 89
auto[0] auto[1] 1204124 1 T42 47 T43 64 T44 79
auto[1] auto[0] 1822677 1 T42 37 T43 47 T44 72
auto[1] auto[1] 1188482 1 T42 39 T43 59 T44 98


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3433270 1 T42 76 T43 134 T44 150
auto[1] 3011786 1 T42 82 T43 114 T44 188


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4051441 1 T42 69 T43 110 T44 167
auto[1] 2393615 1 T42 89 T43 138 T44 171


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2229005 1 T42 33 T43 54 T44 74
auto[0] auto[1] 1204265 1 T42 43 T43 80 T44 76
auto[1] auto[0] 1822436 1 T42 36 T43 56 T44 93
auto[1] auto[1] 1189350 1 T42 46 T43 58 T44 95


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3435704 1 T42 74 T43 130 T44 178
auto[1] 3009352 1 T42 84 T43 118 T44 160


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4062971 1 T42 67 T43 122 T44 155
auto[1] 2382085 1 T42 91 T43 126 T44 183


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2234957 1 T42 28 T43 66 T44 77
auto[0] auto[1] 1200747 1 T42 46 T43 64 T44 101
auto[1] auto[0] 1828014 1 T42 39 T43 56 T44 78
auto[1] auto[1] 1181338 1 T42 45 T43 62 T44 82


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3439516 1 T42 84 T43 122 T44 164
auto[1] 3005540 1 T42 74 T43 126 T44 174


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4068561 1 T42 90 T43 120 T44 189
auto[1] 2376495 1 T42 68 T43 128 T44 149


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2241278 1 T42 45 T43 61 T44 89
auto[0] auto[1] 1198238 1 T42 39 T43 61 T44 75
auto[1] auto[0] 1827283 1 T42 45 T43 59 T44 100
auto[1] auto[1] 1178257 1 T42 29 T43 67 T44 74


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3434478 1 T42 80 T43 150 T44 164
auto[1] 3010578 1 T42 78 T43 98 T44 174


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4066343 1 T42 77 T43 126 T44 162
auto[1] 2378713 1 T42 81 T43 122 T44 176


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2238278 1 T42 38 T43 73 T44 79
auto[0] auto[1] 1196200 1 T42 42 T43 77 T44 85
auto[1] auto[0] 1828065 1 T42 39 T43 53 T44 83
auto[1] auto[1] 1182513 1 T42 39 T43 45 T44 91


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3441166 1 T42 76 T43 128 T44 182
auto[1] 3003890 1 T42 82 T43 120 T44 156


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4064680 1 T42 79 T43 133 T44 156
auto[1] 2380376 1 T42 79 T43 115 T44 182


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2240586 1 T42 39 T43 67 T44 90
auto[0] auto[1] 1200580 1 T42 37 T43 61 T44 92
auto[1] auto[0] 1824094 1 T42 40 T43 66 T44 66
auto[1] auto[1] 1179796 1 T42 42 T43 54 T44 90


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3440231 1 T42 84 T43 140 T44 176
auto[1] 3004825 1 T42 74 T43 108 T44 162


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4055414 1 T42 77 T43 123 T44 165
auto[1] 2389642 1 T42 81 T43 125 T44 173


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2235698 1 T42 39 T43 66 T44 86
auto[0] auto[1] 1204533 1 T42 45 T43 74 T44 90
auto[1] auto[0] 1819716 1 T42 38 T43 57 T44 79
auto[1] auto[1] 1185109 1 T42 36 T43 51 T44 83


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3435710 1 T42 60 T43 134 T44 172
auto[1] 3009346 1 T42 98 T43 114 T44 166


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4067870 1 T42 85 T43 132 T44 156
auto[1] 2377186 1 T42 73 T43 116 T44 182


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2238894 1 T42 36 T43 72 T44 79
auto[0] auto[1] 1196816 1 T42 24 T43 62 T44 93
auto[1] auto[0] 1828976 1 T42 49 T43 60 T44 77
auto[1] auto[1] 1180370 1 T42 49 T43 54 T44 89


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3437415 1 T42 66 T43 124 T44 148
auto[1] 3007641 1 T42 92 T43 124 T44 190


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4065448 1 T42 81 T43 118 T44 168
auto[1] 2379608 1 T42 77 T43 130 T44 170


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2238259 1 T42 33 T43 53 T44 78
auto[0] auto[1] 1199156 1 T42 33 T43 71 T44 70
auto[1] auto[0] 1827189 1 T42 48 T43 65 T44 90
auto[1] auto[1] 1180452 1 T42 44 T43 59 T44 100


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3432173 1 T42 66 T43 124 T44 182
auto[1] 3012883 1 T42 92 T43 124 T44 156


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4063717 1 T42 79 T43 125 T44 171
auto[1] 2381339 1 T42 79 T43 123 T44 167


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2234425 1 T42 32 T43 65 T44 99
auto[0] auto[1] 1197748 1 T42 34 T43 59 T44 83
auto[1] auto[0] 1829292 1 T42 47 T43 60 T44 72
auto[1] auto[1] 1183591 1 T42 45 T43 64 T44 84


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3437965 1 T42 80 T43 116 T44 174
auto[1] 3007091 1 T42 78 T43 132 T44 164


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4066033 1 T42 74 T43 124 T44 147
auto[1] 2379023 1 T42 84 T43 124 T44 191


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2239410 1 T42 42 T43 59 T44 78
auto[0] auto[1] 1198555 1 T42 38 T43 57 T44 96
auto[1] auto[0] 1826623 1 T42 32 T43 65 T44 69
auto[1] auto[1] 1180468 1 T42 46 T43 67 T44 95


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3436132 1 T42 88 T43 104 T44 186
auto[1] 3008924 1 T42 70 T43 144 T44 152


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4066436 1 T42 84 T43 132 T44 167
auto[1] 2378620 1 T42 74 T43 116 T44 171


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2239749 1 T42 48 T43 52 T44 89
auto[0] auto[1] 1196383 1 T42 40 T43 52 T44 97
auto[1] auto[0] 1826687 1 T42 36 T43 80 T44 78
auto[1] auto[1] 1182237 1 T42 34 T43 64 T44 74


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3437121 1 T42 70 T43 132 T44 170
auto[1] 3007935 1 T42 88 T43 116 T44 168


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4062293 1 T42 89 T43 105 T44 157
auto[1] 2382763 1 T42 69 T43 143 T44 181


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2237837 1 T42 38 T43 57 T44 82
auto[0] auto[1] 1199284 1 T42 32 T43 75 T44 88
auto[1] auto[0] 1824456 1 T42 51 T43 48 T44 75
auto[1] auto[1] 1183479 1 T42 37 T43 68 T44 93


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3438668 1 T42 84 T43 112 T44 174
auto[1] 3006388 1 T42 74 T43 136 T44 164


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4064634 1 T42 76 T43 150 T44 157
auto[1] 2380422 1 T42 82 T43 98 T44 181


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2239231 1 T42 47 T43 65 T44 91
auto[0] auto[1] 1199437 1 T42 37 T43 47 T44 83
auto[1] auto[0] 1825403 1 T42 29 T43 85 T44 66
auto[1] auto[1] 1180985 1 T42 45 T43 51 T44 98


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3437078 1 T42 78 T43 114 T44 192
auto[1] 3007978 1 T42 80 T43 134 T44 146


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4062247 1 T42 68 T43 124 T44 152
auto[1] 2382809 1 T42 90 T43 124 T44 186


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2237461 1 T42 37 T43 49 T44 86
auto[0] auto[1] 1199617 1 T42 41 T43 65 T44 106
auto[1] auto[0] 1824786 1 T42 31 T43 75 T44 66
auto[1] auto[1] 1183192 1 T42 49 T43 59 T44 80


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3440209 1 T42 82 T43 130 T44 174
auto[1] 3004847 1 T42 76 T43 118 T44 164


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4062183 1 T42 74 T43 128 T44 155
auto[1] 2382873 1 T42 84 T43 120 T44 183


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2239633 1 T42 35 T43 66 T44 81
auto[0] auto[1] 1200576 1 T42 47 T43 64 T44 93
auto[1] auto[0] 1822550 1 T42 39 T43 62 T44 74
auto[1] auto[1] 1182297 1 T42 37 T43 56 T44 90


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3432556 1 T42 68 T43 122 T44 160
auto[1] 3012500 1 T42 90 T43 126 T44 178


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4063548 1 T42 72 T43 139 T44 157
auto[1] 2381508 1 T42 86 T43 109 T44 181


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2234925 1 T42 29 T43 66 T44 69
auto[0] auto[1] 1197631 1 T42 39 T43 56 T44 91
auto[1] auto[0] 1828623 1 T42 43 T43 73 T44 88
auto[1] auto[1] 1183877 1 T42 47 T43 53 T44 90


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3436127 1 T42 82 T43 122 T44 154
auto[1] 3008929 1 T42 76 T43 126 T44 184


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4052230 1 T42 77 T43 139 T44 172
auto[1] 2392826 1 T42 81 T43 109 T44 166


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2231473 1 T42 41 T43 72 T44 80
auto[0] auto[1] 1204654 1 T42 41 T43 50 T44 74
auto[1] auto[0] 1820757 1 T42 36 T43 67 T44 92
auto[1] auto[1] 1188172 1 T42 40 T43 59 T44 92


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3432796 1 T42 68 T43 124 T44 170
auto[1] 3012260 1 T42 90 T43 124 T44 168


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4065341 1 T42 86 T43 125 T44 175
auto[1] 2379715 1 T42 72 T43 123 T44 163


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2236664 1 T42 28 T43 64 T44 86
auto[0] auto[1] 1196132 1 T42 40 T43 60 T44 84
auto[1] auto[0] 1828677 1 T42 58 T43 61 T44 89
auto[1] auto[1] 1183583 1 T42 32 T43 63 T44 79


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 3432791 1 T42 80 T43 120 T44 156
auto[1] 3012265 1 T42 78 T43 128 T44 182


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 4067057 1 T42 88 T43 128 T44 165
auto[1] 2377999 1 T42 70 T43 120 T44 173


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1cp_var2COUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 2234830 1 T42 43 T43 64 T44 79
auto[0] auto[1] 1197961 1 T42 37 T43 56 T44 77
auto[1] auto[0] 1832227 1 T42 45 T43 64 T44 86
auto[1] auto[1] 1180038 1 T42 33 T43 64 T44 96

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%