Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 4429624 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 20561403 1 T22 59455 T23 44484 T24 273



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 9807961 1 T22 33278 T23 25346 T24 63
values[0x0] 7446977 1 T22 21623 T23 15907 T24 119
values[0x1] 7736089 1 T22 21236 T23 15878 T24 128



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 3383069 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 21607958 1 T22 62826 T23 47010 T24 280



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 101284 1 T22 303 T23 84 T25 9
valid_sources[0x01] 91772 1 T22 313 T23 413 T25 6
valid_sources[0x02] 87969 1 T22 233 T23 226 T25 2
valid_sources[0x03] 93101 1 T22 330 T23 163 T25 2
valid_sources[0x04] 98168 1 T22 292 T24 18 T25 7
valid_sources[0x05] 93133 1 T22 302 T23 234 T24 27
valid_sources[0x06] 93082 1 T22 299 T23 61 T25 6
valid_sources[0x07] 96072 1 T22 285 T23 48 T25 8
valid_sources[0x08] 93389 1 T22 277 T23 596 T25 12
valid_sources[0x09] 94129 1 T22 260 T23 449 T25 8
valid_sources[0x0a] 91204 1 T22 287 T23 558 T25 3
valid_sources[0x0b] 103835 1 T22 319 T23 99 T25 6
valid_sources[0x0c] 97903 1 T22 294 T23 377 T25 3
valid_sources[0x0d] 88629 1 T22 296 T23 96 T25 5
valid_sources[0x0e] 240138 1 T22 316 T23 199 T25 13
valid_sources[0x0f] 106590 1 T22 314 T23 208 T25 8
valid_sources[0x10] 98173 1 T22 342 T23 300 T24 34
valid_sources[0x11] 88018 1 T22 295 T23 141 T25 6
valid_sources[0x12] 97784 1 T22 255 T23 227 T25 10
valid_sources[0x13] 94146 1 T22 321 T23 262 T25 7
valid_sources[0x14] 92430 1 T22 267 T23 235 T25 2
valid_sources[0x15] 182087 1 T22 323 T23 187 T25 7
valid_sources[0x16] 94159 1 T22 293 T23 226 T25 3
valid_sources[0x17] 91476 1 T22 305 T23 251 T25 2
valid_sources[0x18] 91893 1 T22 299 T23 91 T25 11
valid_sources[0x19] 93209 1 T22 279 T23 246 T25 10
valid_sources[0x1a] 90391 1 T22 279 T23 264 T25 7
valid_sources[0x1b] 101233 1 T22 289 T23 279 T25 4
valid_sources[0x1c] 90555 1 T22 296 T23 167 T25 7
valid_sources[0x1d] 90209 1 T22 303 T23 75 T24 1
valid_sources[0x1e] 95762 1 T22 321 T23 115 T25 4
valid_sources[0x1f] 105262 1 T22 294 T23 123 T25 7
valid_sources[0x20] 97500 1 T22 309 T23 253 T25 5
valid_sources[0x21] 91765 1 T22 309 T23 139 T24 50
valid_sources[0x22] 102807 1 T22 305 T23 252 T25 8
valid_sources[0x23] 105339 1 T22 339 T23 158 T25 7
valid_sources[0x24] 98793 1 T22 288 T23 81 T25 4
valid_sources[0x25] 94247 1 T22 354 T23 104 T25 2
valid_sources[0x26] 99973 1 T22 285 T23 221 T25 7
valid_sources[0x27] 93424 1 T22 298 T23 107 T25 9
valid_sources[0x28] 106456 1 T22 292 T23 131 T25 9
valid_sources[0x29] 92589 1 T22 303 T23 211 T25 9
valid_sources[0x2a] 93813 1 T22 286 T23 436 T25 17
valid_sources[0x2b] 100783 1 T22 256 T23 139 T24 20
valid_sources[0x2c] 89979 1 T22 349 T23 35 T25 6
valid_sources[0x2d] 92465 1 T22 308 T23 8 T24 18
valid_sources[0x2e] 90645 1 T22 295 T23 154 T25 7
valid_sources[0x2f] 95721 1 T22 275 T23 255 T25 3
valid_sources[0x30] 90238 1 T22 345 T23 291 T25 7
valid_sources[0x31] 86984 1 T22 297 T23 65 T24 39
valid_sources[0x32] 103850 1 T22 308 T23 65 T25 9
valid_sources[0x33] 96246 1 T22 291 T23 174 T25 7
valid_sources[0x34] 92263 1 T22 270 T23 427 T25 12
valid_sources[0x35] 91998 1 T22 310 T23 391 T25 9
valid_sources[0x36] 94626 1 T22 300 T23 221 T25 12
valid_sources[0x37] 89951 1 T22 313 T23 104 T25 9
valid_sources[0x38] 105030 1 T22 276 T23 307 T25 7
valid_sources[0x39] 88161 1 T22 303 T23 187 T25 7
valid_sources[0x3a] 96437 1 T22 266 T23 102 T24 15
valid_sources[0x3b] 92607 1 T22 287 T23 279 T25 8
valid_sources[0x3c] 90779 1 T22 316 T23 289 T25 11
valid_sources[0x3d] 91936 1 T22 282 T23 74 T25 7
valid_sources[0x3e] 89890 1 T22 290 T25 10 T11 17
valid_sources[0x3f] 90574 1 T22 290 T23 63 T25 7
valid_sources[0x40] 90307 1 T22 328 T23 413 T25 6
valid_sources[0x41] 94404 1 T22 289 T23 397 T25 8
valid_sources[0x42] 99093 1 T22 298 T23 195 T25 5
valid_sources[0x43] 94858 1 T22 330 T23 312 T25 8
valid_sources[0x44] 90937 1 T22 286 T23 170 T25 4
valid_sources[0x45] 83237 1 T22 265 T23 275 T25 6
valid_sources[0x46] 98619 1 T22 286 T23 193 T25 5
valid_sources[0x47] 90869 1 T22 282 T23 130 T24 2
valid_sources[0x48] 89618 1 T22 294 T23 142 T25 10
valid_sources[0x49] 94542 1 T22 272 T23 173 T25 3
valid_sources[0x4a] 87309 1 T22 353 T23 175 T25 6
valid_sources[0x4b] 95267 1 T22 315 T23 139 T25 9
valid_sources[0x4c] 96336 1 T22 302 T23 177 T25 7
valid_sources[0x4d] 102340 1 T22 298 T23 111 T25 10
valid_sources[0x4e] 93057 1 T22 276 T23 345 T24 14
valid_sources[0x4f] 92352 1 T22 267 T23 152 T25 5
valid_sources[0x50] 91905 1 T22 295 T23 264 T25 4
valid_sources[0x51] 93143 1 T22 339 T23 139 T25 5
valid_sources[0x52] 96939 1 T22 303 T23 526 T25 2
valid_sources[0x53] 91872 1 T22 210 T23 48 T25 7
valid_sources[0x54] 94537 1 T22 304 T23 714 T25 10
valid_sources[0x55] 88651 1 T22 299 T23 605 T25 7
valid_sources[0x56] 94186 1 T22 296 T23 345 T25 9
valid_sources[0x57] 89537 1 T22 293 T23 152 T25 10
valid_sources[0x58] 91917 1 T22 269 T23 436 T25 7
valid_sources[0x59] 96502 1 T22 336 T23 154 T25 5
valid_sources[0x5a] 106871 1 T22 322 T25 6 T14 13
valid_sources[0x5b] 93171 1 T22 293 T23 219 T25 5
valid_sources[0x5c] 90412 1 T22 281 T23 60 T25 3
valid_sources[0x5d] 88848 1 T22 289 T23 388 T24 15
valid_sources[0x5e] 92189 1 T22 306 T23 85 T25 12
valid_sources[0x5f] 87369 1 T22 324 T23 127 T25 14
valid_sources[0x60] 93188 1 T22 293 T23 168 T25 16
valid_sources[0x61] 89372 1 T22 303 T23 12 T25 11
valid_sources[0x62] 89251 1 T22 286 T23 126 T25 11
valid_sources[0x63] 99307 1 T22 299 T23 324 T25 6
valid_sources[0x64] 97794 1 T22 292 T23 228 T25 6
valid_sources[0x65] 100795 1 T22 284 T23 142 T24 14
valid_sources[0x66] 105279 1 T22 277 T23 371 T25 7
valid_sources[0x67] 96556 1 T22 290 T23 410 T25 8
valid_sources[0x68] 83422 1 T22 305 T23 146 T25 4
valid_sources[0x69] 99687 1 T22 270 T23 121 T25 7
valid_sources[0x6a] 97757 1 T22 311 T23 115 T25 4
valid_sources[0x6b] 94511 1 T22 303 T23 303 T25 5
valid_sources[0x6c] 104487 1 T22 299 T23 404 T25 7
valid_sources[0x6d] 88565 1 T22 304 T23 141 T25 6
valid_sources[0x6e] 94997 1 T22 305 T23 349 T25 7
valid_sources[0x6f] 240913 1 T22 298 T23 420 T25 6
valid_sources[0x70] 93975 1 T22 273 T23 20 T25 15
valid_sources[0x71] 90576 1 T22 296 T23 506 T25 6
valid_sources[0x72] 98514 1 T22 300 T23 145 T25 10
valid_sources[0x73] 86098 1 T22 232 T23 273 T25 4
valid_sources[0x74] 97142 1 T22 304 T23 61 T25 14
valid_sources[0x75] 100286 1 T22 307 T23 207 T25 8
valid_sources[0x76] 88282 1 T22 270 T23 199 T25 6
valid_sources[0x77] 94993 1 T22 283 T23 181 T25 7
valid_sources[0x78] 108920 1 T22 284 T23 161 T25 10
valid_sources[0x79] 95544 1 T22 298 T23 85 T25 3
valid_sources[0x7a] 83857 1 T22 272 T23 87 T25 5
valid_sources[0x7b] 102357 1 T22 280 T23 170 T25 2
valid_sources[0x7c] 92411 1 T22 281 T23 226 T24 14
valid_sources[0x7d] 94940 1 T22 316 T23 372 T25 16
valid_sources[0x7e] 90237 1 T22 333 T23 331 T25 7
valid_sources[0x7f] 101551 1 T22 303 T23 214 T25 4
valid_sources[0x80] 94620 1 T22 313 T23 138 T25 7



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 5724274 1 T22 16596 T23 12699 T24 26
values[0x0] all_enables biggest_size 7418417 1 T22 21623 T23 15907 T24 119
values[0x1] all_enables biggest_size 7418712 1 T22 21236 T23 15878 T24 128

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%