T538 |
/workspace/coverage/default/22.gpio_random_long_reg_writes_reg_reads.1584569204 |
|
|
Mar 05 01:00:09 PM PST 24 |
Mar 05 01:00:12 PM PST 24 |
237681265 ps |
T539 |
/workspace/coverage/default/46.gpio_filter_stress.3611206395 |
|
|
Mar 05 01:01:21 PM PST 24 |
Mar 05 01:01:42 PM PST 24 |
1605482544 ps |
T540 |
/workspace/coverage/default/6.gpio_smoke_no_pullup_pulldown.1128763847 |
|
|
Mar 05 12:59:10 PM PST 24 |
Mar 05 12:59:11 PM PST 24 |
125686025 ps |
T541 |
/workspace/coverage/default/48.gpio_dout_din_regs_random_rw.296123919 |
|
|
Mar 05 01:01:26 PM PST 24 |
Mar 05 01:01:27 PM PST 24 |
29146998 ps |
T542 |
/workspace/coverage/default/25.gpio_dout_din_regs_random_rw.2705056372 |
|
|
Mar 05 01:00:16 PM PST 24 |
Mar 05 01:00:17 PM PST 24 |
112353004 ps |
T543 |
/workspace/coverage/default/31.gpio_full_random.3169895704 |
|
|
Mar 05 01:00:38 PM PST 24 |
Mar 05 01:00:39 PM PST 24 |
205242832 ps |
T544 |
/workspace/coverage/default/18.gpio_dout_din_regs_random_rw.2380523258 |
|
|
Mar 05 12:59:50 PM PST 24 |
Mar 05 12:59:51 PM PST 24 |
40990933 ps |
T545 |
/workspace/coverage/default/41.gpio_random_dout_din_no_pullup_pulldown.3351110131 |
|
|
Mar 05 01:01:11 PM PST 24 |
Mar 05 01:01:13 PM PST 24 |
315698913 ps |
T546 |
/workspace/coverage/default/36.gpio_full_random.3864796853 |
|
|
Mar 05 01:00:59 PM PST 24 |
Mar 05 01:01:00 PM PST 24 |
90530835 ps |
T547 |
/workspace/coverage/default/12.gpio_full_random.800113664 |
|
|
Mar 05 12:59:43 PM PST 24 |
Mar 05 12:59:44 PM PST 24 |
101164162 ps |
T548 |
/workspace/coverage/default/24.gpio_random_dout_din.2322317836 |
|
|
Mar 05 01:00:24 PM PST 24 |
Mar 05 01:00:25 PM PST 24 |
27877670 ps |
T549 |
/workspace/coverage/default/28.gpio_stress_all.1866680211 |
|
|
Mar 05 01:00:27 PM PST 24 |
Mar 05 01:03:52 PM PST 24 |
36563993258 ps |
T550 |
/workspace/coverage/default/37.gpio_intr_rand_pgm.2748834124 |
|
|
Mar 05 01:00:59 PM PST 24 |
Mar 05 01:01:00 PM PST 24 |
30507433 ps |
T551 |
/workspace/coverage/default/13.gpio_random_dout_din.222284870 |
|
|
Mar 05 12:59:41 PM PST 24 |
Mar 05 12:59:42 PM PST 24 |
24592817 ps |
T552 |
/workspace/coverage/default/45.gpio_alert_test.3352237733 |
|
|
Mar 05 01:01:22 PM PST 24 |
Mar 05 01:01:23 PM PST 24 |
37479280 ps |
T553 |
/workspace/coverage/default/2.gpio_stress_all_with_rand_reset.428619224 |
|
|
Mar 05 12:58:52 PM PST 24 |
Mar 05 01:12:51 PM PST 24 |
191643685120 ps |
T554 |
/workspace/coverage/default/45.gpio_random_long_reg_writes_reg_reads.524023240 |
|
|
Mar 05 01:01:20 PM PST 24 |
Mar 05 01:01:22 PM PST 24 |
188599531 ps |
T555 |
/workspace/coverage/default/40.gpio_dout_din_regs_random_rw.2545222411 |
|
|
Mar 05 01:01:12 PM PST 24 |
Mar 05 01:01:13 PM PST 24 |
32972482 ps |
T556 |
/workspace/coverage/default/27.gpio_rand_intr_trigger.1182904773 |
|
|
Mar 05 01:00:30 PM PST 24 |
Mar 05 01:00:33 PM PST 24 |
387697764 ps |
T557 |
/workspace/coverage/default/12.gpio_filter_stress.2711675596 |
|
|
Mar 05 12:59:44 PM PST 24 |
Mar 05 01:00:06 PM PST 24 |
2580457892 ps |
T558 |
/workspace/coverage/default/35.gpio_smoke.3315671557 |
|
|
Mar 05 01:00:48 PM PST 24 |
Mar 05 01:00:50 PM PST 24 |
152375731 ps |
T559 |
/workspace/coverage/default/49.gpio_stress_all.1642237978 |
|
|
Mar 05 01:01:27 PM PST 24 |
Mar 05 01:03:21 PM PST 24 |
8793831782 ps |
T560 |
/workspace/coverage/default/21.gpio_dout_din_regs_random_rw.1751232156 |
|
|
Mar 05 01:00:03 PM PST 24 |
Mar 05 01:00:04 PM PST 24 |
129408687 ps |
T561 |
/workspace/coverage/default/36.gpio_filter_stress.3052728207 |
|
|
Mar 05 01:01:04 PM PST 24 |
Mar 05 01:01:12 PM PST 24 |
670382825 ps |
T562 |
/workspace/coverage/default/6.gpio_alert_test.2591549194 |
|
|
Mar 05 12:59:08 PM PST 24 |
Mar 05 12:59:09 PM PST 24 |
13633358 ps |
T563 |
/workspace/coverage/default/43.gpio_filter_stress.2336897251 |
|
|
Mar 05 01:01:13 PM PST 24 |
Mar 05 01:01:23 PM PST 24 |
409169954 ps |
T564 |
/workspace/coverage/default/4.gpio_random_long_reg_writes_reg_reads.3944378474 |
|
|
Mar 05 12:58:59 PM PST 24 |
Mar 05 12:59:01 PM PST 24 |
30591130 ps |
T565 |
/workspace/coverage/default/25.gpio_filter_stress.1412277371 |
|
|
Mar 05 01:00:15 PM PST 24 |
Mar 05 01:00:21 PM PST 24 |
110739099 ps |
T566 |
/workspace/coverage/default/7.gpio_intr_rand_pgm.1103255184 |
|
|
Mar 05 12:59:10 PM PST 24 |
Mar 05 12:59:11 PM PST 24 |
34235082 ps |
T567 |
/workspace/coverage/default/2.gpio_intr_rand_pgm.1745254907 |
|
|
Mar 05 12:58:53 PM PST 24 |
Mar 05 12:58:54 PM PST 24 |
44762174 ps |
T568 |
/workspace/coverage/default/15.gpio_random_dout_din.889591926 |
|
|
Mar 05 12:59:44 PM PST 24 |
Mar 05 12:59:45 PM PST 24 |
58445086 ps |
T569 |
/workspace/coverage/default/14.gpio_random_dout_din.1196934718 |
|
|
Mar 05 12:59:44 PM PST 24 |
Mar 05 12:59:46 PM PST 24 |
31143768 ps |
T570 |
/workspace/coverage/default/43.gpio_stress_all.2997238689 |
|
|
Mar 05 01:01:13 PM PST 24 |
Mar 05 01:03:10 PM PST 24 |
4698166195 ps |
T571 |
/workspace/coverage/default/0.gpio_rand_intr_trigger.4119370602 |
|
|
Mar 05 12:58:41 PM PST 24 |
Mar 05 12:58:44 PM PST 24 |
406643286 ps |
T572 |
/workspace/coverage/default/47.gpio_intr_rand_pgm.2721931198 |
|
|
Mar 05 01:01:21 PM PST 24 |
Mar 05 01:01:23 PM PST 24 |
172159908 ps |
T573 |
/workspace/coverage/default/47.gpio_full_random.490809005 |
|
|
Mar 05 01:01:26 PM PST 24 |
Mar 05 01:01:27 PM PST 24 |
40723857 ps |
T574 |
/workspace/coverage/default/44.gpio_intr_with_filter_rand_intr_event.6533771 |
|
|
Mar 05 01:01:13 PM PST 24 |
Mar 05 01:01:16 PM PST 24 |
929188292 ps |
T575 |
/workspace/coverage/default/33.gpio_full_random.270395721 |
|
|
Mar 05 01:00:50 PM PST 24 |
Mar 05 01:00:52 PM PST 24 |
74153780 ps |
T576 |
/workspace/coverage/default/15.gpio_intr_rand_pgm.2458652629 |
|
|
Mar 05 12:59:44 PM PST 24 |
Mar 05 12:59:45 PM PST 24 |
104072296 ps |
T577 |
/workspace/coverage/default/26.gpio_random_long_reg_writes_reg_reads.1977991233 |
|
|
Mar 05 01:00:24 PM PST 24 |
Mar 05 01:00:29 PM PST 24 |
97803602 ps |
T51 |
/workspace/coverage/default/0.gpio_sec_cm.3521298192 |
|
|
Mar 05 12:58:57 PM PST 24 |
Mar 05 12:58:58 PM PST 24 |
289852706 ps |
T578 |
/workspace/coverage/default/34.gpio_dout_din_regs_random_rw.94802422 |
|
|
Mar 05 01:00:50 PM PST 24 |
Mar 05 01:00:52 PM PST 24 |
48882796 ps |
T579 |
/workspace/coverage/default/5.gpio_full_random.463285061 |
|
|
Mar 05 12:59:08 PM PST 24 |
Mar 05 12:59:09 PM PST 24 |
412761655 ps |
T580 |
/workspace/coverage/default/8.gpio_dout_din_regs_random_rw.2275983100 |
|
|
Mar 05 12:59:22 PM PST 24 |
Mar 05 12:59:23 PM PST 24 |
14674912 ps |
T581 |
/workspace/coverage/default/42.gpio_random_dout_din_no_pullup_pulldown.2030376179 |
|
|
Mar 05 01:01:16 PM PST 24 |
Mar 05 01:01:17 PM PST 24 |
141591158 ps |
T582 |
/workspace/coverage/default/33.gpio_rand_intr_trigger.4078218401 |
|
|
Mar 05 01:00:44 PM PST 24 |
Mar 05 01:00:46 PM PST 24 |
361650612 ps |
T583 |
/workspace/coverage/default/44.gpio_random_dout_din_no_pullup_pulldown.2457437230 |
|
|
Mar 05 01:01:15 PM PST 24 |
Mar 05 01:01:16 PM PST 24 |
34844185 ps |
T584 |
/workspace/coverage/default/21.gpio_rand_intr_trigger.1834303315 |
|
|
Mar 05 01:00:08 PM PST 24 |
Mar 05 01:00:11 PM PST 24 |
549289985 ps |
T585 |
/workspace/coverage/default/36.gpio_intr_rand_pgm.2664510248 |
|
|
Mar 05 01:01:02 PM PST 24 |
Mar 05 01:01:03 PM PST 24 |
171106140 ps |
T586 |
/workspace/coverage/default/21.gpio_random_dout_din.220124326 |
|
|
Mar 05 01:00:01 PM PST 24 |
Mar 05 01:00:03 PM PST 24 |
78914173 ps |
T587 |
/workspace/coverage/default/7.gpio_filter_stress.2768584459 |
|
|
Mar 05 12:59:10 PM PST 24 |
Mar 05 12:59:18 PM PST 24 |
606387578 ps |
T588 |
/workspace/coverage/default/36.gpio_dout_din_regs_random_rw.4154812617 |
|
|
Mar 05 01:00:49 PM PST 24 |
Mar 05 01:00:50 PM PST 24 |
26042941 ps |
T589 |
/workspace/coverage/default/44.gpio_smoke_no_pullup_pulldown.3661040715 |
|
|
Mar 05 01:01:15 PM PST 24 |
Mar 05 01:01:16 PM PST 24 |
152198876 ps |
T590 |
/workspace/coverage/default/18.gpio_stress_all.4072516596 |
|
|
Mar 05 12:59:53 PM PST 24 |
Mar 05 01:02:23 PM PST 24 |
60722437332 ps |
T591 |
/workspace/coverage/default/43.gpio_smoke.207100734 |
|
|
Mar 05 01:01:16 PM PST 24 |
Mar 05 01:01:17 PM PST 24 |
47182241 ps |
T592 |
/workspace/coverage/default/25.gpio_full_random.1503531060 |
|
|
Mar 05 01:00:23 PM PST 24 |
Mar 05 01:00:25 PM PST 24 |
72971490 ps |
T593 |
/workspace/coverage/default/35.gpio_intr_rand_pgm.3066881507 |
|
|
Mar 05 01:00:50 PM PST 24 |
Mar 05 01:00:52 PM PST 24 |
300662735 ps |
T594 |
/workspace/coverage/default/34.gpio_smoke_no_pullup_pulldown.2530837140 |
|
|
Mar 05 01:00:51 PM PST 24 |
Mar 05 01:00:54 PM PST 24 |
272962523 ps |
T595 |
/workspace/coverage/default/33.gpio_random_long_reg_writes_reg_reads.1419227359 |
|
|
Mar 05 01:00:44 PM PST 24 |
Mar 05 01:00:49 PM PST 24 |
1122778430 ps |
T596 |
/workspace/coverage/default/36.gpio_random_dout_din_no_pullup_pulldown.1859241811 |
|
|
Mar 05 01:00:51 PM PST 24 |
Mar 05 01:00:54 PM PST 24 |
239067922 ps |
T597 |
/workspace/coverage/default/20.gpio_random_dout_din.391855808 |
|
|
Mar 05 01:00:00 PM PST 24 |
Mar 05 01:00:02 PM PST 24 |
94994699 ps |
T598 |
/workspace/coverage/default/4.gpio_rand_intr_trigger.3757948966 |
|
|
Mar 05 12:59:04 PM PST 24 |
Mar 05 12:59:07 PM PST 24 |
120490080 ps |
T599 |
/workspace/coverage/default/19.gpio_stress_all.1613269849 |
|
|
Mar 05 01:00:03 PM PST 24 |
Mar 05 01:00:28 PM PST 24 |
4108555406 ps |
T600 |
/workspace/coverage/default/28.gpio_full_random.3752689439 |
|
|
Mar 05 01:00:24 PM PST 24 |
Mar 05 01:00:25 PM PST 24 |
140390245 ps |
T601 |
/workspace/coverage/default/35.gpio_random_long_reg_writes_reg_reads.3269553739 |
|
|
Mar 05 01:00:49 PM PST 24 |
Mar 05 01:00:54 PM PST 24 |
320196036 ps |
T602 |
/workspace/coverage/default/11.gpio_smoke.3556336385 |
|
|
Mar 05 12:59:30 PM PST 24 |
Mar 05 12:59:32 PM PST 24 |
167655783 ps |
T603 |
/workspace/coverage/default/45.gpio_random_dout_din_no_pullup_pulldown.1054474629 |
|
|
Mar 05 01:01:22 PM PST 24 |
Mar 05 01:01:24 PM PST 24 |
130924303 ps |
T604 |
/workspace/coverage/default/24.gpio_full_random.123744910 |
|
|
Mar 05 01:00:18 PM PST 24 |
Mar 05 01:00:19 PM PST 24 |
107270978 ps |
T605 |
/workspace/coverage/default/25.gpio_intr_rand_pgm.1891147348 |
|
|
Mar 05 01:00:13 PM PST 24 |
Mar 05 01:00:14 PM PST 24 |
117655645 ps |
T606 |
/workspace/coverage/default/18.gpio_random_dout_din_no_pullup_pulldown.1155369217 |
|
|
Mar 05 12:59:54 PM PST 24 |
Mar 05 12:59:55 PM PST 24 |
25764559 ps |
T607 |
/workspace/coverage/default/22.gpio_full_random.1010033763 |
|
|
Mar 05 01:00:11 PM PST 24 |
Mar 05 01:00:12 PM PST 24 |
203734393 ps |
T608 |
/workspace/coverage/default/42.gpio_dout_din_regs_random_rw.542527384 |
|
|
Mar 05 01:01:13 PM PST 24 |
Mar 05 01:01:14 PM PST 24 |
38274817 ps |
T609 |
/workspace/coverage/default/45.gpio_filter_stress.1182792664 |
|
|
Mar 05 01:01:21 PM PST 24 |
Mar 05 01:01:33 PM PST 24 |
1922568970 ps |
T610 |
/workspace/coverage/default/32.gpio_intr_rand_pgm.940981033 |
|
|
Mar 05 01:00:36 PM PST 24 |
Mar 05 01:00:37 PM PST 24 |
28745963 ps |
T611 |
/workspace/coverage/default/2.gpio_alert_test.1265371959 |
|
|
Mar 05 12:59:00 PM PST 24 |
Mar 05 12:59:01 PM PST 24 |
37854492 ps |
T612 |
/workspace/coverage/default/17.gpio_intr_rand_pgm.3959851661 |
|
|
Mar 05 12:59:49 PM PST 24 |
Mar 05 12:59:50 PM PST 24 |
1020026988 ps |
T613 |
/workspace/coverage/default/41.gpio_smoke.4201985008 |
|
|
Mar 05 01:01:12 PM PST 24 |
Mar 05 01:01:13 PM PST 24 |
78272490 ps |
T614 |
/workspace/coverage/default/38.gpio_rand_intr_trigger.104520237 |
|
|
Mar 05 01:01:01 PM PST 24 |
Mar 05 01:01:05 PM PST 24 |
303514443 ps |
T615 |
/workspace/coverage/default/21.gpio_smoke.2737967650 |
|
|
Mar 05 01:00:02 PM PST 24 |
Mar 05 01:00:04 PM PST 24 |
118277516 ps |
T616 |
/workspace/coverage/default/2.gpio_rand_intr_trigger.2811718530 |
|
|
Mar 05 12:58:52 PM PST 24 |
Mar 05 12:58:54 PM PST 24 |
60982921 ps |
T617 |
/workspace/coverage/default/11.gpio_random_dout_din_no_pullup_pulldown.2022860251 |
|
|
Mar 05 12:59:33 PM PST 24 |
Mar 05 12:59:35 PM PST 24 |
41877339 ps |
T618 |
/workspace/coverage/default/34.gpio_alert_test.1842584893 |
|
|
Mar 05 01:00:47 PM PST 24 |
Mar 05 01:00:48 PM PST 24 |
12315623 ps |
T619 |
/workspace/coverage/default/32.gpio_random_dout_din_no_pullup_pulldown.589065023 |
|
|
Mar 05 01:00:37 PM PST 24 |
Mar 05 01:00:38 PM PST 24 |
288755892 ps |
T620 |
/workspace/coverage/default/46.gpio_alert_test.1113715960 |
|
|
Mar 05 01:01:25 PM PST 24 |
Mar 05 01:01:25 PM PST 24 |
31597598 ps |
T621 |
/workspace/coverage/default/6.gpio_random_long_reg_writes_reg_reads.2652473759 |
|
|
Mar 05 12:59:13 PM PST 24 |
Mar 05 12:59:16 PM PST 24 |
70276416 ps |
T622 |
/workspace/coverage/default/26.gpio_full_random.3368893618 |
|
|
Mar 05 01:00:27 PM PST 24 |
Mar 05 01:00:28 PM PST 24 |
38617445 ps |
T623 |
/workspace/coverage/default/12.gpio_random_dout_din.953692931 |
|
|
Mar 05 12:59:44 PM PST 24 |
Mar 05 12:59:45 PM PST 24 |
24463210 ps |
T624 |
/workspace/coverage/default/42.gpio_stress_all.1156539612 |
|
|
Mar 05 01:01:13 PM PST 24 |
Mar 05 01:04:22 PM PST 24 |
91224347553 ps |
T625 |
/workspace/coverage/default/3.gpio_intr_rand_pgm.3455673865 |
|
|
Mar 05 12:58:53 PM PST 24 |
Mar 05 12:58:55 PM PST 24 |
40005866 ps |
T626 |
/workspace/coverage/default/16.gpio_filter_stress.2322753908 |
|
|
Mar 05 12:59:48 PM PST 24 |
Mar 05 12:59:58 PM PST 24 |
6187617294 ps |
T627 |
/workspace/coverage/default/45.gpio_intr_with_filter_rand_intr_event.20902329 |
|
|
Mar 05 01:01:25 PM PST 24 |
Mar 05 01:01:28 PM PST 24 |
90193734 ps |
T628 |
/workspace/coverage/default/30.gpio_smoke.1724704285 |
|
|
Mar 05 01:00:38 PM PST 24 |
Mar 05 01:00:40 PM PST 24 |
304761105 ps |
T629 |
/workspace/coverage/default/30.gpio_intr_with_filter_rand_intr_event.1220212491 |
|
|
Mar 05 01:00:37 PM PST 24 |
Mar 05 01:00:39 PM PST 24 |
43247098 ps |
T630 |
/workspace/coverage/default/35.gpio_filter_stress.4022881211 |
|
|
Mar 05 01:00:49 PM PST 24 |
Mar 05 01:01:08 PM PST 24 |
3922869934 ps |
T631 |
/workspace/coverage/default/42.gpio_random_long_reg_writes_reg_reads.3598938624 |
|
|
Mar 05 01:01:12 PM PST 24 |
Mar 05 01:01:17 PM PST 24 |
532684856 ps |
T632 |
/workspace/coverage/default/0.gpio_smoke_no_pullup_pulldown.619057955 |
|
|
Mar 05 12:58:45 PM PST 24 |
Mar 05 12:58:47 PM PST 24 |
47242222 ps |
T633 |
/workspace/coverage/default/32.gpio_dout_din_regs_random_rw.3385932423 |
|
|
Mar 05 01:00:43 PM PST 24 |
Mar 05 01:00:44 PM PST 24 |
89510670 ps |
T634 |
/workspace/coverage/default/5.gpio_rand_intr_trigger.3077245612 |
|
|
Mar 05 12:58:58 PM PST 24 |
Mar 05 12:59:02 PM PST 24 |
115476008 ps |
T635 |
/workspace/coverage/default/38.gpio_stress_all_with_rand_reset.1655705290 |
|
|
Mar 05 01:01:02 PM PST 24 |
Mar 05 01:34:41 PM PST 24 |
85201717178 ps |
T636 |
/workspace/coverage/default/36.gpio_stress_all_with_rand_reset.315953416 |
|
|
Mar 05 01:01:07 PM PST 24 |
Mar 05 01:26:08 PM PST 24 |
80382987030 ps |
T637 |
/workspace/coverage/default/9.gpio_random_dout_din_no_pullup_pulldown.3095435808 |
|
|
Mar 05 12:59:18 PM PST 24 |
Mar 05 12:59:19 PM PST 24 |
68807677 ps |
T638 |
/workspace/coverage/default/5.gpio_dout_din_regs_random_rw.3067925927 |
|
|
Mar 05 12:59:03 PM PST 24 |
Mar 05 12:59:05 PM PST 24 |
38163920 ps |
T639 |
/workspace/coverage/default/1.gpio_smoke.3165922356 |
|
|
Mar 05 12:58:54 PM PST 24 |
Mar 05 12:58:56 PM PST 24 |
41810756 ps |
T640 |
/workspace/coverage/default/29.gpio_random_long_reg_writes_reg_reads.2798429543 |
|
|
Mar 05 01:00:26 PM PST 24 |
Mar 05 01:00:29 PM PST 24 |
114101800 ps |
T641 |
/workspace/coverage/default/3.gpio_dout_din_regs_random_rw.2773975101 |
|
|
Mar 05 12:58:53 PM PST 24 |
Mar 05 12:58:54 PM PST 24 |
330297435 ps |
T642 |
/workspace/coverage/default/45.gpio_smoke_no_pullup_pulldown.1407077410 |
|
|
Mar 05 01:01:24 PM PST 24 |
Mar 05 01:01:26 PM PST 24 |
264847848 ps |
T643 |
/workspace/coverage/default/10.gpio_smoke.996107374 |
|
|
Mar 05 12:59:31 PM PST 24 |
Mar 05 12:59:32 PM PST 24 |
49904383 ps |
T644 |
/workspace/coverage/default/31.gpio_random_dout_din.896510158 |
|
|
Mar 05 01:00:37 PM PST 24 |
Mar 05 01:00:37 PM PST 24 |
179150154 ps |
T645 |
/workspace/coverage/default/28.gpio_intr_rand_pgm.3629996882 |
|
|
Mar 05 01:00:26 PM PST 24 |
Mar 05 01:00:28 PM PST 24 |
362243682 ps |
T646 |
/workspace/coverage/default/34.gpio_random_dout_din_no_pullup_pulldown.283567914 |
|
|
Mar 05 01:00:51 PM PST 24 |
Mar 05 01:00:53 PM PST 24 |
151923069 ps |
T647 |
/workspace/coverage/default/34.gpio_random_dout_din.734558676 |
|
|
Mar 05 01:00:50 PM PST 24 |
Mar 05 01:00:53 PM PST 24 |
72412803 ps |
T648 |
/workspace/coverage/default/20.gpio_intr_rand_pgm.2458833337 |
|
|
Mar 05 01:00:02 PM PST 24 |
Mar 05 01:00:04 PM PST 24 |
41832794 ps |
T649 |
/workspace/coverage/default/17.gpio_smoke.1586106896 |
|
|
Mar 05 12:59:48 PM PST 24 |
Mar 05 12:59:49 PM PST 24 |
73481756 ps |
T650 |
/workspace/coverage/default/5.gpio_intr_rand_pgm.1314151737 |
|
|
Mar 05 12:59:01 PM PST 24 |
Mar 05 12:59:02 PM PST 24 |
597808327 ps |
T651 |
/workspace/coverage/default/46.gpio_intr_rand_pgm.3589224885 |
|
|
Mar 05 01:01:24 PM PST 24 |
Mar 05 01:01:25 PM PST 24 |
74041552 ps |
T652 |
/workspace/coverage/default/35.gpio_stress_all.2772325198 |
|
|
Mar 05 01:00:50 PM PST 24 |
Mar 05 01:03:39 PM PST 24 |
27951828700 ps |
T653 |
/workspace/coverage/default/25.gpio_random_dout_din_no_pullup_pulldown.579797357 |
|
|
Mar 05 01:00:23 PM PST 24 |
Mar 05 01:00:24 PM PST 24 |
105726054 ps |
T654 |
/workspace/coverage/default/45.gpio_stress_all.2978118332 |
|
|
Mar 05 01:01:24 PM PST 24 |
Mar 05 01:04:23 PM PST 24 |
67662217823 ps |
T655 |
/workspace/coverage/default/19.gpio_dout_din_regs_random_rw.892064067 |
|
|
Mar 05 01:00:03 PM PST 24 |
Mar 05 01:00:04 PM PST 24 |
179169808 ps |
T656 |
/workspace/coverage/default/41.gpio_rand_intr_trigger.681891604 |
|
|
Mar 05 01:01:13 PM PST 24 |
Mar 05 01:01:15 PM PST 24 |
466317380 ps |
T657 |
/workspace/coverage/default/49.gpio_random_dout_din_no_pullup_pulldown.2190267740 |
|
|
Mar 05 01:01:29 PM PST 24 |
Mar 05 01:01:30 PM PST 24 |
20529735 ps |
T658 |
/workspace/coverage/default/1.gpio_stress_all.700939463 |
|
|
Mar 05 12:58:53 PM PST 24 |
Mar 05 01:01:33 PM PST 24 |
50146458598 ps |
T659 |
/workspace/coverage/default/12.gpio_intr_rand_pgm.2573373225 |
|
|
Mar 05 12:59:41 PM PST 24 |
Mar 05 12:59:43 PM PST 24 |
399838675 ps |
T660 |
/workspace/coverage/default/45.gpio_random_dout_din.3523553271 |
|
|
Mar 05 01:01:33 PM PST 24 |
Mar 05 01:01:34 PM PST 24 |
113540527 ps |
T661 |
/workspace/coverage/default/28.gpio_smoke_no_pullup_pulldown.257250576 |
|
|
Mar 05 01:00:29 PM PST 24 |
Mar 05 01:00:30 PM PST 24 |
146402516 ps |
T662 |
/workspace/coverage/default/27.gpio_filter_stress.3026241556 |
|
|
Mar 05 01:00:27 PM PST 24 |
Mar 05 01:00:50 PM PST 24 |
1299524920 ps |
T663 |
/workspace/coverage/default/39.gpio_random_dout_din.2388836055 |
|
|
Mar 05 01:01:02 PM PST 24 |
Mar 05 01:01:03 PM PST 24 |
23602485 ps |
T664 |
/workspace/coverage/default/24.gpio_dout_din_regs_random_rw.1457634824 |
|
|
Mar 05 01:00:18 PM PST 24 |
Mar 05 01:00:19 PM PST 24 |
24461174 ps |
T665 |
/workspace/coverage/default/47.gpio_random_dout_din_no_pullup_pulldown.1103758349 |
|
|
Mar 05 01:01:21 PM PST 24 |
Mar 05 01:01:22 PM PST 24 |
52300207 ps |
T666 |
/workspace/coverage/default/23.gpio_stress_all_with_rand_reset.1596310368 |
|
|
Mar 05 01:00:14 PM PST 24 |
Mar 05 01:11:37 PM PST 24 |
46186958218 ps |
T667 |
/workspace/coverage/default/24.gpio_smoke.3046753160 |
|
|
Mar 05 01:00:15 PM PST 24 |
Mar 05 01:00:16 PM PST 24 |
506672835 ps |
T668 |
/workspace/coverage/default/41.gpio_full_random.3989918560 |
|
|
Mar 05 01:01:13 PM PST 24 |
Mar 05 01:01:14 PM PST 24 |
109407021 ps |
T669 |
/workspace/coverage/default/39.gpio_smoke_no_pullup_pulldown.1112910814 |
|
|
Mar 05 01:01:00 PM PST 24 |
Mar 05 01:01:01 PM PST 24 |
75177108 ps |
T670 |
/workspace/coverage/default/41.gpio_smoke_no_pullup_pulldown.1313337406 |
|
|
Mar 05 01:01:13 PM PST 24 |
Mar 05 01:01:14 PM PST 24 |
213019478 ps |
T671 |
/workspace/coverage/default/39.gpio_dout_din_regs_random_rw.473435372 |
|
|
Mar 05 01:01:02 PM PST 24 |
Mar 05 01:01:03 PM PST 24 |
123085673 ps |
T672 |
/workspace/coverage/default/37.gpio_full_random.2281152661 |
|
|
Mar 05 01:01:02 PM PST 24 |
Mar 05 01:01:03 PM PST 24 |
28011060 ps |
T673 |
/workspace/coverage/default/43.gpio_full_random.407231274 |
|
|
Mar 05 01:01:18 PM PST 24 |
Mar 05 01:01:19 PM PST 24 |
413008691 ps |
T674 |
/workspace/coverage/default/26.gpio_intr_rand_pgm.2397472979 |
|
|
Mar 05 01:00:31 PM PST 24 |
Mar 05 01:00:31 PM PST 24 |
89683624 ps |
T675 |
/workspace/coverage/default/14.gpio_dout_din_regs_random_rw.2985973095 |
|
|
Mar 05 12:59:41 PM PST 24 |
Mar 05 12:59:42 PM PST 24 |
174197801 ps |
T676 |
/workspace/coverage/default/13.gpio_rand_intr_trigger.3281230823 |
|
|
Mar 05 12:59:41 PM PST 24 |
Mar 05 12:59:43 PM PST 24 |
128443380 ps |
T677 |
/workspace/coverage/default/27.gpio_random_long_reg_writes_reg_reads.1745712589 |
|
|
Mar 05 01:00:26 PM PST 24 |
Mar 05 01:00:30 PM PST 24 |
310523740 ps |
T678 |
/workspace/coverage/default/20.gpio_dout_din_regs_random_rw.1190340894 |
|
|
Mar 05 01:00:04 PM PST 24 |
Mar 05 01:00:05 PM PST 24 |
31717183 ps |
T679 |
/workspace/coverage/default/19.gpio_random_long_reg_writes_reg_reads.3093463973 |
|
|
Mar 05 01:00:05 PM PST 24 |
Mar 05 01:00:06 PM PST 24 |
87816543 ps |
T680 |
/workspace/coverage/default/17.gpio_full_random.2995392251 |
|
|
Mar 05 12:59:49 PM PST 24 |
Mar 05 12:59:50 PM PST 24 |
432980129 ps |
T681 |
/workspace/coverage/default/13.gpio_intr_with_filter_rand_intr_event.2359210228 |
|
|
Mar 05 12:59:44 PM PST 24 |
Mar 05 12:59:47 PM PST 24 |
73875283 ps |
T682 |
/workspace/coverage/default/8.gpio_smoke.2767607825 |
|
|
Mar 05 12:59:20 PM PST 24 |
Mar 05 12:59:21 PM PST 24 |
39977229 ps |
T683 |
/workspace/coverage/default/5.gpio_stress_all.758097381 |
|
|
Mar 05 12:59:07 PM PST 24 |
Mar 05 01:01:16 PM PST 24 |
56987190728 ps |
T684 |
/workspace/coverage/default/49.gpio_intr_rand_pgm.3670378013 |
|
|
Mar 05 01:01:28 PM PST 24 |
Mar 05 01:01:29 PM PST 24 |
76176373 ps |
T685 |
/workspace/coverage/default/39.gpio_stress_all.1530625531 |
|
|
Mar 05 01:01:04 PM PST 24 |
Mar 05 01:02:56 PM PST 24 |
49201180008 ps |
T52 |
/workspace/coverage/default/1.gpio_sec_cm.808848726 |
|
|
Mar 05 12:58:58 PM PST 24 |
Mar 05 12:58:59 PM PST 24 |
36391579 ps |
T686 |
/workspace/coverage/default/6.gpio_intr_with_filter_rand_intr_event.1034309551 |
|
|
Mar 05 12:59:11 PM PST 24 |
Mar 05 12:59:14 PM PST 24 |
268287389 ps |
T687 |
/workspace/coverage/default/21.gpio_random_dout_din_no_pullup_pulldown.3638772590 |
|
|
Mar 05 12:59:59 PM PST 24 |
Mar 05 01:00:00 PM PST 24 |
44347467 ps |
T688 |
/workspace/coverage/default/3.gpio_random_dout_din_no_pullup_pulldown.3962649140 |
|
|
Mar 05 12:58:52 PM PST 24 |
Mar 05 12:58:53 PM PST 24 |
209559317 ps |
T689 |
/workspace/coverage/default/22.gpio_smoke.532407600 |
|
|
Mar 05 01:00:14 PM PST 24 |
Mar 05 01:00:15 PM PST 24 |
92731834 ps |
T690 |
/workspace/coverage/default/3.gpio_random_long_reg_writes_reg_reads.2807099 |
|
|
Mar 05 12:59:02 PM PST 24 |
Mar 05 12:59:06 PM PST 24 |
288549656 ps |
T691 |
/workspace/coverage/default/35.gpio_smoke_no_pullup_pulldown.372053761 |
|
|
Mar 05 01:00:48 PM PST 24 |
Mar 05 01:00:50 PM PST 24 |
78478057 ps |
T692 |
/workspace/coverage/default/24.gpio_filter_stress.1435823834 |
|
|
Mar 05 01:00:17 PM PST 24 |
Mar 05 01:00:32 PM PST 24 |
471450703 ps |
T693 |
/workspace/coverage/default/9.gpio_smoke_no_pullup_pulldown.2013617857 |
|
|
Mar 05 12:59:22 PM PST 24 |
Mar 05 12:59:24 PM PST 24 |
245937956 ps |
T694 |
/workspace/coverage/default/29.gpio_alert_test.3619733086 |
|
|
Mar 05 01:00:35 PM PST 24 |
Mar 05 01:00:36 PM PST 24 |
41724947 ps |
T695 |
/workspace/coverage/default/23.gpio_dout_din_regs_random_rw.598161567 |
|
|
Mar 05 01:00:09 PM PST 24 |
Mar 05 01:00:10 PM PST 24 |
81980921 ps |
T696 |
/workspace/coverage/default/11.gpio_stress_all.2702319228 |
|
|
Mar 05 12:59:31 PM PST 24 |
Mar 05 01:02:21 PM PST 24 |
14940978307 ps |
T697 |
/workspace/coverage/default/42.gpio_intr_rand_pgm.2109339819 |
|
|
Mar 05 01:01:12 PM PST 24 |
Mar 05 01:01:13 PM PST 24 |
35079854 ps |
T698 |
/workspace/coverage/default/8.gpio_rand_intr_trigger.770946728 |
|
|
Mar 05 12:59:20 PM PST 24 |
Mar 05 12:59:22 PM PST 24 |
39192147 ps |
T699 |
/workspace/coverage/default/11.gpio_alert_test.2846647071 |
|
|
Mar 05 12:59:38 PM PST 24 |
Mar 05 12:59:39 PM PST 24 |
15064100 ps |
T700 |
/workspace/coverage/default/26.gpio_stress_all.2067398582 |
|
|
Mar 05 01:00:33 PM PST 24 |
Mar 05 01:04:12 PM PST 24 |
145112921123 ps |
T701 |
/workspace/coverage/default/40.gpio_random_long_reg_writes_reg_reads.2766528288 |
|
|
Mar 05 01:01:12 PM PST 24 |
Mar 05 01:01:16 PM PST 24 |
3635608366 ps |
T702 |
/workspace/coverage/default/49.gpio_random_dout_din.1756000025 |
|
|
Mar 05 01:01:31 PM PST 24 |
Mar 05 01:01:32 PM PST 24 |
47906394 ps |
T703 |
/workspace/coverage/default/45.gpio_full_random.1687000163 |
|
|
Mar 05 01:01:21 PM PST 24 |
Mar 05 01:01:23 PM PST 24 |
71727912 ps |
T704 |
/workspace/coverage/default/0.gpio_random_dout_din_no_pullup_pulldown.3149768319 |
|
|
Mar 05 12:58:41 PM PST 24 |
Mar 05 12:58:42 PM PST 24 |
291458666 ps |
T78 |
/workspace/coverage/cover_reg_top/3.gpio_csr_bit_bash.2751197423 |
|
|
Mar 05 12:40:46 PM PST 24 |
Mar 05 12:40:49 PM PST 24 |
314726503 ps |
T705 |
/workspace/coverage/cover_reg_top/49.gpio_intr_test.2954797345 |
|
|
Mar 05 12:40:52 PM PST 24 |
Mar 05 12:40:53 PM PST 24 |
16039633 ps |
T706 |
/workspace/coverage/cover_reg_top/39.gpio_intr_test.3882987775 |
|
|
Mar 05 12:41:15 PM PST 24 |
Mar 05 12:41:17 PM PST 24 |
18726411 ps |
T36 |
/workspace/coverage/cover_reg_top/11.gpio_tl_intg_err.2126974015 |
|
|
Mar 05 12:40:38 PM PST 24 |
Mar 05 12:40:40 PM PST 24 |
1025759997 ps |
T79 |
/workspace/coverage/cover_reg_top/12.gpio_csr_rw.2142741870 |
|
|
Mar 05 12:40:52 PM PST 24 |
Mar 05 12:40:54 PM PST 24 |
53628223 ps |
T707 |
/workspace/coverage/cover_reg_top/9.gpio_csr_mem_rw_with_rand_reset.4044273953 |
|
|
Mar 05 12:41:09 PM PST 24 |
Mar 05 12:41:10 PM PST 24 |
150429910 ps |
T708 |
/workspace/coverage/cover_reg_top/6.gpio_intr_test.1552901197 |
|
|
Mar 05 12:40:34 PM PST 24 |
Mar 05 12:40:35 PM PST 24 |
14781749 ps |
T709 |
/workspace/coverage/cover_reg_top/0.gpio_tl_errors.2957663290 |
|
|
Mar 05 12:40:55 PM PST 24 |
Mar 05 12:40:57 PM PST 24 |
218720193 ps |
T710 |
/workspace/coverage/cover_reg_top/10.gpio_intr_test.1890103791 |
|
|
Mar 05 12:41:03 PM PST 24 |
Mar 05 12:41:04 PM PST 24 |
27183356 ps |
T711 |
/workspace/coverage/cover_reg_top/35.gpio_intr_test.3995965755 |
|
|
Mar 05 12:40:50 PM PST 24 |
Mar 05 12:40:51 PM PST 24 |
47232160 ps |
T80 |
/workspace/coverage/cover_reg_top/14.gpio_same_csr_outstanding.410593468 |
|
|
Mar 05 12:41:08 PM PST 24 |
Mar 05 12:41:08 PM PST 24 |
41894968 ps |
T81 |
/workspace/coverage/cover_reg_top/3.gpio_same_csr_outstanding.3678760392 |
|
|
Mar 05 12:40:38 PM PST 24 |
Mar 05 12:40:39 PM PST 24 |
61049964 ps |
T712 |
/workspace/coverage/cover_reg_top/1.gpio_csr_mem_rw_with_rand_reset.175706688 |
|
|
Mar 05 12:40:45 PM PST 24 |
Mar 05 12:40:46 PM PST 24 |
96857643 ps |
T713 |
/workspace/coverage/cover_reg_top/4.gpio_tl_errors.1532878778 |
|
|
Mar 05 12:40:49 PM PST 24 |
Mar 05 12:40:51 PM PST 24 |
196751998 ps |
T37 |
/workspace/coverage/cover_reg_top/15.gpio_tl_intg_err.815347384 |
|
|
Mar 05 12:41:00 PM PST 24 |
Mar 05 12:41:01 PM PST 24 |
96504806 ps |
T714 |
/workspace/coverage/cover_reg_top/2.gpio_csr_mem_rw_with_rand_reset.1787909935 |
|
|
Mar 05 12:40:43 PM PST 24 |
Mar 05 12:40:44 PM PST 24 |
21823718 ps |
T82 |
/workspace/coverage/cover_reg_top/4.gpio_csr_aliasing.905084382 |
|
|
Mar 05 12:40:57 PM PST 24 |
Mar 05 12:40:58 PM PST 24 |
14589755 ps |
T38 |
/workspace/coverage/cover_reg_top/0.gpio_tl_intg_err.4280045552 |
|
|
Mar 05 12:40:45 PM PST 24 |
Mar 05 12:40:45 PM PST 24 |
88655672 ps |
T83 |
/workspace/coverage/cover_reg_top/4.gpio_csr_rw.1451756529 |
|
|
Mar 05 12:40:42 PM PST 24 |
Mar 05 12:40:43 PM PST 24 |
41798102 ps |
T715 |
/workspace/coverage/cover_reg_top/16.gpio_csr_mem_rw_with_rand_reset.1351603377 |
|
|
Mar 05 12:40:57 PM PST 24 |
Mar 05 12:40:58 PM PST 24 |
77096453 ps |
T84 |
/workspace/coverage/cover_reg_top/0.gpio_csr_hw_reset.2804791635 |
|
|
Mar 05 12:40:40 PM PST 24 |
Mar 05 12:40:41 PM PST 24 |
40430715 ps |
T97 |
/workspace/coverage/cover_reg_top/12.gpio_same_csr_outstanding.1691248161 |
|
|
Mar 05 12:40:53 PM PST 24 |
Mar 05 12:40:59 PM PST 24 |
20530937 ps |
T98 |
/workspace/coverage/cover_reg_top/1.gpio_same_csr_outstanding.1709660717 |
|
|
Mar 05 12:40:53 PM PST 24 |
Mar 05 12:40:54 PM PST 24 |
67443051 ps |
T46 |
/workspace/coverage/cover_reg_top/3.gpio_tl_intg_err.2302347133 |
|
|
Mar 05 12:41:04 PM PST 24 |
Mar 05 12:41:07 PM PST 24 |
332793107 ps |
T716 |
/workspace/coverage/cover_reg_top/11.gpio_intr_test.2294793778 |
|
|
Mar 05 12:41:13 PM PST 24 |
Mar 05 12:41:18 PM PST 24 |
61575074 ps |
T717 |
/workspace/coverage/cover_reg_top/10.gpio_tl_errors.82374815 |
|
|
Mar 05 12:41:06 PM PST 24 |
Mar 05 12:41:08 PM PST 24 |
167629174 ps |
T718 |
/workspace/coverage/cover_reg_top/9.gpio_tl_errors.2710782397 |
|
|
Mar 05 12:40:51 PM PST 24 |
Mar 05 12:40:54 PM PST 24 |
94832592 ps |
T719 |
/workspace/coverage/cover_reg_top/0.gpio_intr_test.2882831232 |
|
|
Mar 05 12:40:49 PM PST 24 |
Mar 05 12:40:49 PM PST 24 |
62043460 ps |
T720 |
/workspace/coverage/cover_reg_top/1.gpio_csr_bit_bash.155043191 |
|
|
Mar 05 12:40:48 PM PST 24 |
Mar 05 12:40:50 PM PST 24 |
265013618 ps |
T721 |
/workspace/coverage/cover_reg_top/8.gpio_csr_mem_rw_with_rand_reset.2234453947 |
|
|
Mar 05 12:41:01 PM PST 24 |
Mar 05 12:41:02 PM PST 24 |
135374895 ps |
T722 |
/workspace/coverage/cover_reg_top/41.gpio_intr_test.1413786018 |
|
|
Mar 05 12:40:48 PM PST 24 |
Mar 05 12:40:49 PM PST 24 |
162855817 ps |
T723 |
/workspace/coverage/cover_reg_top/3.gpio_intr_test.3890179762 |
|
|
Mar 05 12:40:40 PM PST 24 |
Mar 05 12:40:41 PM PST 24 |
14677652 ps |
T102 |
/workspace/coverage/cover_reg_top/18.gpio_csr_rw.200411302 |
|
|
Mar 05 12:41:13 PM PST 24 |
Mar 05 12:41:14 PM PST 24 |
22127991 ps |
T85 |
/workspace/coverage/cover_reg_top/18.gpio_same_csr_outstanding.191500841 |
|
|
Mar 05 12:41:04 PM PST 24 |
Mar 05 12:41:05 PM PST 24 |
46030580 ps |
T49 |
/workspace/coverage/cover_reg_top/12.gpio_tl_intg_err.4174922661 |
|
|
Mar 05 12:40:49 PM PST 24 |
Mar 05 12:40:51 PM PST 24 |
106727630 ps |
T724 |
/workspace/coverage/cover_reg_top/6.gpio_csr_rw.3394855289 |
|
|
Mar 05 12:40:54 PM PST 24 |
Mar 05 12:40:55 PM PST 24 |
41960426 ps |
T50 |
/workspace/coverage/cover_reg_top/19.gpio_tl_intg_err.1804842874 |
|
|
Mar 05 12:40:59 PM PST 24 |
Mar 05 12:41:00 PM PST 24 |
198989064 ps |
T103 |
/workspace/coverage/cover_reg_top/1.gpio_tl_intg_err.3108160203 |
|
|
Mar 05 12:40:59 PM PST 24 |
Mar 05 12:41:00 PM PST 24 |
128850278 ps |
T725 |
/workspace/coverage/cover_reg_top/14.gpio_csr_rw.39685538 |
|
|
Mar 05 12:41:13 PM PST 24 |
Mar 05 12:41:14 PM PST 24 |
12889681 ps |
T86 |
/workspace/coverage/cover_reg_top/5.gpio_same_csr_outstanding.4218053568 |
|
|
Mar 05 12:40:50 PM PST 24 |
Mar 05 12:40:51 PM PST 24 |
15689831 ps |
T726 |
/workspace/coverage/cover_reg_top/11.gpio_csr_mem_rw_with_rand_reset.2047857159 |
|
|
Mar 05 12:41:11 PM PST 24 |
Mar 05 12:41:13 PM PST 24 |
35773543 ps |
T87 |
/workspace/coverage/cover_reg_top/11.gpio_same_csr_outstanding.3145072579 |
|
|
Mar 05 12:41:12 PM PST 24 |
Mar 05 12:41:13 PM PST 24 |
24176848 ps |
T727 |
/workspace/coverage/cover_reg_top/11.gpio_csr_rw.4122270959 |
|
|
Mar 05 12:41:05 PM PST 24 |
Mar 05 12:41:06 PM PST 24 |
14467518 ps |
T728 |
/workspace/coverage/cover_reg_top/9.gpio_tl_intg_err.2476151042 |
|
|
Mar 05 12:40:49 PM PST 24 |
Mar 05 12:40:51 PM PST 24 |
648880037 ps |
T729 |
/workspace/coverage/cover_reg_top/6.gpio_tl_errors.2048008992 |
|
|
Mar 05 12:40:57 PM PST 24 |
Mar 05 12:41:00 PM PST 24 |
62860882 ps |
T730 |
/workspace/coverage/cover_reg_top/12.gpio_intr_test.1771911558 |
|
|
Mar 05 12:40:58 PM PST 24 |
Mar 05 12:40:59 PM PST 24 |
10946577 ps |
T731 |
/workspace/coverage/cover_reg_top/4.gpio_csr_hw_reset.1233731333 |
|
|
Mar 05 12:40:49 PM PST 24 |
Mar 05 12:40:50 PM PST 24 |
46016726 ps |
T732 |
/workspace/coverage/cover_reg_top/27.gpio_intr_test.3263154956 |
|
|
Mar 05 12:40:59 PM PST 24 |
Mar 05 12:41:00 PM PST 24 |
35719443 ps |
T733 |
/workspace/coverage/cover_reg_top/16.gpio_intr_test.1300651222 |
|
|
Mar 05 12:41:09 PM PST 24 |
Mar 05 12:41:11 PM PST 24 |
50173646 ps |
T734 |
/workspace/coverage/cover_reg_top/2.gpio_tl_errors.1208940629 |
|
|
Mar 05 12:41:01 PM PST 24 |
Mar 05 12:41:04 PM PST 24 |
54964560 ps |
T735 |
/workspace/coverage/cover_reg_top/43.gpio_intr_test.1011849576 |
|
|
Mar 05 12:40:58 PM PST 24 |
Mar 05 12:40:59 PM PST 24 |
15980905 ps |
T736 |
/workspace/coverage/cover_reg_top/17.gpio_intr_test.4098124114 |
|
|
Mar 05 12:41:04 PM PST 24 |
Mar 05 12:41:05 PM PST 24 |
13054932 ps |
T737 |
/workspace/coverage/cover_reg_top/17.gpio_csr_mem_rw_with_rand_reset.3893201143 |
|
|
Mar 05 12:41:03 PM PST 24 |
Mar 05 12:41:04 PM PST 24 |
24281934 ps |
T738 |
/workspace/coverage/cover_reg_top/22.gpio_intr_test.4262075868 |
|
|
Mar 05 12:40:59 PM PST 24 |
Mar 05 12:41:00 PM PST 24 |
12266902 ps |
T739 |
/workspace/coverage/cover_reg_top/44.gpio_intr_test.1261836553 |
|
|
Mar 05 12:41:09 PM PST 24 |
Mar 05 12:41:10 PM PST 24 |
16935646 ps |
T740 |
/workspace/coverage/cover_reg_top/7.gpio_intr_test.742395098 |
|
|
Mar 05 12:40:54 PM PST 24 |
Mar 05 12:40:55 PM PST 24 |
40677195 ps |
T741 |
/workspace/coverage/cover_reg_top/3.gpio_csr_aliasing.3824371521 |
|
|
Mar 05 12:40:46 PM PST 24 |
Mar 05 12:40:47 PM PST 24 |
63227497 ps |
T742 |
/workspace/coverage/cover_reg_top/9.gpio_csr_rw.1348040741 |
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|
Mar 05 12:40:41 PM PST 24 |
Mar 05 12:40:42 PM PST 24 |
11874336 ps |
T743 |
/workspace/coverage/cover_reg_top/38.gpio_intr_test.858536339 |
|
|
Mar 05 12:40:38 PM PST 24 |
Mar 05 12:40:39 PM PST 24 |
16987601 ps |
T95 |
/workspace/coverage/cover_reg_top/4.gpio_csr_bit_bash.1086783452 |
|
|
Mar 05 12:40:53 PM PST 24 |
Mar 05 12:40:57 PM PST 24 |
325903129 ps |
T744 |
/workspace/coverage/cover_reg_top/13.gpio_tl_errors.944823453 |
|
|
Mar 05 12:41:03 PM PST 24 |
Mar 05 12:41:05 PM PST 24 |
211254055 ps |
T745 |
/workspace/coverage/cover_reg_top/32.gpio_intr_test.2120259441 |
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|
Mar 05 12:40:47 PM PST 24 |
Mar 05 12:40:47 PM PST 24 |
44666753 ps |
T746 |
/workspace/coverage/cover_reg_top/13.gpio_csr_mem_rw_with_rand_reset.82699908 |
|
|
Mar 05 12:41:20 PM PST 24 |
Mar 05 12:41:20 PM PST 24 |
13595615 ps |
T747 |
/workspace/coverage/cover_reg_top/7.gpio_tl_intg_err.3288253836 |
|
|
Mar 05 12:40:35 PM PST 24 |
Mar 05 12:40:37 PM PST 24 |
423620206 ps |
T748 |
/workspace/coverage/cover_reg_top/12.gpio_csr_mem_rw_with_rand_reset.2542139725 |
|
|
Mar 05 12:40:55 PM PST 24 |
Mar 05 12:40:56 PM PST 24 |
21381771 ps |
T749 |
/workspace/coverage/cover_reg_top/14.gpio_tl_errors.3028804624 |
|
|
Mar 05 12:41:10 PM PST 24 |
Mar 05 12:41:12 PM PST 24 |
60999721 ps |
T99 |
/workspace/coverage/cover_reg_top/13.gpio_same_csr_outstanding.827973257 |
|
|
Mar 05 12:40:59 PM PST 24 |
Mar 05 12:41:00 PM PST 24 |
31907974 ps |
T750 |
/workspace/coverage/cover_reg_top/16.gpio_csr_rw.2757803440 |
|
|
Mar 05 12:40:50 PM PST 24 |
Mar 05 12:40:51 PM PST 24 |
67123030 ps |
T88 |
/workspace/coverage/cover_reg_top/7.gpio_csr_rw.2521395364 |
|
|
Mar 05 12:40:30 PM PST 24 |
Mar 05 12:40:32 PM PST 24 |
16845576 ps |
T100 |
/workspace/coverage/cover_reg_top/8.gpio_same_csr_outstanding.3261047977 |
|
|
Mar 05 12:40:58 PM PST 24 |
Mar 05 12:40:59 PM PST 24 |
33844237 ps |
T751 |
/workspace/coverage/cover_reg_top/47.gpio_intr_test.4280995997 |
|
|
Mar 05 12:40:53 PM PST 24 |
Mar 05 12:40:54 PM PST 24 |
13128384 ps |
T752 |
/workspace/coverage/cover_reg_top/10.gpio_csr_mem_rw_with_rand_reset.2592745263 |
|
|
Mar 05 12:41:06 PM PST 24 |
Mar 05 12:41:07 PM PST 24 |
30217133 ps |
T101 |
/workspace/coverage/cover_reg_top/9.gpio_same_csr_outstanding.1510786075 |
|
|
Mar 05 12:40:53 PM PST 24 |
Mar 05 12:40:54 PM PST 24 |
34113699 ps |
T753 |
/workspace/coverage/cover_reg_top/15.gpio_csr_mem_rw_with_rand_reset.2306445050 |
|
|
Mar 05 12:41:07 PM PST 24 |
Mar 05 12:41:08 PM PST 24 |
305193830 ps |
T89 |
/workspace/coverage/cover_reg_top/5.gpio_csr_rw.2586038229 |
|
|
Mar 05 12:40:45 PM PST 24 |
Mar 05 12:40:46 PM PST 24 |
71142939 ps |
T754 |
/workspace/coverage/cover_reg_top/33.gpio_intr_test.417825938 |
|
|
Mar 05 12:40:55 PM PST 24 |
Mar 05 12:40:56 PM PST 24 |
46462396 ps |
T755 |
/workspace/coverage/cover_reg_top/18.gpio_intr_test.3664110833 |
|
|
Mar 05 12:41:12 PM PST 24 |
Mar 05 12:41:14 PM PST 24 |
29190918 ps |
T756 |
/workspace/coverage/cover_reg_top/23.gpio_intr_test.2056484736 |
|
|
Mar 05 12:41:02 PM PST 24 |
Mar 05 12:41:03 PM PST 24 |
44550345 ps |
T757 |
/workspace/coverage/cover_reg_top/15.gpio_intr_test.2675832650 |
|
|
Mar 05 12:40:52 PM PST 24 |
Mar 05 12:40:53 PM PST 24 |
24241475 ps |
T758 |
/workspace/coverage/cover_reg_top/3.gpio_csr_hw_reset.3129521207 |
|
|
Mar 05 12:40:32 PM PST 24 |
Mar 05 12:40:33 PM PST 24 |
34132500 ps |
T759 |
/workspace/coverage/cover_reg_top/9.gpio_intr_test.3431862895 |
|
|
Mar 05 12:40:59 PM PST 24 |
Mar 05 12:40:59 PM PST 24 |
14669148 ps |