Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 4370529 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 19638300 1 T20 198 T22 229 T23 484751



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 9565466 1 T20 26 T22 49 T23 242598
values[0x0] 7096128 1 T20 85 T22 86 T23 173874
values[0x1] 7347235 1 T20 98 T22 113 T23 179432



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 3356870 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 20651959 1 T20 199 T22 232 T23 510232



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 85915 1 T23 2220 T29 3 T66 2
valid_sources[0x01] 99807 1 T20 4 T23 2297 T25 1
valid_sources[0x02] 98777 1 T20 10 T23 2221 T25 31
valid_sources[0x03] 88754 1 T23 2088 T26 2 T29 3
valid_sources[0x04] 93032 1 T20 4 T23 2340 T29 6
valid_sources[0x05] 97260 1 T23 2594 T26 2 T29 4
valid_sources[0x06] 100447 1 T20 2 T23 2310 T25 10
valid_sources[0x07] 97003 1 T23 2233 T26 2 T29 1
valid_sources[0x08] 88517 1 T23 2384 T26 2 T108 3
valid_sources[0x09] 91228 1 T23 2254 T25 34 T26 4
valid_sources[0x0a] 91323 1 T23 2361 T24 369 T26 1
valid_sources[0x0b] 86017 1 T20 7 T23 2272 T66 3
valid_sources[0x0c] 120340 1 T20 1 T23 2073 T29 7
valid_sources[0x0d] 98284 1 T23 2405 T29 1 T66 2
valid_sources[0x0e] 85101 1 T23 2197 T29 5 T66 4
valid_sources[0x0f] 82519 1 T23 2432 T25 6 T29 2
valid_sources[0x10] 96263 1 T23 2533 T29 8 T108 1
valid_sources[0x11] 95267 1 T20 1 T23 2341 T26 1
valid_sources[0x12] 87853 1 T23 2342 T26 2 T66 4
valid_sources[0x13] 84829 1 T23 2558 T27 8 T29 3
valid_sources[0x14] 94593 1 T20 4 T23 2331 T29 7
valid_sources[0x15] 94756 1 T23 2355 T29 2 T66 4
valid_sources[0x16] 94406 1 T23 2290 T31 1 T32 8
valid_sources[0x17] 89326 1 T23 2188 T66 3 T108 7
valid_sources[0x18] 154777 1 T23 2705 T66 1 T109 2
valid_sources[0x19] 90193 1 T23 2429 T29 2 T66 2
valid_sources[0x1a] 89756 1 T23 2313 T25 1 T31 13
valid_sources[0x1b] 92385 1 T20 1 T23 2417 T108 2
valid_sources[0x1c] 93525 1 T20 2 T23 2236 T29 2
valid_sources[0x1d] 95766 1 T23 2378 T29 2 T66 1
valid_sources[0x1e] 85490 1 T20 6 T23 2472 T25 2
valid_sources[0x1f] 192744 1 T23 2423 T110 1 T32 1
valid_sources[0x20] 94704 1 T23 2337 T25 25 T29 3
valid_sources[0x21] 89098 1 T23 2645 T26 1 T66 1
valid_sources[0x22] 89675 1 T23 2324 T29 4 T66 1
valid_sources[0x23] 88614 1 T23 2094 T66 1 T108 8
valid_sources[0x24] 86118 1 T23 2188 T26 2 T29 6
valid_sources[0x25] 97028 1 T23 2496 T66 1 T31 2
valid_sources[0x26] 93962 1 T23 2192 T26 2 T66 1
valid_sources[0x27] 87559 1 T20 1 T23 2230 T29 5
valid_sources[0x28] 88916 1 T23 2176 T26 1 T29 5
valid_sources[0x29] 93177 1 T23 2271 T26 1 T29 2
valid_sources[0x2a] 89401 1 T23 2338 T26 2 T29 2
valid_sources[0x2b] 87699 1 T20 5 T23 2103 T26 1
valid_sources[0x2c] 87936 1 T23 2110 T66 2 T108 5
valid_sources[0x2d] 94701 1 T23 2286 T29 3 T66 1
valid_sources[0x2e] 89638 1 T23 2319 T29 4 T66 2
valid_sources[0x2f] 95820 1 T23 2507 T29 12 T66 3
valid_sources[0x30] 85592 1 T23 2420 T25 43 T26 4
valid_sources[0x31] 89292 1 T23 2403 T29 6 T66 1
valid_sources[0x32] 83915 1 T23 2674 T27 3 T29 6
valid_sources[0x33] 88550 1 T23 2291 T27 1 T66 4
valid_sources[0x34] 96141 1 T23 2217 T66 1 T111 3
valid_sources[0x35] 92814 1 T20 1 T23 2371 T29 3
valid_sources[0x36] 94689 1 T20 2 T23 2286 T25 28
valid_sources[0x37] 88174 1 T20 2 T23 2219 T29 2
valid_sources[0x38] 97022 1 T23 2139 T66 1 T32 7
valid_sources[0x39] 85404 1 T23 2316 T29 14 T32 1
valid_sources[0x3a] 98633 1 T20 6 T23 2389 T29 4
valid_sources[0x3b] 157637 1 T23 2094 T26 2 T29 2
valid_sources[0x3c] 88344 1 T23 2247 T66 1 T31 9
valid_sources[0x3d] 90963 1 T23 2149 T26 1 T29 1
valid_sources[0x3e] 92696 1 T23 2353 T110 1 T109 3
valid_sources[0x3f] 92270 1 T23 2389 T29 2 T110 1
valid_sources[0x40] 81721 1 T20 2 T23 2452 T26 1
valid_sources[0x41] 87969 1 T23 2512 T26 4 T29 4
valid_sources[0x42] 92236 1 T23 2221 T29 2 T66 3
valid_sources[0x43] 96623 1 T23 2179 T66 1 T108 5
valid_sources[0x44] 92507 1 T23 2351 T29 2 T66 1
valid_sources[0x45] 92420 1 T23 2302 T26 1 T29 1
valid_sources[0x46] 91524 1 T23 2444 T29 1 T32 1
valid_sources[0x47] 97147 1 T23 2534 T26 1 T66 4
valid_sources[0x48] 87597 1 T20 3 T23 2464 T29 1
valid_sources[0x49] 99543 1 T23 2382 T29 3 T31 5
valid_sources[0x4a] 96721 1 T23 2307 T29 18 T66 1
valid_sources[0x4b] 91786 1 T20 2 T23 2251 T66 3
valid_sources[0x4c] 199635 1 T23 2482 T30 106757 T66 1
valid_sources[0x4d] 87400 1 T23 2459 T66 3 T111 1
valid_sources[0x4e] 91593 1 T23 2443 T26 2 T27 7
valid_sources[0x4f] 89408 1 T23 2507 T66 4 T31 2
valid_sources[0x50] 95079 1 T23 2134 T26 1 T28 634
valid_sources[0x51] 93988 1 T23 2358 T29 2 T108 1
valid_sources[0x52] 102682 1 T20 2 T23 1950 T25 49
valid_sources[0x53] 94347 1 T23 2355 T26 3 T29 3
valid_sources[0x54] 95235 1 T23 2226 T66 1 T31 1
valid_sources[0x55] 91039 1 T23 2099 T29 1 T110 1
valid_sources[0x56] 91651 1 T23 2250 T29 2 T66 2
valid_sources[0x57] 86888 1 T20 2 T23 2415 T29 1
valid_sources[0x58] 88297 1 T23 2333 T29 10 T111 1
valid_sources[0x59] 162565 1 T23 2424 T26 2 T31 3
valid_sources[0x5a] 92447 1 T23 2064 T26 1 T66 2
valid_sources[0x5b] 98467 1 T23 2602 T26 6 T29 7
valid_sources[0x5c] 96638 1 T20 3 T23 2276 T26 1
valid_sources[0x5d] 91575 1 T23 2308 T26 1 T31 14
valid_sources[0x5e] 91133 1 T23 2067 T29 2 T31 5
valid_sources[0x5f] 97147 1 T23 2409 T26 1 T32 1
valid_sources[0x60] 90784 1 T23 2453 T26 2 T29 2
valid_sources[0x61] 87789 1 T23 2195 T29 3 T66 1
valid_sources[0x62] 109122 1 T23 2469 T66 3 T108 3
valid_sources[0x63] 87145 1 T20 1 T23 2119 T26 3
valid_sources[0x64] 85180 1 T20 3 T23 2305 T25 4
valid_sources[0x65] 89872 1 T23 2514 T29 4 T66 2
valid_sources[0x66] 85698 1 T23 2025 T25 13 T29 2
valid_sources[0x67] 97889 1 T23 2188 T29 2 T66 1
valid_sources[0x68] 91030 1 T23 2161 T27 5 T66 1
valid_sources[0x69] 93275 1 T23 2374 T66 1 T109 3
valid_sources[0x6a] 85266 1 T23 2240 T25 6 T27 19
valid_sources[0x6b] 92728 1 T23 2198 T26 2 T32 2
valid_sources[0x6c] 93309 1 T23 2325 T25 5 T31 2
valid_sources[0x6d] 97457 1 T23 2192 T66 4 T110 3
valid_sources[0x6e] 83118 1 T23 2326 T26 1 T29 3
valid_sources[0x6f] 93027 1 T23 2339 T26 2 T108 13
valid_sources[0x70] 83933 1 T23 2242 T26 2 T29 2
valid_sources[0x71] 94219 1 T23 2498 T29 1 T66 2
valid_sources[0x72] 98399 1 T20 2 T23 2331 T25 1
valid_sources[0x73] 102710 1 T20 4 T23 2386 T25 27
valid_sources[0x74] 95137 1 T23 2311 T25 8 T66 2
valid_sources[0x75] 87510 1 T20 1 T23 2248 T26 1
valid_sources[0x76] 92371 1 T23 2300 T29 2 T110 2
valid_sources[0x77] 92033 1 T23 2274 T26 1 T66 2
valid_sources[0x78] 90697 1 T23 2527 T29 2 T66 1
valid_sources[0x79] 95011 1 T23 2338 T25 5 T29 2
valid_sources[0x7a] 124640 1 T23 2388 T29 2 T66 1
valid_sources[0x7b] 89913 1 T20 6 T23 2373 T29 1
valid_sources[0x7c] 88397 1 T20 6 T23 2279 T25 8
valid_sources[0x7d] 92136 1 T23 2554 T25 1 T29 6
valid_sources[0x7e] 91752 1 T20 3 T23 2317 T26 2
valid_sources[0x7f] 93794 1 T23 2386 T29 2 T66 2
valid_sources[0x80] 89754 1 T23 2283 T29 1 T110 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 5496475 1 T20 15 T22 30 T23 138579
values[0x0] all_enables biggest_size 7070931 1 T20 85 T22 86 T23 173344
values[0x1] all_enables biggest_size 7070894 1 T20 98 T22 113 T23 172828

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%