Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.63 99.06 99.24 100.00 99.80 99.68 99.99


Total test records in report: 941
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html

T541 /workspace/coverage/default/1.gpio_filter_stress.1428010964 Mar 31 12:38:00 PM PDT 24 Mar 31 12:38:26 PM PDT 24 1109425260 ps
T542 /workspace/coverage/default/37.gpio_stress_all_with_rand_reset.3712861138 Mar 31 12:39:16 PM PDT 24 Mar 31 12:54:46 PM PDT 24 45965579971 ps
T543 /workspace/coverage/default/47.gpio_random_dout_din_no_pullup_pulldown.3687743481 Mar 31 12:39:09 PM PDT 24 Mar 31 12:39:11 PM PDT 24 522579941 ps
T544 /workspace/coverage/default/39.gpio_random_dout_din_no_pullup_pulldown.3528448063 Mar 31 12:39:15 PM PDT 24 Mar 31 12:39:17 PM PDT 24 180076030 ps
T545 /workspace/coverage/default/22.gpio_smoke_no_pullup_pulldown.3096190694 Mar 31 12:38:16 PM PDT 24 Mar 31 12:38:18 PM PDT 24 46556901 ps
T546 /workspace/coverage/default/36.gpio_smoke.2931309446 Mar 31 12:39:06 PM PDT 24 Mar 31 12:39:08 PM PDT 24 192908628 ps
T547 /workspace/coverage/default/20.gpio_full_random.4090352327 Mar 31 12:38:15 PM PDT 24 Mar 31 12:38:16 PM PDT 24 132267426 ps
T548 /workspace/coverage/default/30.gpio_rand_intr_trigger.3133379069 Mar 31 12:38:42 PM PDT 24 Mar 31 12:38:44 PM PDT 24 80005576 ps
T549 /workspace/coverage/default/20.gpio_intr_with_filter_rand_intr_event.1581903858 Mar 31 12:38:20 PM PDT 24 Mar 31 12:38:23 PM PDT 24 154688176 ps
T550 /workspace/coverage/default/3.gpio_intr_with_filter_rand_intr_event.4140308338 Mar 31 12:37:45 PM PDT 24 Mar 31 12:37:46 PM PDT 24 28221574 ps
T551 /workspace/coverage/default/42.gpio_stress_all_with_rand_reset.441200416 Mar 31 12:39:08 PM PDT 24 Mar 31 01:00:40 PM PDT 24 62949860197 ps
T552 /workspace/coverage/default/36.gpio_rand_intr_trigger.3026207096 Mar 31 12:38:51 PM PDT 24 Mar 31 12:38:52 PM PDT 24 200251738 ps
T553 /workspace/coverage/default/41.gpio_stress_all.1836002813 Mar 31 12:39:08 PM PDT 24 Mar 31 12:42:24 PM PDT 24 7131633953 ps
T554 /workspace/coverage/default/42.gpio_rand_intr_trigger.2680202728 Mar 31 12:39:11 PM PDT 24 Mar 31 12:39:12 PM PDT 24 238454439 ps
T555 /workspace/coverage/default/32.gpio_smoke.1725870498 Mar 31 12:38:39 PM PDT 24 Mar 31 12:38:40 PM PDT 24 64990273 ps
T556 /workspace/coverage/default/6.gpio_random_dout_din.2507494225 Mar 31 12:37:56 PM PDT 24 Mar 31 12:37:57 PM PDT 24 21758900 ps
T557 /workspace/coverage/default/39.gpio_stress_all_with_rand_reset.687157709 Mar 31 12:39:09 PM PDT 24 Mar 31 12:45:22 PM PDT 24 33275428522 ps
T558 /workspace/coverage/default/20.gpio_filter_stress.1247573181 Mar 31 12:38:28 PM PDT 24 Mar 31 12:38:33 PM PDT 24 136176571 ps
T559 /workspace/coverage/default/10.gpio_intr_with_filter_rand_intr_event.1992613349 Mar 31 12:38:04 PM PDT 24 Mar 31 12:38:06 PM PDT 24 332155118 ps
T560 /workspace/coverage/default/36.gpio_smoke_no_pullup_pulldown.2780756865 Mar 31 12:39:07 PM PDT 24 Mar 31 12:39:08 PM PDT 24 231373491 ps
T561 /workspace/coverage/default/35.gpio_stress_all_with_rand_reset.89507497 Mar 31 12:39:04 PM PDT 24 Mar 31 01:00:50 PM PDT 24 377352559508 ps
T562 /workspace/coverage/default/27.gpio_smoke_no_pullup_pulldown.110051461 Mar 31 12:38:27 PM PDT 24 Mar 31 12:38:28 PM PDT 24 110063992 ps
T563 /workspace/coverage/default/39.gpio_intr_with_filter_rand_intr_event.3563782244 Mar 31 12:39:02 PM PDT 24 Mar 31 12:39:04 PM PDT 24 166527642 ps
T564 /workspace/coverage/default/24.gpio_intr_rand_pgm.526266019 Mar 31 12:38:25 PM PDT 24 Mar 31 12:38:26 PM PDT 24 132637680 ps
T565 /workspace/coverage/default/49.gpio_full_random.841583062 Mar 31 12:39:16 PM PDT 24 Mar 31 12:39:18 PM PDT 24 114959353 ps
T566 /workspace/coverage/default/15.gpio_smoke.4097852859 Mar 31 12:38:12 PM PDT 24 Mar 31 12:38:13 PM PDT 24 42582975 ps
T567 /workspace/coverage/default/34.gpio_smoke.474310759 Mar 31 12:38:47 PM PDT 24 Mar 31 12:38:49 PM PDT 24 107903139 ps
T568 /workspace/coverage/default/42.gpio_smoke.4149987616 Mar 31 12:39:11 PM PDT 24 Mar 31 12:39:13 PM PDT 24 72189312 ps
T569 /workspace/coverage/default/20.gpio_random_dout_din_no_pullup_pulldown.4259889725 Mar 31 12:38:19 PM PDT 24 Mar 31 12:38:20 PM PDT 24 154407418 ps
T570 /workspace/coverage/default/13.gpio_alert_test.2022631624 Mar 31 12:38:22 PM PDT 24 Mar 31 12:38:23 PM PDT 24 11994782 ps
T571 /workspace/coverage/default/18.gpio_intr_with_filter_rand_intr_event.3832947271 Mar 31 12:38:18 PM PDT 24 Mar 31 12:38:20 PM PDT 24 80658441 ps
T572 /workspace/coverage/default/12.gpio_full_random.336343620 Mar 31 12:38:09 PM PDT 24 Mar 31 12:38:10 PM PDT 24 103053900 ps
T573 /workspace/coverage/default/14.gpio_intr_with_filter_rand_intr_event.4176641644 Mar 31 12:38:06 PM PDT 24 Mar 31 12:38:09 PM PDT 24 451947720 ps
T574 /workspace/coverage/default/40.gpio_random_long_reg_writes_reg_reads.2589932358 Mar 31 12:39:03 PM PDT 24 Mar 31 12:39:06 PM PDT 24 271836216 ps
T575 /workspace/coverage/default/32.gpio_alert_test.4221510886 Mar 31 12:38:46 PM PDT 24 Mar 31 12:38:47 PM PDT 24 43224875 ps
T576 /workspace/coverage/default/9.gpio_alert_test.107163232 Mar 31 12:38:04 PM PDT 24 Mar 31 12:38:05 PM PDT 24 49440984 ps
T577 /workspace/coverage/default/15.gpio_filter_stress.1830160232 Mar 31 12:38:11 PM PDT 24 Mar 31 12:38:30 PM PDT 24 799109940 ps
T578 /workspace/coverage/default/27.gpio_smoke.1285625266 Mar 31 12:38:26 PM PDT 24 Mar 31 12:38:27 PM PDT 24 92192956 ps
T579 /workspace/coverage/default/26.gpio_intr_rand_pgm.506745231 Mar 31 12:38:47 PM PDT 24 Mar 31 12:38:48 PM PDT 24 41930281 ps
T580 /workspace/coverage/default/29.gpio_dout_din_regs_random_rw.3617091185 Mar 31 12:38:53 PM PDT 24 Mar 31 12:38:54 PM PDT 24 85773719 ps
T581 /workspace/coverage/default/39.gpio_smoke.252795270 Mar 31 12:39:06 PM PDT 24 Mar 31 12:39:07 PM PDT 24 66533533 ps
T582 /workspace/coverage/default/35.gpio_random_long_reg_writes_reg_reads.2422831863 Mar 31 12:38:48 PM PDT 24 Mar 31 12:38:49 PM PDT 24 198571331 ps
T583 /workspace/coverage/default/12.gpio_filter_stress.1968851712 Mar 31 12:38:24 PM PDT 24 Mar 31 12:38:44 PM PDT 24 439240585 ps
T584 /workspace/coverage/default/48.gpio_full_random.2025470654 Mar 31 12:39:19 PM PDT 24 Mar 31 12:39:20 PM PDT 24 63739126 ps
T585 /workspace/coverage/default/46.gpio_smoke_no_pullup_pulldown.1506996978 Mar 31 12:39:16 PM PDT 24 Mar 31 12:39:17 PM PDT 24 77027596 ps
T586 /workspace/coverage/default/24.gpio_intr_with_filter_rand_intr_event.2388689819 Mar 31 12:38:20 PM PDT 24 Mar 31 12:38:23 PM PDT 24 75100814 ps
T587 /workspace/coverage/default/17.gpio_full_random.2464200773 Mar 31 12:38:18 PM PDT 24 Mar 31 12:38:19 PM PDT 24 238492109 ps
T588 /workspace/coverage/default/6.gpio_full_random.671843149 Mar 31 12:37:53 PM PDT 24 Mar 31 12:37:55 PM PDT 24 88117096 ps
T589 /workspace/coverage/default/36.gpio_filter_stress.1522190460 Mar 31 12:39:05 PM PDT 24 Mar 31 12:39:17 PM PDT 24 382705486 ps
T590 /workspace/coverage/default/48.gpio_stress_all.4240888668 Mar 31 12:39:23 PM PDT 24 Mar 31 12:42:20 PM PDT 24 12190587101 ps
T591 /workspace/coverage/default/43.gpio_random_dout_din.608868170 Mar 31 12:39:12 PM PDT 24 Mar 31 12:39:14 PM PDT 24 205568104 ps
T592 /workspace/coverage/default/19.gpio_smoke.1653615369 Mar 31 12:38:19 PM PDT 24 Mar 31 12:38:20 PM PDT 24 142064985 ps
T593 /workspace/coverage/default/4.gpio_random_dout_din.2875570659 Mar 31 12:37:58 PM PDT 24 Mar 31 12:37:59 PM PDT 24 34396443 ps
T594 /workspace/coverage/default/1.gpio_intr_with_filter_rand_intr_event.3036333875 Mar 31 12:37:49 PM PDT 24 Mar 31 12:37:52 PM PDT 24 64911892 ps
T595 /workspace/coverage/default/31.gpio_alert_test.235103845 Mar 31 12:38:37 PM PDT 24 Mar 31 12:38:38 PM PDT 24 11637699 ps
T596 /workspace/coverage/default/46.gpio_intr_rand_pgm.3752394311 Mar 31 12:39:13 PM PDT 24 Mar 31 12:39:14 PM PDT 24 195277776 ps
T597 /workspace/coverage/default/39.gpio_filter_stress.1493183256 Mar 31 12:39:22 PM PDT 24 Mar 31 12:39:50 PM PDT 24 980520397 ps
T598 /workspace/coverage/default/16.gpio_full_random.1706811408 Mar 31 12:38:23 PM PDT 24 Mar 31 12:38:24 PM PDT 24 32010866 ps
T599 /workspace/coverage/default/4.gpio_alert_test.2743432399 Mar 31 12:38:13 PM PDT 24 Mar 31 12:38:14 PM PDT 24 41471809 ps
T600 /workspace/coverage/default/33.gpio_stress_all.3107178305 Mar 31 12:39:14 PM PDT 24 Mar 31 12:40:50 PM PDT 24 7337981701 ps
T601 /workspace/coverage/default/37.gpio_random_dout_din.1475195017 Mar 31 12:39:02 PM PDT 24 Mar 31 12:39:03 PM PDT 24 88696921 ps
T602 /workspace/coverage/default/13.gpio_full_random.2627365677 Mar 31 12:38:12 PM PDT 24 Mar 31 12:38:13 PM PDT 24 72067379 ps
T603 /workspace/coverage/default/18.gpio_full_random.1959823089 Mar 31 12:38:15 PM PDT 24 Mar 31 12:38:16 PM PDT 24 66527247 ps
T604 /workspace/coverage/default/45.gpio_smoke.3883919918 Mar 31 12:39:13 PM PDT 24 Mar 31 12:39:15 PM PDT 24 171931694 ps
T605 /workspace/coverage/default/34.gpio_rand_intr_trigger.40322586 Mar 31 12:39:11 PM PDT 24 Mar 31 12:39:15 PM PDT 24 76984023 ps
T606 /workspace/coverage/default/5.gpio_random_dout_din_no_pullup_pulldown.3990974933 Mar 31 12:38:05 PM PDT 24 Mar 31 12:38:06 PM PDT 24 24200973 ps
T607 /workspace/coverage/default/10.gpio_stress_all.3463489779 Mar 31 12:38:20 PM PDT 24 Mar 31 12:40:41 PM PDT 24 5379131051 ps
T608 /workspace/coverage/default/15.gpio_random_dout_din.2347949108 Mar 31 12:38:12 PM PDT 24 Mar 31 12:38:13 PM PDT 24 41731755 ps
T609 /workspace/coverage/default/10.gpio_smoke_no_pullup_pulldown.2805565093 Mar 31 12:38:06 PM PDT 24 Mar 31 12:38:07 PM PDT 24 38782282 ps
T610 /workspace/coverage/default/21.gpio_alert_test.1165155082 Mar 31 12:38:38 PM PDT 24 Mar 31 12:38:39 PM PDT 24 11583479 ps
T611 /workspace/coverage/default/24.gpio_random_dout_din.2657062531 Mar 31 12:38:19 PM PDT 24 Mar 31 12:38:20 PM PDT 24 51784148 ps
T612 /workspace/coverage/default/45.gpio_random_dout_din.672422126 Mar 31 12:39:11 PM PDT 24 Mar 31 12:39:13 PM PDT 24 64794901 ps
T613 /workspace/coverage/default/48.gpio_dout_din_regs_random_rw.1122878247 Mar 31 12:39:11 PM PDT 24 Mar 31 12:39:13 PM PDT 24 35657288 ps
T614 /workspace/coverage/default/40.gpio_random_dout_din_no_pullup_pulldown.1516147675 Mar 31 12:39:13 PM PDT 24 Mar 31 12:39:15 PM PDT 24 148336385 ps
T615 /workspace/coverage/default/17.gpio_stress_all.4136056442 Mar 31 12:38:12 PM PDT 24 Mar 31 12:39:12 PM PDT 24 4256859929 ps
T616 /workspace/coverage/default/37.gpio_rand_intr_trigger.1716331099 Mar 31 12:39:07 PM PDT 24 Mar 31 12:39:11 PM PDT 24 155153450 ps
T617 /workspace/coverage/default/22.gpio_filter_stress.1800162473 Mar 31 12:38:22 PM PDT 24 Mar 31 12:38:30 PM PDT 24 833501901 ps
T618 /workspace/coverage/default/44.gpio_random_dout_din_no_pullup_pulldown.1365453521 Mar 31 12:39:04 PM PDT 24 Mar 31 12:39:06 PM PDT 24 31148653 ps
T619 /workspace/coverage/default/42.gpio_random_dout_din.3754872522 Mar 31 12:39:12 PM PDT 24 Mar 31 12:39:14 PM PDT 24 75202670 ps
T620 /workspace/coverage/default/21.gpio_rand_intr_trigger.2413720456 Mar 31 12:38:24 PM PDT 24 Mar 31 12:38:27 PM PDT 24 260539958 ps
T621 /workspace/coverage/default/30.gpio_filter_stress.3641471193 Mar 31 12:38:42 PM PDT 24 Mar 31 12:38:52 PM PDT 24 296251273 ps
T622 /workspace/coverage/default/37.gpio_intr_rand_pgm.1201703358 Mar 31 12:39:00 PM PDT 24 Mar 31 12:39:02 PM PDT 24 171504265 ps
T623 /workspace/coverage/default/32.gpio_random_dout_din_no_pullup_pulldown.1852858265 Mar 31 12:39:16 PM PDT 24 Mar 31 12:39:18 PM PDT 24 28963150 ps
T624 /workspace/coverage/default/23.gpio_full_random.299256404 Mar 31 12:38:25 PM PDT 24 Mar 31 12:38:28 PM PDT 24 220754184 ps
T625 /workspace/coverage/default/6.gpio_rand_intr_trigger.1548634535 Mar 31 12:37:54 PM PDT 24 Mar 31 12:37:58 PM PDT 24 327665443 ps
T626 /workspace/coverage/default/5.gpio_intr_rand_pgm.3762539383 Mar 31 12:37:50 PM PDT 24 Mar 31 12:37:53 PM PDT 24 268771507 ps
T627 /workspace/coverage/default/9.gpio_random_dout_din_no_pullup_pulldown.2540909685 Mar 31 12:37:58 PM PDT 24 Mar 31 12:37:59 PM PDT 24 143111134 ps
T628 /workspace/coverage/default/20.gpio_rand_intr_trigger.121740760 Mar 31 12:38:31 PM PDT 24 Mar 31 12:38:33 PM PDT 24 547628030 ps
T629 /workspace/coverage/default/43.gpio_smoke.2562107985 Mar 31 12:39:12 PM PDT 24 Mar 31 12:39:13 PM PDT 24 96219104 ps
T630 /workspace/coverage/default/16.gpio_intr_with_filter_rand_intr_event.62923873 Mar 31 12:38:24 PM PDT 24 Mar 31 12:38:28 PM PDT 24 1440277984 ps
T631 /workspace/coverage/default/34.gpio_stress_all.1537373340 Mar 31 12:38:47 PM PDT 24 Mar 31 12:40:49 PM PDT 24 19049116069 ps
T632 /workspace/coverage/default/45.gpio_filter_stress.3516822577 Mar 31 12:39:11 PM PDT 24 Mar 31 12:39:20 PM PDT 24 276212963 ps
T633 /workspace/coverage/default/15.gpio_full_random.1436978389 Mar 31 12:38:19 PM PDT 24 Mar 31 12:38:20 PM PDT 24 101240158 ps
T634 /workspace/coverage/default/17.gpio_smoke.3914012877 Mar 31 12:38:21 PM PDT 24 Mar 31 12:38:22 PM PDT 24 49284487 ps
T635 /workspace/coverage/default/44.gpio_smoke_no_pullup_pulldown.2301521094 Mar 31 12:39:14 PM PDT 24 Mar 31 12:39:15 PM PDT 24 427298277 ps
T636 /workspace/coverage/default/48.gpio_random_long_reg_writes_reg_reads.3016804174 Mar 31 12:39:12 PM PDT 24 Mar 31 12:39:17 PM PDT 24 139359293 ps
T637 /workspace/coverage/default/18.gpio_random_dout_din.3010284143 Mar 31 12:38:23 PM PDT 24 Mar 31 12:38:24 PM PDT 24 165430155 ps
T638 /workspace/coverage/default/11.gpio_alert_test.894706195 Mar 31 12:38:24 PM PDT 24 Mar 31 12:38:28 PM PDT 24 52386823 ps
T639 /workspace/coverage/default/47.gpio_intr_with_filter_rand_intr_event.1700499210 Mar 31 12:39:07 PM PDT 24 Mar 31 12:39:10 PM PDT 24 121145819 ps
T640 /workspace/coverage/default/1.gpio_stress_all.332981244 Mar 31 12:37:38 PM PDT 24 Mar 31 12:39:14 PM PDT 24 14619228155 ps
T641 /workspace/coverage/default/33.gpio_smoke_no_pullup_pulldown.1637560705 Mar 31 12:39:04 PM PDT 24 Mar 31 12:39:05 PM PDT 24 40048102 ps
T642 /workspace/coverage/default/13.gpio_smoke.2599671458 Mar 31 12:38:22 PM PDT 24 Mar 31 12:38:23 PM PDT 24 51759841 ps
T643 /workspace/coverage/default/33.gpio_smoke.3486635394 Mar 31 12:38:52 PM PDT 24 Mar 31 12:38:54 PM PDT 24 70385199 ps
T644 /workspace/coverage/default/22.gpio_smoke.2990586442 Mar 31 12:38:17 PM PDT 24 Mar 31 12:38:18 PM PDT 24 159279792 ps
T645 /workspace/coverage/default/14.gpio_stress_all.865872609 Mar 31 12:38:10 PM PDT 24 Mar 31 12:38:42 PM PDT 24 2225026836 ps
T646 /workspace/coverage/default/47.gpio_alert_test.2845512016 Mar 31 12:39:14 PM PDT 24 Mar 31 12:39:15 PM PDT 24 13101927 ps
T647 /workspace/coverage/default/48.gpio_intr_with_filter_rand_intr_event.3404019060 Mar 31 12:39:14 PM PDT 24 Mar 31 12:39:19 PM PDT 24 611174148 ps
T648 /workspace/coverage/default/22.gpio_full_random.726591627 Mar 31 12:38:26 PM PDT 24 Mar 31 12:38:27 PM PDT 24 99368567 ps
T649 /workspace/coverage/default/27.gpio_alert_test.3180077481 Mar 31 12:38:37 PM PDT 24 Mar 31 12:38:38 PM PDT 24 10746786 ps
T650 /workspace/coverage/default/19.gpio_rand_intr_trigger.2950662466 Mar 31 12:38:23 PM PDT 24 Mar 31 12:38:26 PM PDT 24 768373241 ps
T651 /workspace/coverage/default/46.gpio_stress_all.2901240720 Mar 31 12:39:15 PM PDT 24 Mar 31 12:40:11 PM PDT 24 33569746738 ps
T652 /workspace/coverage/default/33.gpio_random_dout_din.804116264 Mar 31 12:39:07 PM PDT 24 Mar 31 12:39:08 PM PDT 24 609596013 ps
T653 /workspace/coverage/default/26.gpio_dout_din_regs_random_rw.3992882010 Mar 31 12:38:23 PM PDT 24 Mar 31 12:38:24 PM PDT 24 87031388 ps
T654 /workspace/coverage/default/3.gpio_dout_din_regs_random_rw.3285928240 Mar 31 12:37:50 PM PDT 24 Mar 31 12:37:51 PM PDT 24 23570919 ps
T655 /workspace/coverage/default/34.gpio_random_dout_din.2495114174 Mar 31 12:39:11 PM PDT 24 Mar 31 12:39:13 PM PDT 24 18141364 ps
T656 /workspace/coverage/default/5.gpio_random_long_reg_writes_reg_reads.608949587 Mar 31 12:37:52 PM PDT 24 Mar 31 12:37:58 PM PDT 24 366544575 ps
T657 /workspace/coverage/default/3.gpio_rand_intr_trigger.122363890 Mar 31 12:38:01 PM PDT 24 Mar 31 12:38:04 PM PDT 24 70067943 ps
T658 /workspace/coverage/default/37.gpio_random_long_reg_writes_reg_reads.231270923 Mar 31 12:39:22 PM PDT 24 Mar 31 12:39:24 PM PDT 24 670373722 ps
T659 /workspace/coverage/default/0.gpio_random_long_reg_writes_reg_reads.2236641337 Mar 31 12:37:38 PM PDT 24 Mar 31 12:37:42 PM PDT 24 1025128080 ps
T660 /workspace/coverage/default/28.gpio_intr_with_filter_rand_intr_event.1615363219 Mar 31 12:38:55 PM PDT 24 Mar 31 12:38:59 PM PDT 24 712968398 ps
T661 /workspace/coverage/default/24.gpio_random_dout_din_no_pullup_pulldown.176071965 Mar 31 12:38:19 PM PDT 24 Mar 31 12:38:20 PM PDT 24 33353479 ps
T662 /workspace/coverage/default/49.gpio_smoke_no_pullup_pulldown.2133541368 Mar 31 12:39:10 PM PDT 24 Mar 31 12:39:11 PM PDT 24 149278243 ps
T663 /workspace/coverage/default/13.gpio_intr_with_filter_rand_intr_event.4224461975 Mar 31 12:38:16 PM PDT 24 Mar 31 12:38:17 PM PDT 24 140692235 ps
T664 /workspace/coverage/default/8.gpio_random_dout_din.2787972440 Mar 31 12:37:58 PM PDT 24 Mar 31 12:37:59 PM PDT 24 45834599 ps
T665 /workspace/coverage/default/16.gpio_filter_stress.3322767983 Mar 31 12:38:13 PM PDT 24 Mar 31 12:38:23 PM PDT 24 196069082 ps
T666 /workspace/coverage/default/28.gpio_full_random.1845871860 Mar 31 12:38:42 PM PDT 24 Mar 31 12:38:43 PM PDT 24 54380357 ps
T667 /workspace/coverage/default/32.gpio_smoke_no_pullup_pulldown.693608652 Mar 31 12:38:40 PM PDT 24 Mar 31 12:38:42 PM PDT 24 794513035 ps
T668 /workspace/coverage/default/23.gpio_random_dout_din.2893674192 Mar 31 12:38:18 PM PDT 24 Mar 31 12:38:19 PM PDT 24 26889501 ps
T669 /workspace/coverage/default/15.gpio_random_long_reg_writes_reg_reads.4007948645 Mar 31 12:38:18 PM PDT 24 Mar 31 12:38:22 PM PDT 24 310352169 ps
T670 /workspace/coverage/default/2.gpio_smoke.281970864 Mar 31 12:38:00 PM PDT 24 Mar 31 12:38:01 PM PDT 24 26174214 ps
T671 /workspace/coverage/default/45.gpio_rand_intr_trigger.2238131264 Mar 31 12:39:10 PM PDT 24 Mar 31 12:39:12 PM PDT 24 46342396 ps
T672 /workspace/coverage/default/4.gpio_random_long_reg_writes_reg_reads.1712588188 Mar 31 12:37:49 PM PDT 24 Mar 31 12:37:54 PM PDT 24 356844413 ps
T673 /workspace/coverage/default/27.gpio_rand_intr_trigger.3993832574 Mar 31 12:38:56 PM PDT 24 Mar 31 12:38:58 PM PDT 24 82820635 ps
T674 /workspace/coverage/default/39.gpio_random_long_reg_writes_reg_reads.4089206165 Mar 31 12:39:01 PM PDT 24 Mar 31 12:39:04 PM PDT 24 642565922 ps
T675 /workspace/coverage/default/42.gpio_intr_rand_pgm.405753546 Mar 31 12:39:16 PM PDT 24 Mar 31 12:39:18 PM PDT 24 166143258 ps
T676 /workspace/coverage/default/42.gpio_full_random.1481616721 Mar 31 12:39:20 PM PDT 24 Mar 31 12:39:21 PM PDT 24 80648918 ps
T677 /workspace/coverage/default/10.gpio_alert_test.191868660 Mar 31 12:38:05 PM PDT 24 Mar 31 12:38:06 PM PDT 24 34094783 ps
T678 /workspace/coverage/default/44.gpio_full_random.122542921 Mar 31 12:39:15 PM PDT 24 Mar 31 12:39:17 PM PDT 24 212764518 ps
T679 /workspace/coverage/default/46.gpio_random_dout_din_no_pullup_pulldown.200959422 Mar 31 12:39:18 PM PDT 24 Mar 31 12:39:18 PM PDT 24 18893300 ps
T680 /workspace/coverage/default/48.gpio_smoke.596106876 Mar 31 12:39:12 PM PDT 24 Mar 31 12:39:13 PM PDT 24 85225794 ps
T681 /workspace/coverage/default/28.gpio_stress_all.327974581 Mar 31 12:38:37 PM PDT 24 Mar 31 12:40:09 PM PDT 24 3647383707 ps
T682 /workspace/coverage/default/26.gpio_alert_test.1434493481 Mar 31 12:38:33 PM PDT 24 Mar 31 12:38:34 PM PDT 24 12246091 ps
T683 /workspace/coverage/default/22.gpio_intr_with_filter_rand_intr_event.1885688759 Mar 31 12:38:25 PM PDT 24 Mar 31 12:38:27 PM PDT 24 94874071 ps
T684 /workspace/coverage/default/30.gpio_random_long_reg_writes_reg_reads.2334132191 Mar 31 12:38:56 PM PDT 24 Mar 31 12:38:57 PM PDT 24 167055457 ps
T685 /workspace/coverage/default/43.gpio_full_random.3471728302 Mar 31 12:39:14 PM PDT 24 Mar 31 12:39:16 PM PDT 24 430648839 ps
T686 /workspace/coverage/default/10.gpio_dout_din_regs_random_rw.1449623908 Mar 31 12:38:18 PM PDT 24 Mar 31 12:38:19 PM PDT 24 85012264 ps
T687 /workspace/coverage/default/48.gpio_intr_rand_pgm.798104129 Mar 31 12:39:15 PM PDT 24 Mar 31 12:39:17 PM PDT 24 204647471 ps
T688 /workspace/coverage/default/15.gpio_alert_test.755661615 Mar 31 12:38:11 PM PDT 24 Mar 31 12:38:11 PM PDT 24 11472689 ps
T689 /workspace/coverage/default/27.gpio_random_dout_din.4106998592 Mar 31 12:38:29 PM PDT 24 Mar 31 12:38:31 PM PDT 24 57778602 ps
T690 /workspace/coverage/default/1.gpio_rand_intr_trigger.2353067358 Mar 31 12:37:36 PM PDT 24 Mar 31 12:37:38 PM PDT 24 334169075 ps
T691 /workspace/coverage/default/23.gpio_smoke.3356671725 Mar 31 12:38:21 PM PDT 24 Mar 31 12:38:22 PM PDT 24 55248424 ps
T692 /workspace/coverage/default/6.gpio_smoke.1039103873 Mar 31 12:37:57 PM PDT 24 Mar 31 12:37:58 PM PDT 24 117503950 ps
T693 /workspace/coverage/default/31.gpio_intr_with_filter_rand_intr_event.536470149 Mar 31 12:38:57 PM PDT 24 Mar 31 12:38:58 PM PDT 24 101610135 ps
T694 /workspace/coverage/default/25.gpio_smoke.3669387300 Mar 31 12:38:24 PM PDT 24 Mar 31 12:38:25 PM PDT 24 67363173 ps
T695 /workspace/coverage/default/13.gpio_random_dout_din_no_pullup_pulldown.2073624708 Mar 31 12:38:18 PM PDT 24 Mar 31 12:38:19 PM PDT 24 46425902 ps
T696 /workspace/coverage/default/7.gpio_smoke.427346584 Mar 31 12:37:53 PM PDT 24 Mar 31 12:37:55 PM PDT 24 43129691 ps
T697 /workspace/coverage/default/25.gpio_random_dout_din_no_pullup_pulldown.3317742401 Mar 31 12:38:25 PM PDT 24 Mar 31 12:38:26 PM PDT 24 70898186 ps
T698 /workspace/coverage/default/36.gpio_stress_all.1380413915 Mar 31 12:39:04 PM PDT 24 Mar 31 12:40:57 PM PDT 24 15366042735 ps
T699 /workspace/coverage/default/14.gpio_alert_test.2792466494 Mar 31 12:38:11 PM PDT 24 Mar 31 12:38:12 PM PDT 24 106751471 ps
T700 /workspace/coverage/default/28.gpio_rand_intr_trigger.1906352747 Mar 31 12:38:56 PM PDT 24 Mar 31 12:38:59 PM PDT 24 241152185 ps
T701 /workspace/coverage/default/17.gpio_dout_din_regs_random_rw.3069526892 Mar 31 12:38:10 PM PDT 24 Mar 31 12:38:11 PM PDT 24 100953810 ps
T702 /workspace/coverage/default/41.gpio_random_dout_din_no_pullup_pulldown.198910808 Mar 31 12:39:19 PM PDT 24 Mar 31 12:39:20 PM PDT 24 23326908 ps
T703 /workspace/coverage/default/27.gpio_dout_din_regs_random_rw.1080079208 Mar 31 12:38:31 PM PDT 24 Mar 31 12:38:32 PM PDT 24 18118763 ps
T704 /workspace/coverage/default/46.gpio_alert_test.897527652 Mar 31 12:39:13 PM PDT 24 Mar 31 12:39:14 PM PDT 24 36776688 ps
T705 /workspace/coverage/default/39.gpio_stress_all.4136606705 Mar 31 12:38:59 PM PDT 24 Mar 31 12:40:22 PM PDT 24 13394392769 ps
T706 /workspace/coverage/default/40.gpio_intr_rand_pgm.2519892025 Mar 31 12:39:03 PM PDT 24 Mar 31 12:39:04 PM PDT 24 126822763 ps
T707 /workspace/coverage/default/40.gpio_filter_stress.1559235920 Mar 31 12:39:20 PM PDT 24 Mar 31 12:39:44 PM PDT 24 6745294993 ps
T708 /workspace/coverage/default/11.gpio_random_long_reg_writes_reg_reads.3701110185 Mar 31 12:38:03 PM PDT 24 Mar 31 12:38:05 PM PDT 24 234378326 ps
T709 /workspace/coverage/default/3.gpio_full_random.3238071070 Mar 31 12:37:49 PM PDT 24 Mar 31 12:37:50 PM PDT 24 36865863 ps
T710 /workspace/coverage/default/46.gpio_intr_with_filter_rand_intr_event.204459472 Mar 31 12:39:23 PM PDT 24 Mar 31 12:39:25 PM PDT 24 194595506 ps
T711 /workspace/coverage/default/22.gpio_random_long_reg_writes_reg_reads.2697647308 Mar 31 12:38:19 PM PDT 24 Mar 31 12:38:23 PM PDT 24 360588235 ps
T712 /workspace/coverage/default/14.gpio_dout_din_regs_random_rw.3133750699 Mar 31 12:38:12 PM PDT 24 Mar 31 12:38:12 PM PDT 24 48086309 ps
T713 /workspace/coverage/default/12.gpio_random_long_reg_writes_reg_reads.3893468560 Mar 31 12:38:17 PM PDT 24 Mar 31 12:38:21 PM PDT 24 859587113 ps
T714 /workspace/coverage/default/21.gpio_intr_with_filter_rand_intr_event.3770822798 Mar 31 12:38:29 PM PDT 24 Mar 31 12:38:31 PM PDT 24 61241249 ps
T715 /workspace/coverage/default/16.gpio_stress_all.692835211 Mar 31 12:38:13 PM PDT 24 Mar 31 12:40:19 PM PDT 24 35191595790 ps
T716 /workspace/coverage/default/2.gpio_rand_intr_trigger.139675683 Mar 31 12:37:52 PM PDT 24 Mar 31 12:37:57 PM PDT 24 168695517 ps
T67 /workspace/coverage/cover_reg_top/13.gpio_csr_rw.2397372614 Mar 31 12:30:31 PM PDT 24 Mar 31 12:30:32 PM PDT 24 16344842 ps
T717 /workspace/coverage/cover_reg_top/8.gpio_csr_mem_rw_with_rand_reset.126353748 Mar 31 12:30:29 PM PDT 24 Mar 31 12:30:30 PM PDT 24 19612552 ps
T33 /workspace/coverage/cover_reg_top/10.gpio_tl_intg_err.3000864081 Mar 31 12:30:27 PM PDT 24 Mar 31 12:30:28 PM PDT 24 70421192 ps
T718 /workspace/coverage/cover_reg_top/2.gpio_tl_errors.2580983003 Mar 31 12:30:20 PM PDT 24 Mar 31 12:30:23 PM PDT 24 176785756 ps
T719 /workspace/coverage/cover_reg_top/17.gpio_intr_test.150501894 Mar 31 12:30:49 PM PDT 24 Mar 31 12:30:55 PM PDT 24 40077561 ps
T720 /workspace/coverage/cover_reg_top/11.gpio_intr_test.2267941324 Mar 31 12:30:27 PM PDT 24 Mar 31 12:30:28 PM PDT 24 49875818 ps
T104 /workspace/coverage/cover_reg_top/1.gpio_csr_rw.2594174629 Mar 31 12:30:19 PM PDT 24 Mar 31 12:30:20 PM PDT 24 20752479 ps
T721 /workspace/coverage/cover_reg_top/2.gpio_intr_test.886629517 Mar 31 12:30:20 PM PDT 24 Mar 31 12:30:21 PM PDT 24 11379471 ps
T68 /workspace/coverage/cover_reg_top/10.gpio_csr_rw.1959298845 Mar 31 12:30:29 PM PDT 24 Mar 31 12:30:30 PM PDT 24 36501587 ps
T69 /workspace/coverage/cover_reg_top/12.gpio_same_csr_outstanding.2581197565 Mar 31 12:30:24 PM PDT 24 Mar 31 12:30:24 PM PDT 24 173841108 ps
T70 /workspace/coverage/cover_reg_top/7.gpio_csr_rw.29512648 Mar 31 12:30:18 PM PDT 24 Mar 31 12:30:19 PM PDT 24 46290127 ps
T105 /workspace/coverage/cover_reg_top/11.gpio_csr_rw.1811367433 Mar 31 12:30:15 PM PDT 24 Mar 31 12:30:16 PM PDT 24 77573495 ps
T722 /workspace/coverage/cover_reg_top/30.gpio_intr_test.3219967126 Mar 31 12:30:33 PM PDT 24 Mar 31 12:30:34 PM PDT 24 27973457 ps
T106 /workspace/coverage/cover_reg_top/1.gpio_csr_hw_reset.2112740899 Mar 31 12:30:13 PM PDT 24 Mar 31 12:30:14 PM PDT 24 88591777 ps
T723 /workspace/coverage/cover_reg_top/10.gpio_csr_mem_rw_with_rand_reset.1738968492 Mar 31 12:30:30 PM PDT 24 Mar 31 12:30:32 PM PDT 24 28535111 ps
T71 /workspace/coverage/cover_reg_top/2.gpio_csr_aliasing.4203641905 Mar 31 12:30:01 PM PDT 24 Mar 31 12:30:02 PM PDT 24 16082679 ps
T34 /workspace/coverage/cover_reg_top/19.gpio_tl_intg_err.2755028838 Mar 31 12:30:35 PM PDT 24 Mar 31 12:30:36 PM PDT 24 529108586 ps
T724 /workspace/coverage/cover_reg_top/5.gpio_tl_errors.2457629676 Mar 31 12:30:17 PM PDT 24 Mar 31 12:30:19 PM PDT 24 409068653 ps
T72 /workspace/coverage/cover_reg_top/1.gpio_csr_aliasing.4064091123 Mar 31 12:30:04 PM PDT 24 Mar 31 12:30:05 PM PDT 24 42561968 ps
T725 /workspace/coverage/cover_reg_top/12.gpio_intr_test.2389198254 Mar 31 12:30:31 PM PDT 24 Mar 31 12:30:32 PM PDT 24 35619316 ps
T726 /workspace/coverage/cover_reg_top/23.gpio_intr_test.427899937 Mar 31 12:30:40 PM PDT 24 Mar 31 12:30:41 PM PDT 24 36110565 ps
T35 /workspace/coverage/cover_reg_top/12.gpio_tl_intg_err.1238915377 Mar 31 12:30:30 PM PDT 24 Mar 31 12:30:31 PM PDT 24 226013532 ps
T73 /workspace/coverage/cover_reg_top/0.gpio_same_csr_outstanding.3663850659 Mar 31 12:29:59 PM PDT 24 Mar 31 12:30:01 PM PDT 24 101859923 ps
T727 /workspace/coverage/cover_reg_top/0.gpio_csr_mem_rw_with_rand_reset.2242569082 Mar 31 12:30:04 PM PDT 24 Mar 31 12:30:05 PM PDT 24 341854900 ps
T728 /workspace/coverage/cover_reg_top/42.gpio_intr_test.2150343788 Mar 31 12:30:37 PM PDT 24 Mar 31 12:30:38 PM PDT 24 43736447 ps
T87 /workspace/coverage/cover_reg_top/6.gpio_same_csr_outstanding.1239331562 Mar 31 12:30:28 PM PDT 24 Mar 31 12:30:29 PM PDT 24 56750713 ps
T37 /workspace/coverage/cover_reg_top/16.gpio_tl_intg_err.619023055 Mar 31 12:30:28 PM PDT 24 Mar 31 12:30:30 PM PDT 24 420662929 ps
T729 /workspace/coverage/cover_reg_top/7.gpio_tl_errors.671792131 Mar 31 12:30:20 PM PDT 24 Mar 31 12:30:23 PM PDT 24 209267046 ps
T730 /workspace/coverage/cover_reg_top/9.gpio_tl_errors.1064423211 Mar 31 12:30:25 PM PDT 24 Mar 31 12:30:27 PM PDT 24 118897512 ps
T88 /workspace/coverage/cover_reg_top/16.gpio_same_csr_outstanding.762756226 Mar 31 12:30:26 PM PDT 24 Mar 31 12:30:27 PM PDT 24 19771786 ps
T74 /workspace/coverage/cover_reg_top/11.gpio_same_csr_outstanding.2469353633 Mar 31 12:30:34 PM PDT 24 Mar 31 12:30:34 PM PDT 24 49176789 ps
T731 /workspace/coverage/cover_reg_top/6.gpio_csr_mem_rw_with_rand_reset.2061248229 Mar 31 12:30:22 PM PDT 24 Mar 31 12:30:23 PM PDT 24 46045276 ps
T732 /workspace/coverage/cover_reg_top/3.gpio_csr_mem_rw_with_rand_reset.2443717405 Mar 31 12:29:59 PM PDT 24 Mar 31 12:29:59 PM PDT 24 20293483 ps
T45 /workspace/coverage/cover_reg_top/11.gpio_tl_intg_err.4009149916 Mar 31 12:30:33 PM PDT 24 Mar 31 12:30:34 PM PDT 24 158767968 ps
T733 /workspace/coverage/cover_reg_top/45.gpio_intr_test.1991959346 Mar 31 12:30:39 PM PDT 24 Mar 31 12:30:39 PM PDT 24 36072997 ps
T75 /workspace/coverage/cover_reg_top/19.gpio_csr_rw.141195837 Mar 31 12:30:38 PM PDT 24 Mar 31 12:30:39 PM PDT 24 97001954 ps
T734 /workspace/coverage/cover_reg_top/19.gpio_tl_errors.675137224 Mar 31 12:30:30 PM PDT 24 Mar 31 12:30:32 PM PDT 24 681234030 ps
T47 /workspace/coverage/cover_reg_top/8.gpio_tl_intg_err.3500275410 Mar 31 12:30:24 PM PDT 24 Mar 31 12:30:25 PM PDT 24 149137164 ps
T735 /workspace/coverage/cover_reg_top/18.gpio_tl_errors.1622653845 Mar 31 12:30:35 PM PDT 24 Mar 31 12:30:37 PM PDT 24 161314315 ps
T736 /workspace/coverage/cover_reg_top/10.gpio_intr_test.4009531280 Mar 31 12:30:23 PM PDT 24 Mar 31 12:30:24 PM PDT 24 18522103 ps
T89 /workspace/coverage/cover_reg_top/14.gpio_same_csr_outstanding.2360930879 Mar 31 12:30:26 PM PDT 24 Mar 31 12:30:27 PM PDT 24 37860291 ps
T737 /workspace/coverage/cover_reg_top/31.gpio_intr_test.3243758183 Mar 31 12:30:48 PM PDT 24 Mar 31 12:30:48 PM PDT 24 20719036 ps
T738 /workspace/coverage/cover_reg_top/34.gpio_intr_test.3374354238 Mar 31 12:30:52 PM PDT 24 Mar 31 12:30:53 PM PDT 24 25460712 ps
T739 /workspace/coverage/cover_reg_top/2.gpio_csr_hw_reset.3466577402 Mar 31 12:31:23 PM PDT 24 Mar 31 12:31:24 PM PDT 24 73853275 ps
T740 /workspace/coverage/cover_reg_top/15.gpio_csr_mem_rw_with_rand_reset.3941023237 Mar 31 12:30:32 PM PDT 24 Mar 31 12:30:33 PM PDT 24 83329636 ps
T90 /workspace/coverage/cover_reg_top/13.gpio_same_csr_outstanding.1251736358 Mar 31 12:30:27 PM PDT 24 Mar 31 12:30:28 PM PDT 24 55744180 ps
T46 /workspace/coverage/cover_reg_top/13.gpio_tl_intg_err.659874863 Mar 31 12:30:22 PM PDT 24 Mar 31 12:30:24 PM PDT 24 443905629 ps
T741 /workspace/coverage/cover_reg_top/9.gpio_csr_rw.2177963680 Mar 31 12:30:28 PM PDT 24 Mar 31 12:30:29 PM PDT 24 15302019 ps
T742 /workspace/coverage/cover_reg_top/36.gpio_intr_test.759904329 Mar 31 12:30:34 PM PDT 24 Mar 31 12:30:35 PM PDT 24 62256462 ps
T743 /workspace/coverage/cover_reg_top/17.gpio_csr_mem_rw_with_rand_reset.845115092 Mar 31 12:30:32 PM PDT 24 Mar 31 12:30:34 PM PDT 24 336749836 ps
T76 /workspace/coverage/cover_reg_top/4.gpio_csr_bit_bash.3047319788 Mar 31 12:30:28 PM PDT 24 Mar 31 12:30:29 PM PDT 24 127244753 ps
T43 /workspace/coverage/cover_reg_top/5.gpio_tl_intg_err.3001641520 Mar 31 12:30:16 PM PDT 24 Mar 31 12:30:18 PM PDT 24 508754733 ps
T77 /workspace/coverage/cover_reg_top/16.gpio_csr_rw.1944529243 Mar 31 12:30:27 PM PDT 24 Mar 31 12:30:27 PM PDT 24 20409240 ps
T744 /workspace/coverage/cover_reg_top/16.gpio_tl_errors.3482124147 Mar 31 12:30:24 PM PDT 24 Mar 31 12:30:26 PM PDT 24 44130097 ps
T745 /workspace/coverage/cover_reg_top/2.gpio_csr_mem_rw_with_rand_reset.2070552953 Mar 31 12:30:04 PM PDT 24 Mar 31 12:30:05 PM PDT 24 23245812 ps
T746 /workspace/coverage/cover_reg_top/43.gpio_intr_test.649793723 Mar 31 12:30:37 PM PDT 24 Mar 31 12:30:37 PM PDT 24 39652257 ps
T747 /workspace/coverage/cover_reg_top/21.gpio_intr_test.1873611142 Mar 31 12:30:30 PM PDT 24 Mar 31 12:30:31 PM PDT 24 12668985 ps
T748 /workspace/coverage/cover_reg_top/18.gpio_csr_mem_rw_with_rand_reset.702714090 Mar 31 12:30:38 PM PDT 24 Mar 31 12:30:39 PM PDT 24 34055098 ps
T91 /workspace/coverage/cover_reg_top/3.gpio_same_csr_outstanding.1931572903 Mar 31 12:31:26 PM PDT 24 Mar 31 12:31:28 PM PDT 24 30166404 ps
T749 /workspace/coverage/cover_reg_top/6.gpio_tl_errors.296721699 Mar 31 12:30:33 PM PDT 24 Mar 31 12:30:36 PM PDT 24 754029784 ps
T750 /workspace/coverage/cover_reg_top/4.gpio_intr_test.3924459905 Mar 31 12:30:22 PM PDT 24 Mar 31 12:30:23 PM PDT 24 43032916 ps
T48 /workspace/coverage/cover_reg_top/6.gpio_tl_intg_err.256150507 Mar 31 12:30:21 PM PDT 24 Mar 31 12:30:23 PM PDT 24 148098996 ps
T751 /workspace/coverage/cover_reg_top/0.gpio_tl_errors.783726236 Mar 31 12:30:03 PM PDT 24 Mar 31 12:30:06 PM PDT 24 328192360 ps
T752 /workspace/coverage/cover_reg_top/46.gpio_intr_test.2044597544 Mar 31 12:30:37 PM PDT 24 Mar 31 12:30:38 PM PDT 24 65498451 ps
T753 /workspace/coverage/cover_reg_top/12.gpio_csr_mem_rw_with_rand_reset.1403152052 Mar 31 12:30:31 PM PDT 24 Mar 31 12:30:32 PM PDT 24 58225228 ps
T754 /workspace/coverage/cover_reg_top/15.gpio_csr_rw.1339777238 Mar 31 12:30:34 PM PDT 24 Mar 31 12:30:34 PM PDT 24 218465836 ps
T755 /workspace/coverage/cover_reg_top/1.gpio_csr_mem_rw_with_rand_reset.4004124228 Mar 31 12:31:22 PM PDT 24 Mar 31 12:31:23 PM PDT 24 55424598 ps
T92 /workspace/coverage/cover_reg_top/18.gpio_same_csr_outstanding.1928391047 Mar 31 12:30:30 PM PDT 24 Mar 31 12:30:31 PM PDT 24 35762257 ps
T93 /workspace/coverage/cover_reg_top/2.gpio_same_csr_outstanding.814008704 Mar 31 12:30:28 PM PDT 24 Mar 31 12:30:28 PM PDT 24 30487105 ps
T756 /workspace/coverage/cover_reg_top/3.gpio_csr_bit_bash.2528172851 Mar 31 12:30:18 PM PDT 24 Mar 31 12:30:22 PM PDT 24 62709410 ps
T757 /workspace/coverage/cover_reg_top/11.gpio_csr_mem_rw_with_rand_reset.969833245 Mar 31 12:30:15 PM PDT 24 Mar 31 12:30:16 PM PDT 24 144619290 ps
T758 /workspace/coverage/cover_reg_top/32.gpio_intr_test.3403432592 Mar 31 12:30:58 PM PDT 24 Mar 31 12:30:58 PM PDT 24 12070892 ps
T759 /workspace/coverage/cover_reg_top/19.gpio_same_csr_outstanding.117919893 Mar 31 12:30:30 PM PDT 24 Mar 31 12:30:31 PM PDT 24 54304514 ps
T760 /workspace/coverage/cover_reg_top/13.gpio_csr_mem_rw_with_rand_reset.2326993335 Mar 31 12:30:26 PM PDT 24 Mar 31 12:30:27 PM PDT 24 43077164 ps
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