Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	3337221	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

14603571

1

T23

458

T24

145

T1

86005

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	7227834	1			T23	540		T24	33		T1	50864
values[0x0]	5272280	1			T23	91		T24	62		T1	30172
values[0x1]	5440678	1			T23	90		T24	66		T1	30305

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	2574939	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

15365853

1

T23

508

T24

147

T1

90977

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	58486	1			T23	2		T1	415		T11	1
valid_sources[0x01]	63630	1			T23	4		T1	461		T11	1
valid_sources[0x02]	109950	1			T23	2		T24	4		T1	411
valid_sources[0x03]	72412	1			T23	2		T1	398		T12	1
valid_sources[0x04]	61915	1			T1	412		T11	3		T16	1
valid_sources[0x05]	65510	1			T1	444		T11	2		T13	1
valid_sources[0x06]	62434	1			T1	370		T19	1		T134	22
valid_sources[0x07]	58902	1			T23	2		T1	438		T11	3
valid_sources[0x08]	63049	1			T23	11		T1	399		T11	5
valid_sources[0x09]	64671	1			T1	520		T11	1		T18	2
valid_sources[0x0a]	66101	1			T23	2		T1	413		T11	2
valid_sources[0x0b]	63278	1			T23	9		T1	403		T11	5
valid_sources[0x0c]	61867	1			T23	2		T1	501		T19	3
valid_sources[0x0d]	61139	1			T23	1		T1	527		T11	3
valid_sources[0x0e]	71343	1			T23	3		T24	8		T1	389
valid_sources[0x0f]	73732	1			T23	1		T1	409		T12	1
valid_sources[0x10]	110854	1			T23	1		T1	428		T14	1
valid_sources[0x11]	67509	1			T23	3		T24	3		T1	354
valid_sources[0x12]	68076	1			T23	2		T1	441		T11	6
valid_sources[0x13]	59845	1			T23	2		T1	422		T19	1
valid_sources[0x14]	69955	1			T23	4		T1	404		T11	2
valid_sources[0x15]	67012	1			T1	408		T11	1		T16	1
valid_sources[0x16]	68200	1			T23	2		T24	3		T1	415
valid_sources[0x17]	58737	1			T1	425		T19	4		T134	15
valid_sources[0x18]	65004	1			T23	2		T1	405		T11	2
valid_sources[0x19]	67025	1			T23	4		T24	1		T1	398
valid_sources[0x1a]	73209	1			T23	2		T1	429		T11	4
valid_sources[0x1b]	64624	1			T23	1		T24	2		T1	459
valid_sources[0x1c]	66130	1			T23	3		T24	1		T1	406
valid_sources[0x1d]	65739	1			T1	401		T11	2		T12	1
valid_sources[0x1e]	70765	1			T1	531		T11	1		T19	2
valid_sources[0x1f]	65009	1			T23	5		T1	449		T11	1
valid_sources[0x20]	69987	1			T24	2		T1	443		T11	1
valid_sources[0x21]	65711	1			T1	456		T11	4		T19	2
valid_sources[0x22]	70842	1			T24	1		T1	368		T11	4
valid_sources[0x23]	62468	1			T1	405		T11	3		T13	2
valid_sources[0x24]	55940	1			T23	1		T1	441		T11	1
valid_sources[0x25]	72857	1			T23	6		T1	442		T11	1
valid_sources[0x26]	64759	1			T23	2		T1	397		T11	3
valid_sources[0x27]	62894	1			T23	3		T1	441		T11	4
valid_sources[0x28]	64201	1			T23	6		T24	1		T1	418
valid_sources[0x29]	69653	1			T23	3		T1	407		T11	4
valid_sources[0x2a]	64211	1			T23	2		T1	372		T11	1
valid_sources[0x2b]	66973	1			T23	8		T1	438		T13	2
valid_sources[0x2c]	60064	1			T23	1		T1	436		T11	4
valid_sources[0x2d]	64392	1			T23	7		T1	371		T11	1
valid_sources[0x2e]	66598	1			T23	1		T1	513		T18	1
valid_sources[0x2f]	61154	1			T1	375		T11	4		T13	5
valid_sources[0x30]	73649	1			T23	1		T1	511		T11	1
valid_sources[0x31]	65957	1			T23	4		T1	412		T11	6
valid_sources[0x32]	60589	1			T1	442		T11	1		T12	1
valid_sources[0x33]	63193	1			T23	3		T1	435		T11	1
valid_sources[0x34]	64547	1			T23	3		T24	4		T1	408
valid_sources[0x35]	66713	1			T23	3		T24	1		T1	436
valid_sources[0x36]	58805	1			T23	6		T1	439		T11	2
valid_sources[0x37]	65233	1			T23	1		T1	447		T11	2
valid_sources[0x38]	62309	1			T23	7		T1	412		T11	1
valid_sources[0x39]	72956	1			T23	4		T1	439		T11	4
valid_sources[0x3a]	73529	1			T23	4		T24	2		T1	436
valid_sources[0x3b]	70515	1			T24	1		T1	456		T19	2
valid_sources[0x3c]	59251	1			T23	4		T1	381		T19	2
valid_sources[0x3d]	88756	1			T1	443		T13	2		T19	2
valid_sources[0x3e]	66924	1			T23	5		T1	444		T11	2
valid_sources[0x3f]	75042	1			T23	1		T1	358		T11	1
valid_sources[0x40]	73959	1			T23	1		T1	407		T19	4
valid_sources[0x41]	58877	1			T1	413		T11	1		T12	1
valid_sources[0x42]	61658	1			T23	1		T1	330		T11	1
valid_sources[0x43]	58293	1			T23	4		T1	456		T11	3
valid_sources[0x44]	65184	1			T23	2		T1	460		T19	1
valid_sources[0x45]	62045	1			T1	458		T11	1		T16	7
valid_sources[0x46]	145208	1			T23	4		T24	4		T1	499
valid_sources[0x47]	64308	1			T1	457		T11	4		T13	3
valid_sources[0x48]	69340	1			T23	2		T1	380		T11	5
valid_sources[0x49]	78914	1			T23	9		T1	441		T19	3
valid_sources[0x4a]	63864	1			T23	1		T1	441		T11	1
valid_sources[0x4b]	61239	1			T23	6		T1	483		T11	2
valid_sources[0x4c]	168788	1			T1	478		T18	2		T134	25
valid_sources[0x4d]	72600	1			T23	4		T1	389		T11	1
valid_sources[0x4e]	69679	1			T23	3		T1	412		T11	1
valid_sources[0x4f]	56796	1			T23	1		T1	446		T11	1
valid_sources[0x50]	76252	1			T23	7		T1	363		T11	2
valid_sources[0x51]	73337	1			T23	1		T24	1		T1	377
valid_sources[0x52]	66031	1			T23	2		T1	533		T11	1
valid_sources[0x53]	77479	1			T23	8		T1	453		T11	2
valid_sources[0x54]	75823	1			T23	1		T24	1		T1	436
valid_sources[0x55]	59689	1			T23	1		T1	467		T11	3
valid_sources[0x56]	65296	1			T23	4		T1	460		T11	4
valid_sources[0x57]	64596	1			T24	1		T1	462		T11	2
valid_sources[0x58]	63452	1			T23	2		T1	465		T11	1
valid_sources[0x59]	60893	1			T23	12		T1	453		T11	4
valid_sources[0x5a]	71220	1			T23	1		T24	1		T1	476
valid_sources[0x5b]	73148	1			T24	1		T1	450		T11	1
valid_sources[0x5c]	70056	1			T23	8		T1	431		T11	4
valid_sources[0x5d]	66970	1			T23	1		T24	1		T1	450
valid_sources[0x5e]	62719	1			T1	395		T12	1		T16	1
valid_sources[0x5f]	72243	1			T23	8		T1	461		T11	4
valid_sources[0x60]	71685	1			T23	9		T1	395		T11	2
valid_sources[0x61]	59608	1			T23	13		T1	453		T11	5
valid_sources[0x62]	59445	1			T23	1		T1	429		T12	1
valid_sources[0x63]	63156	1			T1	489		T11	1		T18	1
valid_sources[0x64]	68384	1			T23	3		T1	417		T11	11
valid_sources[0x65]	68307	1			T23	9		T1	485		T11	6
valid_sources[0x66]	66246	1			T1	472		T11	1		T16	7
valid_sources[0x67]	65336	1			T23	2		T1	391		T11	2
valid_sources[0x68]	72522	1			T23	3		T1	419		T18	1
valid_sources[0x69]	62733	1			T1	494		T11	2		T13	3
valid_sources[0x6a]	64723	1			T23	4		T1	391		T16	6
valid_sources[0x6b]	67628	1			T1	408		T11	1		T12	1
valid_sources[0x6c]	64916	1			T1	504		T11	1		T13	2
valid_sources[0x6d]	70494	1			T23	3		T1	342		T11	1
valid_sources[0x6e]	71365	1			T23	3		T1	392		T18	1
valid_sources[0x6f]	66817	1			T23	4		T24	1		T1	492
valid_sources[0x70]	58701	1			T23	3		T1	584		T11	5
valid_sources[0x71]	64176	1			T1	354		T134	16		T129	2
valid_sources[0x72]	66805	1			T24	5		T1	427		T11	5
valid_sources[0x73]	66277	1			T23	1		T24	2		T1	405
valid_sources[0x74]	69071	1			T23	4		T1	420		T19	2
valid_sources[0x75]	63862	1			T23	5		T1	445		T11	1
valid_sources[0x76]	66245	1			T23	2		T1	522		T11	5
valid_sources[0x77]	62134	1			T1	481		T19	2		T134	17
valid_sources[0x78]	58974	1			T23	2		T1	404		T11	2
valid_sources[0x79]	61833	1			T23	3		T24	6		T1	404
valid_sources[0x7a]	65371	1			T1	476		T11	2		T12	1
valid_sources[0x7b]	63861	1			T23	2		T1	492		T11	4
valid_sources[0x7c]	66864	1			T1	455		T11	1		T19	2
valid_sources[0x7d]	59852	1			T23	2		T1	351		T16	14
valid_sources[0x7e]	61221	1			T23	5		T24	4		T1	424
valid_sources[0x7f]	58865	1			T23	1		T1	402		T11	1
valid_sources[0x80]	58936	1			T23	1		T24	1		T1	442

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

4093683

1

T23

277

T24

17

T1

25528

values[0x0]

all_enables

biggest_size

5255068

1

T23

91

T24

62

T1

30172

values[0x1]

all_enables

biggest_size

5254820

1

T23

90

T24

66

T1

30305