Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 3862898 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 16908276 1 T21 104717 T22 110760 T23 413



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 8370588 1 T21 61843 T22 62219 T23 91
values[0x0] 6102249 1 T21 36894 T22 39625 T23 183
values[0x1] 6298337 1 T21 36828 T22 39859 T23 193



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 2980279 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 17790895 1 T21 110907 T22 116998 T23 419



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 72909 1 T23 5 T27 530 T29 28
valid_sources[0x01] 70749 1 T27 603 T29 11 T30 629
valid_sources[0x02] 75728 1 T23 2 T27 499 T28 2
valid_sources[0x03] 70474 1 T23 2 T24 3 T27 548
valid_sources[0x04] 68975 1 T23 4 T24 9 T27 520
valid_sources[0x05] 68799 1 T23 3 T24 16 T27 616
valid_sources[0x06] 72066 1 T23 3 T24 4 T26 1
valid_sources[0x07] 73808 1 T23 1 T24 6 T27 550
valid_sources[0x08] 77793 1 T23 2 T24 1 T26 3
valid_sources[0x09] 76178 1 T23 1 T24 1 T26 3
valid_sources[0x0a] 67130 1 T24 4 T26 2 T27 598
valid_sources[0x0b] 72865 1 T23 2 T24 4 T27 623
valid_sources[0x0c] 237746 1 T23 1 T24 2 T27 580
valid_sources[0x0d] 68982 1 T24 5 T27 546 T29 19
valid_sources[0x0e] 78172 1 T23 2 T26 1 T27 557
valid_sources[0x0f] 65927 1 T23 2 T27 460 T29 21
valid_sources[0x10] 71878 1 T23 2 T27 566 T29 19
valid_sources[0x11] 67024 1 T23 1 T24 5 T27 610
valid_sources[0x12] 71005 1 T23 5 T27 558 T28 14
valid_sources[0x13] 69599 1 T23 5 T24 2 T27 603
valid_sources[0x14] 71737 1 T24 3 T27 618 T29 13
valid_sources[0x15] 72698 1 T23 2 T26 3 T27 574
valid_sources[0x16] 97450 1 T23 2 T24 1 T27 541
valid_sources[0x17] 66481 1 T23 4 T27 514 T28 3
valid_sources[0x18] 70693 1 T24 5 T27 599 T29 16
valid_sources[0x19] 75558 1 T23 3 T27 439 T29 29
valid_sources[0x1a] 73831 1 T23 1 T27 491 T28 15
valid_sources[0x1b] 75676 1 T23 3 T27 609 T29 24
valid_sources[0x1c] 73491 1 T23 2 T24 7 T27 516
valid_sources[0x1d] 70116 1 T23 2 T24 1 T27 569
valid_sources[0x1e] 256103 1 T22 141703 T24 3 T27 614
valid_sources[0x1f] 75598 1 T23 3 T24 4 T26 1
valid_sources[0x20] 83580 1 T23 4 T24 1 T27 484
valid_sources[0x21] 75710 1 T23 1 T24 2 T27 519
valid_sources[0x22] 74655 1 T23 1 T24 1 T27 580
valid_sources[0x23] 65834 1 T23 5 T24 5 T27 640
valid_sources[0x24] 81968 1 T23 1 T24 5 T26 1
valid_sources[0x25] 77977 1 T23 2 T24 6 T27 613
valid_sources[0x26] 84541 1 T23 3 T26 2 T27 515
valid_sources[0x27] 73228 1 T26 1 T27 577 T29 16
valid_sources[0x28] 73776 1 T23 4 T24 6 T27 569
valid_sources[0x29] 79676 1 T24 10 T27 517 T29 21
valid_sources[0x2a] 69672 1 T27 662 T29 23 T30 599
valid_sources[0x2b] 70195 1 T23 3 T27 549 T28 14
valid_sources[0x2c] 78581 1 T24 1 T26 1 T27 468
valid_sources[0x2d] 67037 1 T23 1 T24 2 T27 512
valid_sources[0x2e] 74777 1 T23 2 T27 586 T29 20
valid_sources[0x2f] 79260 1 T23 1 T24 5 T26 3
valid_sources[0x30] 76444 1 T23 3 T27 636 T29 19
valid_sources[0x31] 71894 1 T23 2 T27 579 T29 15
valid_sources[0x32] 78582 1 T23 2 T24 6 T27 528
valid_sources[0x33] 73783 1 T23 1 T24 8 T27 584
valid_sources[0x34] 70448 1 T23 3 T27 693 T28 10
valid_sources[0x35] 74654 1 T24 1 T27 516 T29 16
valid_sources[0x36] 75977 1 T27 683 T29 28 T30 597
valid_sources[0x37] 70886 1 T27 629 T29 21 T30 544
valid_sources[0x38] 82721 1 T23 7 T27 536 T29 16
valid_sources[0x39] 77220 1 T23 5 T24 12 T27 578
valid_sources[0x3a] 68104 1 T23 3 T27 490 T28 20
valid_sources[0x3b] 73380 1 T23 1 T27 591 T29 11
valid_sources[0x3c] 74593 1 T27 541 T28 24 T29 15
valid_sources[0x3d] 74953 1 T23 1 T24 5 T25 1
valid_sources[0x3e] 73482 1 T23 1 T24 3 T27 518
valid_sources[0x3f] 74921 1 T23 3 T27 548 T28 16
valid_sources[0x40] 75111 1 T27 537 T28 17 T29 17
valid_sources[0x41] 75953 1 T23 4 T24 2 T27 572
valid_sources[0x42] 73685 1 T23 1 T26 2 T27 560
valid_sources[0x43] 77252 1 T23 6 T24 2 T27 566
valid_sources[0x44] 74040 1 T23 1 T27 626 T29 24
valid_sources[0x45] 70942 1 T23 1 T24 2 T27 614
valid_sources[0x46] 67439 1 T23 1 T24 3 T26 2
valid_sources[0x47] 67927 1 T27 575 T29 17 T30 636
valid_sources[0x48] 76410 1 T24 7 T27 526 T29 14
valid_sources[0x49] 71319 1 T23 2 T27 539 T29 18
valid_sources[0x4a] 73154 1 T24 1 T27 618 T29 20
valid_sources[0x4b] 69106 1 T23 2 T24 1 T27 676
valid_sources[0x4c] 74227 1 T27 432 T29 14 T30 576
valid_sources[0x4d] 78739 1 T23 2 T24 3 T27 443
valid_sources[0x4e] 74046 1 T23 2 T27 395 T29 20
valid_sources[0x4f] 81324 1 T23 3 T24 1 T27 622
valid_sources[0x50] 77188 1 T26 7 T27 564 T29 18
valid_sources[0x51] 74319 1 T23 2 T24 3 T26 3
valid_sources[0x52] 68019 1 T23 3 T24 5 T27 597
valid_sources[0x53] 73718 1 T23 2 T24 4 T27 516
valid_sources[0x54] 79205 1 T24 7 T27 563 T29 15
valid_sources[0x55] 73968 1 T23 3 T24 3 T26 4
valid_sources[0x56] 75257 1 T27 579 T29 17 T30 551
valid_sources[0x57] 74511 1 T23 1 T27 523 T28 12
valid_sources[0x58] 131055 1 T23 5 T24 3 T27 582
valid_sources[0x59] 204404 1 T23 3 T27 549 T29 23
valid_sources[0x5a] 255126 1 T26 5 T27 547 T29 25
valid_sources[0x5b] 66921 1 T23 3 T24 1 T26 2
valid_sources[0x5c] 70994 1 T23 3 T24 10 T27 607
valid_sources[0x5d] 83049 1 T23 2 T24 3 T26 5
valid_sources[0x5e] 74348 1 T23 1 T24 5 T27 552
valid_sources[0x5f] 225362 1 T23 1 T24 6 T27 564
valid_sources[0x60] 74431 1 T23 3 T27 515 T29 19
valid_sources[0x61] 95469 1 T23 3 T24 1 T27 547
valid_sources[0x62] 73881 1 T23 1 T27 546 T29 19
valid_sources[0x63] 78989 1 T23 5 T24 1 T27 550
valid_sources[0x64] 69461 1 T23 1 T27 606 T29 18
valid_sources[0x65] 79985 1 T23 2 T27 578 T29 11
valid_sources[0x66] 74133 1 T27 529 T29 29 T30 606
valid_sources[0x67] 74163 1 T23 4 T24 2 T27 405
valid_sources[0x68] 74360 1 T23 2 T27 496 T29 22
valid_sources[0x69] 80621 1 T23 4 T24 4 T27 536
valid_sources[0x6a] 72558 1 T23 2 T24 4 T27 477
valid_sources[0x6b] 79659 1 T23 2 T27 580 T29 16
valid_sources[0x6c] 69395 1 T23 1 T26 11 T27 556
valid_sources[0x6d] 72380 1 T23 3 T24 3 T27 514
valid_sources[0x6e] 67920 1 T23 2 T24 1 T26 1
valid_sources[0x6f] 79357 1 T23 1 T27 540 T28 5
valid_sources[0x70] 229715 1 T23 2 T24 4 T27 548
valid_sources[0x71] 92413 1 T23 1 T27 559 T29 13
valid_sources[0x72] 71090 1 T24 2 T25 6 T26 1
valid_sources[0x73] 69824 1 T24 10 T27 548 T29 12
valid_sources[0x74] 73086 1 T24 7 T27 474 T29 18
valid_sources[0x75] 77374 1 T23 3 T27 598 T29 23
valid_sources[0x76] 69227 1 T23 2 T24 6 T27 522
valid_sources[0x77] 75741 1 T24 10 T27 561 T29 15
valid_sources[0x78] 71310 1 T23 2 T24 4 T27 546
valid_sources[0x79] 69642 1 T23 1 T24 7 T26 8
valid_sources[0x7a] 76476 1 T23 2 T24 4 T26 12
valid_sources[0x7b] 71197 1 T23 1 T27 579 T29 17
valid_sources[0x7c] 74831 1 T23 1 T24 8 T27 480
valid_sources[0x7d] 72609 1 T24 3 T27 533 T29 24
valid_sources[0x7e] 74781 1 T23 5 T24 7 T27 617
valid_sources[0x7f] 84627 1 T24 2 T27 556 T29 20
valid_sources[0x80] 75033 1 T23 1 T26 11 T27 542



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 4745281 1 T21 30995 T22 31276 T23 37
values[0x0] all_enables biggest_size 6082436 1 T21 36894 T22 39625 T23 183
values[0x1] all_enables biggest_size 6080559 1 T21 36828 T22 39859 T23 193

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%