Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 2426843 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 9773508 1 T22 2989 T23 293 T24 384



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 5118957 1 T22 4574 T23 73 T24 83
values[0x0] 3499653 1 T22 342 T23 137 T24 176
values[0x1] 3581741 1 T22 341 T23 123 T24 165



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 1894812 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 10305539 1 T22 3449 T23 302 T24 393



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 41872 1 T22 18 T23 2 T25 3404
valid_sources[0x01] 40831 1 T22 9 T25 3265 T30 1379
valid_sources[0x02] 38437 1 T22 10 T23 4 T25 3443
valid_sources[0x03] 43280 1 T22 7 T23 3 T25 3204
valid_sources[0x04] 41163 1 T22 3 T23 2 T25 3338
valid_sources[0x05] 39916 1 T25 3514 T27 3 T30 1305
valid_sources[0x06] 45637 1 T22 11 T23 4 T25 3246
valid_sources[0x07] 41178 1 T22 19 T23 3 T24 5
valid_sources[0x08] 40725 1 T22 18 T23 3 T25 3432
valid_sources[0x09] 43972 1 T23 1 T25 3388 T30 1253
valid_sources[0x0a] 40616 1 T22 3 T23 2 T25 3267
valid_sources[0x0b] 45509 1 T22 4 T24 2 T25 3348
valid_sources[0x0c] 41638 1 T22 12 T25 3449 T30 1306
valid_sources[0x0d] 78734 1 T22 13 T23 1 T25 3410
valid_sources[0x0e] 41246 1 T22 23 T23 2 T25 3437
valid_sources[0x0f] 39990 1 T22 23 T25 3369 T30 1224
valid_sources[0x10] 41319 1 T22 22 T23 2 T24 2
valid_sources[0x11] 42508 1 T22 26 T23 3 T25 3489
valid_sources[0x12] 40972 1 T22 19 T23 2 T25 3423
valid_sources[0x13] 45412 1 T22 37 T23 1 T25 3346
valid_sources[0x14] 41138 1 T22 14 T24 9 T25 3446
valid_sources[0x15] 46591 1 T22 11 T23 3 T25 3450
valid_sources[0x16] 40254 1 T22 10 T23 2 T25 3416
valid_sources[0x17] 42202 1 T22 41 T24 2 T25 3363
valid_sources[0x18] 40895 1 T22 16 T25 3374 T27 2
valid_sources[0x19] 41866 1 T22 27 T25 3372 T27 1
valid_sources[0x1a] 41809 1 T22 18 T23 1 T25 3436
valid_sources[0x1b] 42188 1 T22 3 T23 2 T25 3377
valid_sources[0x1c] 41666 1 T22 3 T23 2 T24 12
valid_sources[0x1d] 45034 1 T22 27 T23 2 T25 3312
valid_sources[0x1e] 44267 1 T22 35 T23 2 T25 3497
valid_sources[0x1f] 132334 1 T22 3 T23 1 T25 3347
valid_sources[0x20] 45702 1 T22 59 T23 3 T25 3404
valid_sources[0x21] 42425 1 T22 11 T23 5 T25 3395
valid_sources[0x22] 40848 1 T22 8 T23 2 T25 3276
valid_sources[0x23] 159401 1 T22 38 T23 1 T24 17
valid_sources[0x24] 40257 1 T22 5 T23 3 T25 3288
valid_sources[0x25] 43843 1 T22 41 T23 1 T25 3367
valid_sources[0x26] 42887 1 T22 27 T23 2 T25 3423
valid_sources[0x27] 45482 1 T25 3351 T30 1345 T31 2
valid_sources[0x28] 41070 1 T22 32 T23 4 T25 3221
valid_sources[0x29] 40996 1 T22 31 T25 3454 T27 2
valid_sources[0x2a] 42446 1 T22 4 T25 3188 T27 10
valid_sources[0x2b] 40144 1 T22 14 T23 1 T25 3452
valid_sources[0x2c] 40216 1 T22 19 T25 3314 T27 1
valid_sources[0x2d] 40163 1 T22 13 T23 1 T25 3419
valid_sources[0x2e] 39361 1 T22 7 T23 1 T24 3
valid_sources[0x2f] 47946 1 T22 1 T23 1 T24 39
valid_sources[0x30] 40490 1 T22 1 T23 2 T25 3489
valid_sources[0x31] 39732 1 T22 52 T23 1 T25 3300
valid_sources[0x32] 41911 1 T22 3 T25 3331 T30 1421
valid_sources[0x33] 40111 1 T22 5 T23 2 T25 3330
valid_sources[0x34] 39338 1 T22 29 T23 1 T24 1
valid_sources[0x35] 42649 1 T22 1 T23 1 T24 2
valid_sources[0x36] 41619 1 T22 5 T23 1 T25 3470
valid_sources[0x37] 39619 1 T22 98 T25 3432 T28 3
valid_sources[0x38] 41194 1 T22 50 T23 2 T25 3430
valid_sources[0x39] 43950 1 T22 13 T23 1 T25 3455
valid_sources[0x3a] 39408 1 T22 7 T25 3485 T30 1279
valid_sources[0x3b] 42260 1 T22 10 T23 2 T25 3264
valid_sources[0x3c] 42069 1 T22 8 T23 2 T25 3393
valid_sources[0x3d] 39966 1 T23 1 T24 5 T25 3460
valid_sources[0x3e] 41439 1 T22 2 T23 1 T25 3387
valid_sources[0x3f] 40207 1 T22 23 T25 3297 T27 2
valid_sources[0x40] 43990 1 T22 8 T24 15 T25 3347
valid_sources[0x41] 41465 1 T22 34 T23 1 T25 3387
valid_sources[0x42] 50211 1 T22 7 T23 2 T25 3433
valid_sources[0x43] 44165 1 T22 22 T23 1 T25 3326
valid_sources[0x44] 213821 1 T22 19 T23 2 T24 10
valid_sources[0x45] 40226 1 T22 42 T23 2 T25 3336
valid_sources[0x46] 40657 1 T22 7 T23 1 T25 3221
valid_sources[0x47] 41480 1 T22 3 T23 3 T25 3373
valid_sources[0x48] 40812 1 T22 13 T24 4 T25 3321
valid_sources[0x49] 43414 1 T22 43 T24 23 T25 3321
valid_sources[0x4a] 42238 1 T22 1 T23 1 T25 3425
valid_sources[0x4b] 42693 1 T22 48 T23 1 T24 3
valid_sources[0x4c] 44864 1 T22 22 T24 29 T25 3365
valid_sources[0x4d] 43714 1 T22 41 T23 1 T25 3372
valid_sources[0x4e] 42616 1 T22 20 T23 1 T25 3406
valid_sources[0x4f] 42230 1 T22 20 T23 2 T25 3477
valid_sources[0x50] 40732 1 T22 38 T25 3401 T27 1
valid_sources[0x51] 39203 1 T22 31 T23 2 T24 3
valid_sources[0x52] 40884 1 T22 3 T23 1 T24 10
valid_sources[0x53] 43807 1 T22 9 T23 3 T25 3317
valid_sources[0x54] 44773 1 T22 6 T23 2 T25 3325
valid_sources[0x55] 41265 1 T22 44 T24 2 T25 3284
valid_sources[0x56] 40616 1 T22 51 T25 3466 T30 1256
valid_sources[0x57] 40508 1 T22 19 T23 2 T25 3441
valid_sources[0x58] 41362 1 T22 26 T23 3 T25 3314
valid_sources[0x59] 39155 1 T22 37 T25 3294 T27 2
valid_sources[0x5a] 42329 1 T22 28 T23 1 T24 5
valid_sources[0x5b] 107129 1 T22 13 T25 3405 T27 2
valid_sources[0x5c] 43547 1 T22 9 T23 2 T24 4
valid_sources[0x5d] 42516 1 T22 23 T25 3435 T30 1177
valid_sources[0x5e] 42100 1 T22 51 T23 1 T25 3332
valid_sources[0x5f] 39532 1 T22 26 T25 3242 T27 1
valid_sources[0x60] 41832 1 T22 42 T23 4 T25 3358
valid_sources[0x61] 39819 1 T22 2 T23 1 T25 3344
valid_sources[0x62] 40872 1 T22 18 T25 3388 T30 1367
valid_sources[0x63] 41481 1 T22 14 T23 2 T25 3251
valid_sources[0x64] 40911 1 T22 18 T23 2 T25 3505
valid_sources[0x65] 41678 1 T22 7 T23 1 T25 3434
valid_sources[0x66] 41754 1 T22 25 T23 1 T25 3277
valid_sources[0x67] 43599 1 T22 6 T24 21 T25 3439
valid_sources[0x68] 47433 1 T22 3 T25 3367 T27 2
valid_sources[0x69] 39636 1 T22 30 T25 3367 T30 1344
valid_sources[0x6a] 41648 1 T22 22 T23 3 T24 7
valid_sources[0x6b] 40768 1 T22 18 T25 3357 T27 1
valid_sources[0x6c] 42719 1 T22 14 T23 3 T25 3447
valid_sources[0x6d] 53987 1 T22 32 T23 1 T25 3318
valid_sources[0x6e] 42879 1 T22 8 T23 1 T25 3361
valid_sources[0x6f] 40528 1 T22 29 T23 4 T25 3354
valid_sources[0x70] 47536 1 T22 26 T23 1 T25 3465
valid_sources[0x71] 43191 1 T22 8 T23 5 T25 3455
valid_sources[0x72] 43031 1 T23 3 T24 1 T25 3350
valid_sources[0x73] 40443 1 T22 54 T23 1 T25 3283
valid_sources[0x74] 93512 1 T22 3 T25 3474 T29 9
valid_sources[0x75] 40765 1 T22 14 T24 6 T25 3331
valid_sources[0x76] 41524 1 T22 42 T23 2 T25 3416
valid_sources[0x77] 40713 1 T22 8 T23 2 T25 3295
valid_sources[0x78] 45755 1 T22 24 T23 2 T25 3359
valid_sources[0x79] 44789 1 T23 1 T25 3447 T30 1333
valid_sources[0x7a] 40524 1 T22 11 T23 1 T24 8
valid_sources[0x7b] 40711 1 T22 8 T23 1 T24 8
valid_sources[0x7c] 38971 1 T22 49 T23 1 T25 3300
valid_sources[0x7d] 44294 1 T22 13 T23 2 T24 7
valid_sources[0x7e] 48924 1 T22 22 T23 2 T25 3547
valid_sources[0x7f] 41615 1 T22 31 T24 3 T25 3443
valid_sources[0x80] 41812 1 T22 25 T25 3361 T27 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 2790956 1 T22 2306 T23 33 T24 43
values[0x0] all_enables biggest_size 3491005 1 T22 342 T23 137 T24 176
values[0x1] all_enables biggest_size 3491547 1 T22 341 T23 123 T24 165

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%