Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4164347	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

18432311

1

T21

2608

T22

3

T23

62038

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	9057576	1			T21	2156		T22	1		T23	35783
values[0x0]	6654982	1			T21	785		T22	4		T23	22113
values[0x1]	6884100	1			T21	771		T22	6		T23	22264

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	3207114	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

19389544

1

T21

2809

T22

4

T23

65713

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	85805	1			T22	1		T23	299		T2	2
valid_sources[0x01]	129716	1			T23	307		T24	8		T25	3
valid_sources[0x02]	93374	1			T23	340		T24	2		T25	1
valid_sources[0x03]	86814	1			T23	295		T25	3		T2	2
valid_sources[0x04]	89454	1			T23	317		T24	2		T25	2
valid_sources[0x05]	93065	1			T23	319		T25	3		T2	2
valid_sources[0x06]	81940	1			T23	301		T25	1		T2	6
valid_sources[0x07]	73737	1			T23	343		T25	1		T2	6
valid_sources[0x08]	84692	1			T23	289		T25	2		T2	2
valid_sources[0x09]	89217	1			T23	298		T25	8		T2	5
valid_sources[0x0a]	83548	1			T23	305		T25	3		T2	6
valid_sources[0x0b]	81672	1			T23	296		T25	1		T11	279
valid_sources[0x0c]	76672	1			T23	317		T25	2		T2	4
valid_sources[0x0d]	84582	1			T23	295		T25	1		T2	8
valid_sources[0x0e]	76965	1			T23	305		T25	2		T2	1
valid_sources[0x0f]	89650	1			T23	300		T25	2		T2	2
valid_sources[0x10]	92314	1			T23	291		T25	3		T2	6
valid_sources[0x11]	79624	1			T23	348		T24	3		T25	1
valid_sources[0x12]	112051	1			T23	294		T25	1		T2	2
valid_sources[0x13]	92415	1			T23	308		T25	4		T2	4
valid_sources[0x14]	80504	1			T23	315		T25	1		T2	3
valid_sources[0x15]	83710	1			T23	304		T24	2		T25	2
valid_sources[0x16]	83688	1			T23	333		T25	6		T2	5
valid_sources[0x17]	88455	1			T23	313		T25	1		T2	8
valid_sources[0x18]	75800	1			T23	289		T25	9		T2	2
valid_sources[0x19]	88911	1			T23	297		T25	2		T2	11
valid_sources[0x1a]	93301	1			T23	287		T25	1		T2	1
valid_sources[0x1b]	88736	1			T23	267		T25	7		T2	2
valid_sources[0x1c]	82510	1			T23	279		T2	3		T3	7
valid_sources[0x1d]	91265	1			T23	322		T25	3		T2	8
valid_sources[0x1e]	89697	1			T23	322		T25	3		T2	6
valid_sources[0x1f]	80997	1			T23	311		T25	2		T2	4
valid_sources[0x20]	80956	1			T23	299		T25	3		T2	4
valid_sources[0x21]	83899	1			T23	299		T25	6		T2	8
valid_sources[0x22]	80285	1			T23	310		T25	2		T2	7
valid_sources[0x23]	85675	1			T23	268		T25	3		T2	2
valid_sources[0x24]	81063	1			T23	314		T3	20		T12	1
valid_sources[0x25]	76631	1			T23	299		T25	3		T3	11
valid_sources[0x26]	84573	1			T23	307		T25	3		T2	8
valid_sources[0x27]	82626	1			T23	317		T24	1		T25	2
valid_sources[0x28]	91882	1			T23	316		T25	1		T2	7
valid_sources[0x29]	90335	1			T23	342		T25	3		T2	3
valid_sources[0x2a]	93071	1			T23	319		T25	2		T3	10
valid_sources[0x2b]	84448	1			T23	301		T25	5		T2	2
valid_sources[0x2c]	81745	1			T23	254		T25	3		T2	6
valid_sources[0x2d]	90090	1			T23	349		T24	1		T2	2
valid_sources[0x2e]	85567	1			T23	286		T25	4		T2	4
valid_sources[0x2f]	85598	1			T23	292		T25	2		T2	3
valid_sources[0x30]	97803	1			T23	303		T24	2		T25	1
valid_sources[0x31]	82640	1			T23	303		T25	2		T2	9
valid_sources[0x32]	85310	1			T23	341		T25	1		T2	5
valid_sources[0x33]	113031	1			T23	322		T25	4		T2	2
valid_sources[0x34]	224184	1			T23	296		T25	1		T2	4
valid_sources[0x35]	84220	1			T23	327		T25	2		T2	1
valid_sources[0x36]	87570	1			T23	287		T2	1		T3	3
valid_sources[0x37]	93801	1			T23	260		T24	9		T25	3
valid_sources[0x38]	89890	1			T23	338		T25	4		T2	6
valid_sources[0x39]	89965	1			T23	321		T24	4		T25	5
valid_sources[0x3a]	80178	1			T23	322		T24	6		T2	4
valid_sources[0x3b]	93507	1			T23	275		T24	1		T25	4
valid_sources[0x3c]	86449	1			T23	354		T25	2		T2	5
valid_sources[0x3d]	79778	1			T23	303		T25	4		T2	12
valid_sources[0x3e]	226595	1			T23	290		T25	1		T2	4
valid_sources[0x3f]	82066	1			T22	1		T23	299		T25	2
valid_sources[0x40]	84563	1			T23	314		T25	3		T2	7
valid_sources[0x41]	81918	1			T22	3		T23	331		T2	8
valid_sources[0x42]	82425	1			T23	326		T25	2		T2	1
valid_sources[0x43]	82412	1			T23	288		T24	7		T25	1
valid_sources[0x44]	75503	1			T23	345		T25	2		T2	10
valid_sources[0x45]	81588	1			T23	298		T25	4		T2	1
valid_sources[0x46]	94326	1			T23	311		T25	4		T2	1
valid_sources[0x47]	92015	1			T23	301		T25	4		T2	5
valid_sources[0x48]	90589	1			T23	275		T25	3		T2	3
valid_sources[0x49]	81606	1			T23	315		T25	2		T2	3
valid_sources[0x4a]	85689	1			T23	301		T25	1		T2	1
valid_sources[0x4b]	87547	1			T23	272		T24	1		T25	5
valid_sources[0x4c]	82255	1			T23	305		T25	4		T2	3
valid_sources[0x4d]	89227	1			T23	306		T25	6		T2	1
valid_sources[0x4e]	75914	1			T23	348		T25	4		T2	8
valid_sources[0x4f]	84576	1			T23	315		T25	3		T2	6
valid_sources[0x50]	87940	1			T23	304		T25	2		T2	1
valid_sources[0x51]	89001	1			T23	324		T25	4		T2	5
valid_sources[0x52]	89570	1			T23	300		T25	1		T2	1
valid_sources[0x53]	68641	1			T23	253		T25	1		T2	5
valid_sources[0x54]	88970	1			T23	343		T25	3		T2	4
valid_sources[0x55]	88676	1			T23	345		T25	4		T3	4
valid_sources[0x56]	81407	1			T23	308		T2	4		T3	19
valid_sources[0x57]	88012	1			T23	307		T25	5		T2	7
valid_sources[0x58]	87921	1			T23	298		T25	2		T2	12
valid_sources[0x59]	79337	1			T23	293		T2	10		T3	29
valid_sources[0x5a]	76216	1			T23	295		T24	3		T25	1
valid_sources[0x5b]	89058	1			T23	318		T24	3		T25	5
valid_sources[0x5c]	75312	1			T23	323		T24	9		T25	4
valid_sources[0x5d]	74975	1			T23	289		T25	2		T2	4
valid_sources[0x5e]	77234	1			T23	337		T25	2		T3	23
valid_sources[0x5f]	83294	1			T23	291		T25	4		T2	4
valid_sources[0x60]	85575	1			T23	283		T25	4		T2	6
valid_sources[0x61]	75409	1			T23	285		T25	4		T2	4
valid_sources[0x62]	73681	1			T23	346		T25	4		T2	3
valid_sources[0x63]	84269	1			T23	336		T25	1		T2	4
valid_sources[0x64]	87264	1			T22	1		T23	352		T25	3
valid_sources[0x65]	91986	1			T23	325		T25	4		T2	4
valid_sources[0x66]	78711	1			T23	286		T25	5		T2	3
valid_sources[0x67]	83425	1			T23	321		T25	3		T2	8
valid_sources[0x68]	93169	1			T23	318		T25	4		T2	2
valid_sources[0x69]	87329	1			T23	327		T2	1		T3	7
valid_sources[0x6a]	93343	1			T23	312		T24	6		T25	3
valid_sources[0x6b]	82881	1			T23	277		T25	4		T2	4
valid_sources[0x6c]	89044	1			T23	344		T25	5		T2	2
valid_sources[0x6d]	90747	1			T23	347		T24	12		T25	2
valid_sources[0x6e]	74061	1			T23	320		T25	1		T2	6
valid_sources[0x6f]	82397	1			T22	1		T23	302		T25	4
valid_sources[0x70]	87262	1			T23	289		T25	2		T2	4
valid_sources[0x71]	77050	1			T23	290		T25	3		T2	4
valid_sources[0x72]	87469	1			T23	315		T25	6		T2	2
valid_sources[0x73]	88594	1			T23	291		T24	7		T25	4
valid_sources[0x74]	87504	1			T23	338		T24	2		T25	5
valid_sources[0x75]	91196	1			T23	329		T25	5		T2	3
valid_sources[0x76]	79250	1			T23	316		T25	2		T2	2
valid_sources[0x77]	86766	1			T23	326		T25	6		T2	5
valid_sources[0x78]	83488	1			T23	311		T25	3		T2	8
valid_sources[0x79]	70734	1			T23	311		T25	1		T2	2
valid_sources[0x7a]	83905	1			T23	284		T25	2		T3	9
valid_sources[0x7b]	84506	1			T23	345		T25	3		T2	12
valid_sources[0x7c]	94932	1			T23	292		T25	2		T2	7
valid_sources[0x7d]	97410	1			T23	306		T25	3		T2	1
valid_sources[0x7e]	93531	1			T23	315		T25	3		T2	4
valid_sources[0x7f]	88414	1			T23	339		T25	5		T2	12
valid_sources[0x80]	82224	1			T23	305		T2	4		T3	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

5162682

1

T21

1052

T22

1

T23

17661

values[0x0]

all_enables

biggest_size

6632371

1

T21

785

T22

1

T23

22113

values[0x1]

all_enables

biggest_size

6637258

1

T21

771

T22

1

T23

22264