Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	3460479	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

15485616

1

T19

131

T22

208

T23

521

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	7563045	1			T19	12		T22	43		T23	272
values[0x0]	5594610	1			T19	61		T22	89		T23	196
values[0x1]	5788440	1			T19	61		T22	101		T23	186

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	2659632	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

16286463

1

T19

132

T22

212

T23

546

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	69290	1			T22	1		T1	299		T12	191
valid_sources[0x01]	65333	1			T19	5		T22	1		T1	235
valid_sources[0x02]	77289	1			T22	1		T23	33		T1	257
valid_sources[0x03]	70288	1			T22	1		T1	246		T12	221
valid_sources[0x04]	70803	1			T1	297		T12	176		T13	2
valid_sources[0x05]	69378	1			T22	1		T1	291		T12	187
valid_sources[0x06]	67429	1			T22	1		T1	355		T12	196
valid_sources[0x07]	74534	1			T22	1		T1	295		T12	197
valid_sources[0x08]	68578	1			T22	1		T23	6		T1	306
valid_sources[0x09]	60538	1			T23	10		T1	296		T12	202
valid_sources[0x0a]	66762	1			T22	1		T23	3		T1	250
valid_sources[0x0b]	66680	1			T1	272		T12	199		T15	6
valid_sources[0x0c]	78333	1			T1	293		T12	210		T15	9
valid_sources[0x0d]	64144	1			T22	1		T1	240		T12	182
valid_sources[0x0e]	64733	1			T22	1		T1	281		T12	172
valid_sources[0x0f]	60223	1			T1	286		T12	195		T13	5
valid_sources[0x10]	62719	1			T23	3		T1	339		T12	190
valid_sources[0x11]	65877	1			T22	1		T23	6		T1	275
valid_sources[0x12]	73273	1			T19	3		T22	2		T1	300
valid_sources[0x13]	65391	1			T1	281		T12	192		T15	2
valid_sources[0x14]	74947	1			T22	1		T1	279		T12	182
valid_sources[0x15]	64188	1			T23	1		T1	347		T12	175
valid_sources[0x16]	66438	1			T22	2		T23	1		T1	324
valid_sources[0x17]	73710	1			T1	269		T12	210		T15	8
valid_sources[0x18]	69377	1			T22	3		T1	317		T12	174
valid_sources[0x19]	72303	1			T22	3		T1	306		T12	218
valid_sources[0x1a]	71914	1			T22	1		T1	266		T12	198
valid_sources[0x1b]	71368	1			T1	347		T12	185		T15	3
valid_sources[0x1c]	70730	1			T22	2		T23	1		T1	306
valid_sources[0x1d]	67243	1			T22	2		T1	312		T12	198
valid_sources[0x1e]	69216	1			T1	277		T12	208		T15	3
valid_sources[0x1f]	66972	1			T22	2		T1	296		T12	196
valid_sources[0x20]	65180	1			T22	2		T23	3		T1	311
valid_sources[0x21]	69266	1			T23	5		T1	328		T12	192
valid_sources[0x22]	75472	1			T1	321		T12	178		T15	5
valid_sources[0x23]	64843	1			T22	1		T1	377		T12	219
valid_sources[0x24]	78124	1			T22	4		T1	309		T12	197
valid_sources[0x25]	59790	1			T23	5		T1	327		T12	200
valid_sources[0x26]	65016	1			T22	2		T23	23		T1	308
valid_sources[0x27]	68651	1			T22	1		T23	6		T1	360
valid_sources[0x28]	70207	1			T22	1		T1	335		T12	207
valid_sources[0x29]	68177	1			T22	1		T1	269		T12	216
valid_sources[0x2a]	74481	1			T1	264		T12	185		T13	2
valid_sources[0x2b]	79398	1			T22	3		T23	1		T1	332
valid_sources[0x2c]	70099	1			T1	243		T12	188		T15	8
valid_sources[0x2d]	80611	1			T1	340		T12	190		T13	3
valid_sources[0x2e]	58424	1			T22	1		T1	261		T12	179
valid_sources[0x2f]	70040	1			T1	293		T12	165		T15	11
valid_sources[0x30]	70480	1			T22	1		T1	276		T12	177
valid_sources[0x31]	72695	1			T1	282		T12	160		T15	1
valid_sources[0x32]	67051	1			T23	7		T1	358		T12	201
valid_sources[0x33]	198308	1			T1	286		T12	178		T15	4
valid_sources[0x34]	68396	1			T22	1		T23	2		T1	307
valid_sources[0x35]	164342	1			T22	2		T23	7		T1	296
valid_sources[0x36]	71857	1			T1	296		T12	192		T15	4
valid_sources[0x37]	72494	1			T22	1		T23	4		T1	276
valid_sources[0x38]	66770	1			T22	1		T1	296		T12	207
valid_sources[0x39]	79140	1			T19	21		T22	1		T1	323
valid_sources[0x3a]	203566	1			T22	1		T1	315		T12	192
valid_sources[0x3b]	72081	1			T19	5		T22	1		T23	11
valid_sources[0x3c]	64251	1			T19	2		T22	2		T1	267
valid_sources[0x3d]	68880	1			T23	9		T1	308		T12	165
valid_sources[0x3e]	67012	1			T19	12		T22	2		T23	5
valid_sources[0x3f]	72092	1			T22	2		T1	252		T12	178
valid_sources[0x40]	75135	1			T22	1		T23	2		T1	306
valid_sources[0x41]	73581	1			T23	10		T1	279		T12	217
valid_sources[0x42]	72235	1			T22	1		T1	300		T12	251
valid_sources[0x43]	67896	1			T22	1		T1	330		T12	193
valid_sources[0x44]	68755	1			T22	2		T1	284		T12	184
valid_sources[0x45]	66576	1			T1	356		T12	211		T15	3
valid_sources[0x46]	73405	1			T23	7		T1	303		T12	212
valid_sources[0x47]	63790	1			T22	1		T1	267		T12	167
valid_sources[0x48]	69520	1			T1	309		T12	168		T15	1
valid_sources[0x49]	71482	1			T22	1		T23	3		T1	268
valid_sources[0x4a]	64001	1			T22	2		T1	319		T12	203
valid_sources[0x4b]	71918	1			T22	1		T1	336		T2	21
valid_sources[0x4c]	66739	1			T22	1		T1	293		T12	175
valid_sources[0x4d]	75134	1			T1	332		T12	224		T13	5
valid_sources[0x4e]	59342	1			T22	1		T1	349		T12	222
valid_sources[0x4f]	76422	1			T22	3		T1	349		T12	190
valid_sources[0x50]	64140	1			T23	2		T1	296		T12	183
valid_sources[0x51]	70729	1			T23	8		T1	302		T12	190
valid_sources[0x52]	74938	1			T22	2		T23	2		T1	298
valid_sources[0x53]	67356	1			T22	2		T1	298		T12	189
valid_sources[0x54]	68599	1			T22	1		T1	292		T12	203
valid_sources[0x55]	70891	1			T1	319		T12	196		T13	4
valid_sources[0x56]	58031	1			T22	1		T1	320		T12	187
valid_sources[0x57]	74642	1			T22	1		T1	262		T12	206
valid_sources[0x58]	79242	1			T22	1		T23	4		T1	293
valid_sources[0x59]	70897	1			T22	1		T1	263		T12	192
valid_sources[0x5a]	96823	1			T22	1		T1	315		T12	161
valid_sources[0x5b]	74579	1			T1	288		T2	25		T12	180
valid_sources[0x5c]	62699	1			T22	1		T23	11		T1	297
valid_sources[0x5d]	73808	1			T22	3		T1	329		T12	216
valid_sources[0x5e]	69374	1			T19	8		T22	2		T1	363
valid_sources[0x5f]	60845	1			T22	1		T1	284		T12	181
valid_sources[0x60]	66424	1			T22	1		T1	327		T12	228
valid_sources[0x61]	66961	1			T22	2		T1	311		T12	184
valid_sources[0x62]	71593	1			T22	3		T23	3		T1	302
valid_sources[0x63]	73282	1			T22	3		T1	251		T12	197
valid_sources[0x64]	190312	1			T19	4		T1	318		T12	202
valid_sources[0x65]	72157	1			T22	1		T1	311		T12	203
valid_sources[0x66]	77976	1			T22	1		T23	5		T1	316
valid_sources[0x67]	67650	1			T1	315		T12	189		T15	2
valid_sources[0x68]	69125	1			T1	308		T12	191		T15	4
valid_sources[0x69]	66910	1			T22	2		T1	372		T12	195
valid_sources[0x6a]	68924	1			T1	307		T12	188		T15	6
valid_sources[0x6b]	68420	1			T22	1		T1	300		T12	190
valid_sources[0x6c]	67370	1			T1	319		T12	207		T15	5
valid_sources[0x6d]	63985	1			T22	1		T1	341		T12	194
valid_sources[0x6e]	79879	1			T1	290		T12	182		T15	6
valid_sources[0x6f]	70160	1			T22	1		T23	30		T1	307
valid_sources[0x70]	68335	1			T1	269		T12	196		T15	6
valid_sources[0x71]	61211	1			T22	1		T1	246		T12	186
valid_sources[0x72]	69787	1			T22	1		T23	1		T1	293
valid_sources[0x73]	183392	1			T22	2		T1	335		T2	2
valid_sources[0x74]	71719	1			T22	1		T23	4		T1	276
valid_sources[0x75]	75088	1			T23	5		T1	266		T12	202
valid_sources[0x76]	66915	1			T1	283		T12	214		T13	4
valid_sources[0x77]	70877	1			T22	2		T23	11		T1	299
valid_sources[0x78]	74322	1			T23	2		T1	345		T12	217
valid_sources[0x79]	71110	1			T22	1		T23	5		T25	148
valid_sources[0x7a]	73170	1			T22	1		T1	307		T12	182
valid_sources[0x7b]	69769	1			T22	2		T1	321		T12	186
valid_sources[0x7c]	66612	1			T1	328		T12	206		T15	4
valid_sources[0x7d]	68180	1			T22	3		T23	13		T1	300
valid_sources[0x7e]	67893	1			T19	10		T1	298		T12	212
valid_sources[0x7f]	71035	1			T22	1		T23	12		T24	248
valid_sources[0x80]	70603	1			T1	314		T12	198		T15	6

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

4337797

1

T19

9

T22

18

T23

139

values[0x0]

all_enables

biggest_size

5574897

1

T19

61

T22

89

T23

196

values[0x1]

all_enables

biggest_size

5572922

1

T19

61

T22

101

T23

186