Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 4484800 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 19863065 1 T20 680191 T21 2 T22 11



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 9767915 1 T20 295988 T21 1 T22 1
values[0x0] 7168582 1 T20 249150 T21 4 T22 12
values[0x1] 7411368 1 T20 261900 T21 4 T22 5



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 3451594 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 20896271 1 T20 713002 T21 2 T22 12



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 94358 1 T20 2032 T23 12 T1 7
valid_sources[0x01] 91996 1 T20 3182 T23 16 T1 1
valid_sources[0x02] 84625 1 T20 3766 T23 19 T1 4
valid_sources[0x03] 96467 1 T20 2876 T22 2 T23 33
valid_sources[0x04] 93741 1 T20 3845 T23 15 T1 4
valid_sources[0x05] 89557 1 T20 2390 T22 1 T23 32
valid_sources[0x06] 86942 1 T20 5378 T22 2 T23 16
valid_sources[0x07] 84773 1 T20 3923 T23 28 T1 2
valid_sources[0x08] 81738 1 T20 1069 T23 30 T1 2
valid_sources[0x09] 84076 1 T20 3016 T23 26 T1 5
valid_sources[0x0a] 85654 1 T20 1092 T23 41 T1 3
valid_sources[0x0b] 87718 1 T20 9838 T23 16 T1 3
valid_sources[0x0c] 179738 1 T20 4234 T23 8 T1 4
valid_sources[0x0d] 78382 1 T20 1913 T23 35 T1 5
valid_sources[0x0e] 86318 1 T20 2438 T23 26 T1 3
valid_sources[0x0f] 86331 1 T20 2108 T23 25 T1 5
valid_sources[0x10] 92383 1 T20 4272 T23 16 T1 3
valid_sources[0x11] 91245 1 T20 2111 T23 14 T1 2
valid_sources[0x12] 239421 1 T20 3737 T23 16 T1 4
valid_sources[0x13] 81356 1 T20 3462 T23 36 T1 5
valid_sources[0x14] 88294 1 T20 1572 T23 10 T1 6
valid_sources[0x15] 83063 1 T20 4071 T22 2 T23 17
valid_sources[0x16] 92018 1 T20 3285 T23 18 T1 4
valid_sources[0x17] 91467 1 T20 4822 T23 15 T1 5
valid_sources[0x18] 87173 1 T20 2827 T23 21 T1 8
valid_sources[0x19] 88611 1 T20 2101 T23 7 T1 4
valid_sources[0x1a] 175477 1 T20 5888 T23 10 T1 5
valid_sources[0x1b] 84417 1 T20 4468 T23 20 T1 5
valid_sources[0x1c] 84525 1 T20 2218 T23 32 T1 5
valid_sources[0x1d] 81205 1 T20 2647 T23 45 T1 2
valid_sources[0x1e] 95819 1 T20 5697 T23 17 T1 7
valid_sources[0x1f] 97076 1 T20 4560 T23 21 T1 2
valid_sources[0x20] 90522 1 T20 2717 T23 13 T1 6
valid_sources[0x21] 88070 1 T20 2589 T23 14 T1 4
valid_sources[0x22] 82604 1 T20 3448 T23 30 T1 3
valid_sources[0x23] 81248 1 T20 2774 T23 1 T1 5
valid_sources[0x24] 88748 1 T20 4110 T23 13 T1 5
valid_sources[0x25] 88950 1 T20 1243 T23 11 T1 4
valid_sources[0x26] 87537 1 T20 774 T23 14 T1 4
valid_sources[0x27] 82324 1 T20 1860 T23 40 T1 7
valid_sources[0x28] 267967 1 T20 7638 T23 23 T1 6
valid_sources[0x29] 80757 1 T20 2685 T23 1 T1 9
valid_sources[0x2a] 86095 1 T20 1818 T23 7 T1 2
valid_sources[0x2b] 88568 1 T20 1932 T23 3 T1 5
valid_sources[0x2c] 83486 1 T20 1975 T23 20 T1 3
valid_sources[0x2d] 81984 1 T20 2505 T23 7 T1 9
valid_sources[0x2e] 98259 1 T20 6317 T23 10 T1 8
valid_sources[0x2f] 84420 1 T20 3455 T23 3 T1 6
valid_sources[0x30] 81036 1 T20 2312 T23 26 T1 6
valid_sources[0x31] 98294 1 T20 3147 T23 16 T1 5
valid_sources[0x32] 192460 1 T20 7517 T23 41 T1 8
valid_sources[0x33] 81998 1 T20 1731 T23 8 T1 2
valid_sources[0x34] 91151 1 T20 2169 T23 12 T1 3
valid_sources[0x35] 85226 1 T20 1888 T23 22 T1 3
valid_sources[0x36] 92464 1 T20 5121 T23 25 T1 6
valid_sources[0x37] 90722 1 T20 3288 T23 30 T1 4
valid_sources[0x38] 85616 1 T20 2676 T23 19 T1 3
valid_sources[0x39] 81545 1 T20 901 T23 16 T1 5
valid_sources[0x3a] 83130 1 T20 2451 T23 14 T1 6
valid_sources[0x3b] 84419 1 T20 914 T23 14 T1 4
valid_sources[0x3c] 83500 1 T20 3991 T23 5 T1 2
valid_sources[0x3d] 83386 1 T20 2903 T23 6 T1 10
valid_sources[0x3e] 83515 1 T20 1635 T23 5 T1 3
valid_sources[0x3f] 94993 1 T20 1308 T23 8 T1 5
valid_sources[0x40] 91233 1 T20 3006 T23 13 T1 8
valid_sources[0x41] 83811 1 T20 927 T23 31 T1 7
valid_sources[0x42] 98921 1 T20 10152 T23 28 T1 2
valid_sources[0x43] 213688 1 T20 3360 T23 14 T1 6
valid_sources[0x44] 88663 1 T20 2092 T23 20 T1 7
valid_sources[0x45] 84691 1 T20 4926 T23 21 T1 6
valid_sources[0x46] 89140 1 T20 4033 T23 10 T1 8
valid_sources[0x47] 99629 1 T20 2830 T23 9 T1 3
valid_sources[0x48] 169870 1 T20 3029 T22 1 T23 23
valid_sources[0x49] 94360 1 T20 5485 T23 14 T1 4
valid_sources[0x4a] 83794 1 T20 4371 T23 16 T11 2
valid_sources[0x4b] 78364 1 T20 2118 T23 48 T1 6
valid_sources[0x4c] 137871 1 T20 1268 T23 16 T1 7
valid_sources[0x4d] 86353 1 T20 1085 T23 2 T1 6
valid_sources[0x4e] 92609 1 T20 5401 T23 9 T1 6
valid_sources[0x4f] 83796 1 T20 908 T23 5 T1 3
valid_sources[0x50] 85304 1 T20 3230 T23 17 T1 8
valid_sources[0x51] 86989 1 T20 1569 T23 23 T1 4
valid_sources[0x52] 90339 1 T20 3437 T23 13 T1 7
valid_sources[0x53] 89208 1 T20 8230 T23 16 T1 7
valid_sources[0x54] 90831 1 T20 5247 T23 14 T1 5
valid_sources[0x55] 90647 1 T20 3748 T23 43 T1 3
valid_sources[0x56] 88090 1 T20 1687 T23 23 T1 9
valid_sources[0x57] 90121 1 T20 3742 T23 11 T1 6
valid_sources[0x58] 228405 1 T20 3555 T23 17 T1 6
valid_sources[0x59] 87101 1 T20 880 T23 19 T1 6
valid_sources[0x5a] 83427 1 T20 3075 T23 25 T1 4
valid_sources[0x5b] 82508 1 T20 1125 T23 12 T1 5
valid_sources[0x5c] 83334 1 T20 1468 T23 22 T1 5
valid_sources[0x5d] 90054 1 T20 3710 T22 1 T23 25
valid_sources[0x5e] 81046 1 T20 2123 T23 4 T1 5
valid_sources[0x5f] 88021 1 T20 2161 T23 47 T1 6
valid_sources[0x60] 77991 1 T20 1258 T23 15 T1 2
valid_sources[0x61] 82506 1 T20 2854 T23 11 T1 3
valid_sources[0x62] 142923 1 T20 5391 T23 64 T1 3
valid_sources[0x63] 83649 1 T20 3630 T23 9 T1 6
valid_sources[0x64] 89441 1 T20 3369 T23 5 T1 3
valid_sources[0x65] 85755 1 T20 3421 T23 29 T1 5
valid_sources[0x66] 175743 1 T20 2350 T23 23 T1 3
valid_sources[0x67] 82555 1 T20 2180 T23 10 T1 2
valid_sources[0x68] 82601 1 T20 3985 T23 15 T1 4
valid_sources[0x69] 85216 1 T20 3423 T23 16 T1 4
valid_sources[0x6a] 92584 1 T20 1890 T22 3 T23 12
valid_sources[0x6b] 80883 1 T20 439 T23 19 T1 5
valid_sources[0x6c] 82810 1 T20 1298 T23 40 T1 5
valid_sources[0x6d] 87502 1 T20 3868 T23 52 T1 3
valid_sources[0x6e] 88229 1 T20 2736 T23 30 T1 9
valid_sources[0x6f] 86187 1 T20 7539 T23 20 T1 6
valid_sources[0x70] 99710 1 T20 7389 T23 34 T1 4
valid_sources[0x71] 90356 1 T20 1031 T23 47 T1 2
valid_sources[0x72] 89513 1 T20 3284 T23 3 T1 7
valid_sources[0x73] 86904 1 T20 1539 T23 17 T1 4
valid_sources[0x74] 82400 1 T20 5624 T23 44 T1 5
valid_sources[0x75] 89094 1 T20 671 T23 20 T1 6
valid_sources[0x76] 88808 1 T20 4137 T23 9 T1 3
valid_sources[0x77] 83859 1 T20 5261 T23 28 T1 3
valid_sources[0x78] 84895 1 T20 2109 T1 4 T11 7
valid_sources[0x79] 90058 1 T20 3562 T23 41 T1 7
valid_sources[0x7a] 85200 1 T20 3909 T23 14 T1 11
valid_sources[0x7b] 91334 1 T20 6623 T23 23 T1 6
valid_sources[0x7c] 90828 1 T20 2703 T23 16 T1 4
valid_sources[0x7d] 377916 1 T20 1426 T23 31 T1 5
valid_sources[0x7e] 80809 1 T20 900 T23 4 T1 3
valid_sources[0x7f] 85571 1 T20 2181 T23 14 T1 5
valid_sources[0x80] 88251 1 T20 1987 T23 7 T1 7



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 5573882 1 T20 185130 T22 1 T23 2197
values[0x0] all_enables biggest_size 7144419 1 T20 247836 T21 2 T22 9
values[0x1] all_enables biggest_size 7144764 1 T20 247225 T22 1 T23 325

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%