Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	3957611	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

18218125

1

T22

380

T23

1733

T24

288

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	8746378	1			T22	88		T23	2656		T24	36
values[0x0]	6583867	1			T22	143		T23	188		T24	143
values[0x1]	6845491	1			T22	189		T23	219		T24	127

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	3024915	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

19150821

1

T22

389

T23

2006

T24

291

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	78807	1			T23	10		T25	20		T1	1098
valid_sources[0x01]	81889	1			T23	9		T25	19		T1	990
valid_sources[0x02]	79390	1			T22	1		T23	12		T24	4
valid_sources[0x03]	79211	1			T23	5		T24	5		T25	19
valid_sources[0x04]	82595	1			T22	1		T23	3		T25	27
valid_sources[0x05]	84796	1			T23	14		T25	19		T1	1337
valid_sources[0x06]	79287	1			T22	2		T23	15		T25	14
valid_sources[0x07]	95918	1			T22	2		T23	18		T24	15
valid_sources[0x08]	133408	1			T22	2		T23	9		T25	15
valid_sources[0x09]	85948	1			T22	1		T23	24		T25	20
valid_sources[0x0a]	80091	1			T23	5		T25	13		T1	1415
valid_sources[0x0b]	78008	1			T22	3		T23	8		T25	20
valid_sources[0x0c]	77491	1			T22	1		T23	27		T25	22
valid_sources[0x0d]	88430	1			T22	3		T23	7		T25	21
valid_sources[0x0e]	88983	1			T23	16		T25	26		T1	1328
valid_sources[0x0f]	81214	1			T22	2		T23	29		T24	1
valid_sources[0x10]	82624	1			T22	2		T23	43		T24	8
valid_sources[0x11]	76809	1			T22	1		T23	6		T25	11
valid_sources[0x12]	97079	1			T22	1		T23	11		T24	15
valid_sources[0x13]	79129	1			T23	10		T25	17		T1	1296
valid_sources[0x14]	76812	1			T22	3		T23	10		T25	25
valid_sources[0x15]	96224	1			T22	3		T23	10		T25	10
valid_sources[0x16]	207473	1			T22	3		T23	37		T25	9
valid_sources[0x17]	81346	1			T23	10		T25	11		T1	1144
valid_sources[0x18]	82373	1			T23	12		T25	20		T1	1010
valid_sources[0x19]	82047	1			T23	27		T24	20		T25	22
valid_sources[0x1a]	88111	1			T23	15		T25	17		T1	1084
valid_sources[0x1b]	78337	1			T22	1		T23	10		T25	17
valid_sources[0x1c]	86431	1			T22	2		T23	6		T25	19
valid_sources[0x1d]	78796	1			T22	1		T23	14		T25	20
valid_sources[0x1e]	82991	1			T22	1		T23	10		T25	16
valid_sources[0x1f]	228519	1			T22	1		T25	15		T1	922
valid_sources[0x20]	78728	1			T22	7		T23	7		T25	17
valid_sources[0x21]	83800	1			T22	3		T23	2		T25	13
valid_sources[0x22]	77135	1			T22	2		T23	18		T25	21
valid_sources[0x23]	82065	1			T22	4		T23	4		T25	21
valid_sources[0x24]	77416	1			T22	1		T23	29		T25	17
valid_sources[0x25]	81581	1			T22	3		T23	5		T25	13
valid_sources[0x26]	84267	1			T22	3		T23	3		T25	15
valid_sources[0x27]	81127	1			T23	8		T25	15		T1	1074
valid_sources[0x28]	94191	1			T22	2		T23	3		T25	17
valid_sources[0x29]	81402	1			T23	7		T25	10		T1	1041
valid_sources[0x2a]	89137	1			T22	1		T23	10		T25	15
valid_sources[0x2b]	79877	1			T22	4		T23	11		T25	20
valid_sources[0x2c]	83082	1			T22	3		T25	14		T1	960
valid_sources[0x2d]	92690	1			T22	1		T23	14		T25	17
valid_sources[0x2e]	85228	1			T22	1		T23	30		T25	25
valid_sources[0x2f]	83945	1			T22	2		T23	12		T24	5
valid_sources[0x30]	76708	1			T22	1		T23	10		T25	16
valid_sources[0x31]	199935	1			T22	1		T23	7		T25	9
valid_sources[0x32]	88900	1			T23	6		T24	11		T25	13
valid_sources[0x33]	83173	1			T22	1		T23	20		T25	12
valid_sources[0x34]	92030	1			T22	3		T23	9		T25	18
valid_sources[0x35]	185268	1			T23	20		T24	1		T25	14
valid_sources[0x36]	86690	1			T22	2		T23	21		T25	12
valid_sources[0x37]	83334	1			T22	1		T24	9		T25	22
valid_sources[0x38]	80839	1			T23	18		T25	21		T1	1320
valid_sources[0x39]	86416	1			T22	2		T23	8		T25	12
valid_sources[0x3a]	87993	1			T22	1		T23	4		T25	18
valid_sources[0x3b]	72021	1			T22	1		T23	6		T24	6
valid_sources[0x3c]	136010	1			T22	2		T23	7		T25	17
valid_sources[0x3d]	78664	1			T23	4		T25	14		T1	986
valid_sources[0x3e]	88927	1			T23	12		T25	22		T1	1285
valid_sources[0x3f]	102471	1			T22	3		T23	9		T24	15
valid_sources[0x40]	81314	1			T22	1		T23	12		T25	12
valid_sources[0x41]	82312	1			T22	1		T23	15		T25	22
valid_sources[0x42]	87873	1			T22	2		T23	17		T25	15
valid_sources[0x43]	90101	1			T22	1		T23	11		T24	8
valid_sources[0x44]	80741	1			T22	3		T23	25		T25	14
valid_sources[0x45]	81306	1			T22	2		T23	20		T25	7
valid_sources[0x46]	87757	1			T22	1		T23	24		T25	11
valid_sources[0x47]	78510	1			T22	1		T23	14		T25	15
valid_sources[0x48]	75563	1			T22	3		T23	17		T25	13
valid_sources[0x49]	93511	1			T22	1		T23	20		T24	14
valid_sources[0x4a]	86761	1			T23	10		T25	17		T1	1165
valid_sources[0x4b]	75403	1			T22	1		T23	3		T25	14
valid_sources[0x4c]	88870	1			T22	1		T23	4		T25	10
valid_sources[0x4d]	81562	1			T22	5		T23	4		T25	16
valid_sources[0x4e]	88434	1			T22	1		T23	5		T25	15
valid_sources[0x4f]	85249	1			T23	24		T25	15		T1	1215
valid_sources[0x50]	80590	1			T22	2		T23	4		T25	22
valid_sources[0x51]	82429	1			T22	1		T23	6		T25	18
valid_sources[0x52]	78181	1			T23	2		T25	13		T1	1645
valid_sources[0x53]	78348	1			T22	2		T23	3		T25	18
valid_sources[0x54]	80461	1			T22	4		T23	17		T25	12
valid_sources[0x55]	81684	1			T22	3		T23	21		T25	20
valid_sources[0x56]	83173	1			T22	4		T23	2		T25	11
valid_sources[0x57]	74131	1			T22	1		T23	12		T24	13
valid_sources[0x58]	80721	1			T22	1		T23	7		T25	17
valid_sources[0x59]	85645	1			T22	3		T23	2		T24	3
valid_sources[0x5a]	85760	1			T22	1		T23	3		T25	17
valid_sources[0x5b]	76301	1			T22	1		T23	43		T25	9
valid_sources[0x5c]	78812	1			T22	2		T23	10		T25	13
valid_sources[0x5d]	77322	1			T23	13		T25	16		T1	1262
valid_sources[0x5e]	85914	1			T22	2		T23	24		T25	16
valid_sources[0x5f]	81287	1			T23	18		T25	19		T1	986
valid_sources[0x60]	77629	1			T22	4		T23	13		T24	14
valid_sources[0x61]	77832	1			T22	1		T23	21		T25	13
valid_sources[0x62]	81327	1			T22	1		T23	11		T25	11
valid_sources[0x63]	82230	1			T22	1		T23	15		T25	13
valid_sources[0x64]	73511	1			T22	3		T23	3		T25	24
valid_sources[0x65]	79595	1			T22	2		T23	14		T24	16
valid_sources[0x66]	75537	1			T22	1		T23	4		T24	2
valid_sources[0x67]	79920	1			T22	1		T23	12		T25	21
valid_sources[0x68]	82521	1			T23	1		T25	11		T1	1463
valid_sources[0x69]	192000	1			T22	2		T23	14		T25	12
valid_sources[0x6a]	82563	1			T22	3		T23	21		T25	11
valid_sources[0x6b]	84416	1			T22	2		T23	17		T25	21
valid_sources[0x6c]	89831	1			T22	1		T23	7		T25	14
valid_sources[0x6d]	89058	1			T22	2		T23	27		T25	15
valid_sources[0x6e]	79787	1			T23	12		T25	12		T1	1052
valid_sources[0x6f]	75660	1			T22	6		T23	16		T25	16
valid_sources[0x70]	83021	1			T22	1		T23	39		T24	1
valid_sources[0x71]	86502	1			T22	1		T23	6		T25	18
valid_sources[0x72]	84901	1			T22	2		T23	7		T25	20
valid_sources[0x73]	81902	1			T22	2		T23	18		T25	16
valid_sources[0x74]	75732	1			T22	4		T23	6		T25	20
valid_sources[0x75]	79064	1			T22	1		T23	9		T24	5
valid_sources[0x76]	88044	1			T22	3		T23	12		T25	17
valid_sources[0x77]	84335	1			T22	1		T23	23		T25	11
valid_sources[0x78]	216229	1			T22	4		T23	4		T25	9
valid_sources[0x79]	105740	1			T22	2		T23	17		T25	15
valid_sources[0x7a]	85420	1			T22	2		T23	7		T25	16
valid_sources[0x7b]	84044	1			T23	11		T24	2		T25	10
valid_sources[0x7c]	79422	1			T23	10		T25	19		T1	1588
valid_sources[0x7d]	78322	1			T22	1		T23	10		T24	27
valid_sources[0x7e]	91071	1			T22	4		T23	4		T25	15
valid_sources[0x7f]	92639	1			T22	1		T23	5		T25	20
valid_sources[0x80]	89962	1			T22	2		T23	9		T25	15

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

5096720

1

T22

48

T23

1326

T24

18

values[0x0]

all_enables

biggest_size

6558006

1

T22

143

T23

188

T24

143

values[0x1]

all_enables

biggest_size

6563399

1

T22

189

T23

219

T24

127