Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 4371258 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 20086259 1 T1 3907 T11 409 T12 39543



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 9636660 1 T1 2478 T11 29 T12 20968
values[0x0] 7269127 1 T1 1315 T11 189 T12 14718
values[0x1] 7551730 1 T1 1351 T11 203 T12 14492



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 3344603 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 21112914 1 T1 4162 T11 414 T12 41733



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 94004 1 T1 20 T13 2978 T59 159
valid_sources[0x01] 89357 1 T1 26 T13 3021 T59 176
valid_sources[0x02] 86682 1 T1 12 T13 3020 T59 190
valid_sources[0x03] 91975 1 T1 23 T13 3199 T59 194
valid_sources[0x04] 86122 1 T1 18 T13 3063 T59 192
valid_sources[0x05] 85666 1 T1 19 T13 3103 T59 213
valid_sources[0x06] 104344 1 T1 23 T13 3226 T16 6
valid_sources[0x07] 85412 1 T1 29 T13 3074 T59 231
valid_sources[0x08] 99048 1 T1 22 T13 3106 T59 240
valid_sources[0x09] 99022 1 T1 14 T13 2945 T59 183
valid_sources[0x0a] 95901 1 T1 15 T13 3048 T17 2
valid_sources[0x0b] 94284 1 T1 22 T13 3018 T59 171
valid_sources[0x0c] 88567 1 T1 29 T13 3197 T59 210
valid_sources[0x0d] 98894 1 T1 21 T13 3180 T16 5
valid_sources[0x0e] 88772 1 T1 20 T13 3034 T59 177
valid_sources[0x0f] 90978 1 T1 13 T13 2959 T18 1
valid_sources[0x10] 88768 1 T1 20 T13 3110 T16 22
valid_sources[0x11] 107493 1 T1 20 T13 3109 T18 1
valid_sources[0x12] 95641 1 T1 17 T13 3041 T59 152
valid_sources[0x13] 85964 1 T1 18 T13 3288 T16 6
valid_sources[0x14] 89853 1 T1 20 T13 3169 T18 2
valid_sources[0x15] 97947 1 T1 18 T13 3175 T16 1
valid_sources[0x16] 91635 1 T1 23 T13 3154 T59 173
valid_sources[0x17] 88698 1 T1 19 T13 3182 T18 1
valid_sources[0x18] 186585 1 T1 27 T13 3292 T59 168
valid_sources[0x19] 85115 1 T1 16 T13 3158 T59 167
valid_sources[0x1a] 81101 1 T1 24 T13 3307 T19 2
valid_sources[0x1b] 85466 1 T1 22 T13 3096 T59 201
valid_sources[0x1c] 89062 1 T1 20 T13 3042 T59 206
valid_sources[0x1d] 84804 1 T1 19 T13 3138 T19 1
valid_sources[0x1e] 88996 1 T1 19 T13 3046 T18 1
valid_sources[0x1f] 83118 1 T1 24 T13 3088 T16 3
valid_sources[0x20] 86771 1 T1 15 T13 3185 T19 2
valid_sources[0x21] 145596 1 T1 27 T13 3102 T59 202
valid_sources[0x22] 87309 1 T1 13 T13 3213 T18 2
valid_sources[0x23] 91827 1 T1 10 T13 3093 T18 1
valid_sources[0x24] 84505 1 T1 24 T13 3004 T59 145
valid_sources[0x25] 88184 1 T1 16 T13 3053 T59 267
valid_sources[0x26] 91513 1 T1 17 T13 3253 T18 1
valid_sources[0x27] 96605 1 T1 17 T13 3113 T18 1
valid_sources[0x28] 84447 1 T1 19 T13 3091 T59 242
valid_sources[0x29] 86015 1 T1 21 T13 2915 T59 242
valid_sources[0x2a] 113227 1 T1 28 T13 3085 T18 1
valid_sources[0x2b] 91973 1 T1 22 T13 3122 T59 204
valid_sources[0x2c] 89485 1 T1 20 T13 2975 T59 224
valid_sources[0x2d] 89736 1 T1 18 T13 3148 T18 1
valid_sources[0x2e] 88517 1 T1 15 T13 2851 T19 13
valid_sources[0x2f] 88023 1 T1 26 T13 2986 T59 211
valid_sources[0x30] 105957 1 T1 18 T13 3026 T16 3
valid_sources[0x31] 83261 1 T1 22 T13 3081 T16 3
valid_sources[0x32] 85511 1 T1 18 T13 3025 T19 1
valid_sources[0x33] 85062 1 T1 24 T13 3136 T18 1
valid_sources[0x34] 91060 1 T1 22 T13 3135 T59 160
valid_sources[0x35] 88152 1 T1 18 T13 3117 T16 2
valid_sources[0x36] 84418 1 T1 25 T13 3143 T18 1
valid_sources[0x37] 93839 1 T1 19 T13 2942 T16 1
valid_sources[0x38] 194628 1 T1 22 T13 2983 T59 178
valid_sources[0x39] 94009 1 T1 22 T13 3242 T16 9
valid_sources[0x3a] 177791 1 T1 14 T13 2985 T17 35
valid_sources[0x3b] 91557 1 T1 19 T13 3025 T17 3
valid_sources[0x3c] 92329 1 T1 16 T13 3005 T16 14
valid_sources[0x3d] 134934 1 T1 15 T13 3145 T18 1
valid_sources[0x3e] 89440 1 T1 23 T13 3126 T59 226
valid_sources[0x3f] 90599 1 T1 17 T13 3032 T18 1
valid_sources[0x40] 92154 1 T1 21 T13 3013 T59 136
valid_sources[0x41] 89627 1 T1 23 T13 3119 T17 13
valid_sources[0x42] 101272 1 T1 18 T13 3083 T59 179
valid_sources[0x43] 86632 1 T1 26 T13 3073 T59 161
valid_sources[0x44] 94802 1 T1 16 T13 3159 T59 176
valid_sources[0x45] 88847 1 T1 24 T13 2999 T16 5
valid_sources[0x46] 84044 1 T1 22 T13 3232 T59 164
valid_sources[0x47] 87281 1 T1 15 T13 2828 T16 7
valid_sources[0x48] 83983 1 T1 24 T13 3014 T16 3
valid_sources[0x49] 93489 1 T1 28 T13 3054 T59 226
valid_sources[0x4a] 80907 1 T1 28 T13 3113 T59 198
valid_sources[0x4b] 88692 1 T1 21 T13 3008 T18 1
valid_sources[0x4c] 85925 1 T1 24 T13 3134 T18 1
valid_sources[0x4d] 94633 1 T1 21 T13 3051 T18 1
valid_sources[0x4e] 86626 1 T1 15 T13 3210 T18 2
valid_sources[0x4f] 88112 1 T1 26 T13 3145 T59 187
valid_sources[0x50] 85016 1 T1 21 T13 3145 T59 191
valid_sources[0x51] 93020 1 T1 21 T13 3071 T17 58
valid_sources[0x52] 90939 1 T1 14 T13 3019 T18 1
valid_sources[0x53] 81752 1 T1 23 T13 3113 T18 1
valid_sources[0x54] 89643 1 T1 18 T13 3183 T18 1
valid_sources[0x55] 90160 1 T1 22 T13 3107 T59 202
valid_sources[0x56] 98132 1 T1 25 T13 3275 T17 70
valid_sources[0x57] 91621 1 T1 26 T13 3066 T59 196
valid_sources[0x58] 87906 1 T1 28 T13 2967 T16 8
valid_sources[0x59] 209558 1 T1 15 T13 3218 T18 1
valid_sources[0x5a] 96060 1 T1 16 T13 3045 T59 193
valid_sources[0x5b] 98883 1 T1 19 T13 3052 T59 169
valid_sources[0x5c] 86598 1 T1 11 T13 3037 T59 189
valid_sources[0x5d] 84778 1 T1 17 T13 3133 T16 22
valid_sources[0x5e] 84198 1 T1 24 T13 3195 T16 2
valid_sources[0x5f] 94250 1 T1 25 T13 3181 T59 178
valid_sources[0x60] 124272 1 T1 25 T13 3282 T59 250
valid_sources[0x61] 117611 1 T1 22 T13 3105 T59 225
valid_sources[0x62] 84725 1 T1 18 T13 3077 T18 1
valid_sources[0x63] 99031 1 T1 10 T13 3037 T59 198
valid_sources[0x64] 89091 1 T1 20 T13 3048 T59 172
valid_sources[0x65] 89825 1 T1 21 T13 3016 T59 174
valid_sources[0x66] 90849 1 T1 27 T13 2963 T16 5
valid_sources[0x67] 94066 1 T1 22 T13 3314 T18 1
valid_sources[0x68] 108996 1 T1 22 T13 3255 T59 198
valid_sources[0x69] 242861 1 T1 16 T13 3255 T16 5
valid_sources[0x6a] 92821 1 T1 22 T13 3054 T59 185
valid_sources[0x6b] 90061 1 T1 22 T13 3232 T59 235
valid_sources[0x6c] 108384 1 T1 21 T13 3108 T17 20
valid_sources[0x6d] 86078 1 T1 25 T13 3139 T18 2
valid_sources[0x6e] 87748 1 T1 21 T13 3118 T59 229
valid_sources[0x6f] 154725 1 T1 27 T13 3174 T18 1
valid_sources[0x70] 102959 1 T1 23 T13 3106 T18 1
valid_sources[0x71] 90999 1 T1 16 T13 3099 T16 7
valid_sources[0x72] 88822 1 T1 23 T13 3158 T59 231
valid_sources[0x73] 92430 1 T1 19 T13 3087 T18 1
valid_sources[0x74] 94027 1 T1 16 T13 3132 T18 1
valid_sources[0x75] 87987 1 T1 23 T13 3139 T16 2
valid_sources[0x76] 89178 1 T1 24 T13 3134 T19 8
valid_sources[0x77] 95059 1 T1 31 T13 3039 T59 231
valid_sources[0x78] 85171 1 T1 16 T13 3142 T16 3
valid_sources[0x79] 88346 1 T1 21 T13 3232 T59 209
valid_sources[0x7a] 84872 1 T1 18 T13 3195 T59 190
valid_sources[0x7b] 82084 1 T1 20 T13 3088 T59 206
valid_sources[0x7c] 84681 1 T1 22 T13 3033 T18 1
valid_sources[0x7d] 88612 1 T1 13 T13 3084 T59 223
valid_sources[0x7e] 87626 1 T1 22 T13 3022 T19 8
valid_sources[0x7f] 93356 1 T1 7 T13 3149 T59 223
valid_sources[0x80] 100310 1 T1 11 T13 3069 T59 161



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 5597478 1 T1 1241 T11 17 T12 10333
values[0x0] all_enables biggest_size 7241718 1 T1 1315 T11 189 T12 14718
values[0x1] all_enables biggest_size 7247063 1 T1 1351 T11 203 T12 14492

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%