Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 3681975 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 16646260 1 T31 117646 T32 599 T19 91



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 8082015 1 T31 67214 T32 411 T19 8
values[0x0] 6020950 1 T31 42111 T32 194 T19 46
values[0x1] 6225270 1 T31 42006 T32 202 T19 39



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 2827453 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 17500782 1 T31 124477 T32 639 T19 91



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 71642 1 T23 1 T27 2560 T28 148
valid_sources[0x01] 79586 1 T22 20 T23 1 T27 2454
valid_sources[0x02] 67043 1 T26 7 T27 2432 T28 143
valid_sources[0x03] 67940 1 T23 2 T26 1 T27 2456
valid_sources[0x04] 82255 1 T23 2 T26 7 T27 2462
valid_sources[0x05] 73700 1 T26 1 T27 2620 T28 192
valid_sources[0x06] 79116 1 T23 1 T26 1 T27 2475
valid_sources[0x07] 222443 1 T23 1 T26 5 T27 2486
valid_sources[0x08] 76570 1 T23 2 T26 1 T27 2508
valid_sources[0x09] 75268 1 T22 34 T23 2 T26 5
valid_sources[0x0a] 74862 1 T23 1 T24 2 T27 2540
valid_sources[0x0b] 77046 1 T22 34 T23 2 T26 2
valid_sources[0x0c] 69726 1 T23 4 T27 2423 T28 166
valid_sources[0x0d] 71325 1 T23 2 T26 16 T27 2499
valid_sources[0x0e] 71358 1 T23 1 T26 3 T27 2437
valid_sources[0x0f] 72331 1 T27 2493 T28 219 T69 2
valid_sources[0x10] 74551 1 T23 4 T26 2 T27 2462
valid_sources[0x11] 73686 1 T23 2 T27 2519 T28 207
valid_sources[0x12] 69721 1 T23 2 T26 3 T27 2509
valid_sources[0x13] 82173 1 T22 32 T23 4 T26 5
valid_sources[0x14] 80724 1 T23 2 T26 2 T27 2607
valid_sources[0x15] 70391 1 T26 3 T27 2400 T28 108
valid_sources[0x16] 74413 1 T20 1 T23 1 T26 1
valid_sources[0x17] 77588 1 T23 2 T26 4 T27 2455
valid_sources[0x18] 72875 1 T22 9 T23 3 T26 8
valid_sources[0x19] 74817 1 T22 3 T23 1 T26 6
valid_sources[0x1a] 72085 1 T20 1 T24 16 T27 2418
valid_sources[0x1b] 69715 1 T23 6 T27 2556 T28 163
valid_sources[0x1c] 78818 1 T26 7 T27 2300 T28 130
valid_sources[0x1d] 69610 1 T23 1 T27 2430 T28 130
valid_sources[0x1e] 74572 1 T26 8 T27 2424 T28 172
valid_sources[0x1f] 193776 1 T20 2 T23 3 T26 5
valid_sources[0x20] 81267 1 T19 93 T26 4 T27 2497
valid_sources[0x21] 77584 1 T26 1 T27 2356 T28 103
valid_sources[0x22] 81997 1 T23 4 T27 2504 T28 110
valid_sources[0x23] 65543 1 T22 57 T23 1 T26 11
valid_sources[0x24] 72868 1 T23 4 T27 2479 T28 124
valid_sources[0x25] 73287 1 T23 1 T24 4 T26 2
valid_sources[0x26] 72956 1 T23 1 T26 4 T27 2477
valid_sources[0x27] 68576 1 T23 1 T26 6 T27 2235
valid_sources[0x28] 69944 1 T23 2 T26 4 T27 2506
valid_sources[0x29] 88688 1 T23 1 T27 2569 T28 118
valid_sources[0x2a] 68798 1 T23 1 T26 3 T27 2452
valid_sources[0x2b] 66196 1 T23 2 T26 1 T27 2391
valid_sources[0x2c] 73551 1 T20 1 T23 1 T26 12
valid_sources[0x2d] 72642 1 T23 1 T27 2578 T28 191
valid_sources[0x2e] 84489 1 T23 2 T26 17 T27 2412
valid_sources[0x2f] 75991 1 T23 3 T27 2479 T28 210
valid_sources[0x30] 72718 1 T23 5 T26 15 T27 2390
valid_sources[0x31] 77277 1 T26 1 T27 2377 T28 231
valid_sources[0x32] 72559 1 T27 2549 T28 127 T69 5
valid_sources[0x33] 76164 1 T22 16 T23 2 T26 1
valid_sources[0x34] 75847 1 T23 1 T26 6 T27 2429
valid_sources[0x35] 76185 1 T23 4 T26 8 T27 2517
valid_sources[0x36] 68580 1 T23 2 T26 6 T27 2532
valid_sources[0x37] 77002 1 T26 9 T27 2510 T28 105
valid_sources[0x38] 77176 1 T22 13 T26 3 T27 2426
valid_sources[0x39] 72890 1 T22 9 T23 2 T26 7
valid_sources[0x3a] 73384 1 T20 1 T27 2417 T28 137
valid_sources[0x3b] 69749 1 T27 2433 T28 124 T69 1
valid_sources[0x3c] 67439 1 T26 8 T27 2509 T28 168
valid_sources[0x3d] 78378 1 T22 12 T26 2 T27 2414
valid_sources[0x3e] 68783 1 T23 1 T26 2 T27 2534
valid_sources[0x3f] 73524 1 T26 7 T27 2555 T28 169
valid_sources[0x40] 73348 1 T26 14 T27 2515 T28 97
valid_sources[0x41] 78802 1 T22 16 T23 2 T24 2
valid_sources[0x42] 69849 1 T22 7 T23 2 T27 2453
valid_sources[0x43] 78463 1 T27 2562 T28 172 T69 2
valid_sources[0x44] 75579 1 T26 4 T27 2559 T28 87
valid_sources[0x45] 74218 1 T23 2 T27 2403 T28 171
valid_sources[0x46] 71023 1 T23 1 T26 15 T27 2464
valid_sources[0x47] 77645 1 T22 31 T23 3 T26 1
valid_sources[0x48] 75851 1 T23 4 T27 2511 T28 98
valid_sources[0x49] 69630 1 T26 2 T27 2538 T28 175
valid_sources[0x4a] 75082 1 T22 61 T23 4 T27 2439
valid_sources[0x4b] 67572 1 T26 2 T27 2407 T28 94
valid_sources[0x4c] 73684 1 T20 2 T24 32 T26 3
valid_sources[0x4d] 69987 1 T23 2 T27 2557 T28 167
valid_sources[0x4e] 67211 1 T23 3 T26 1 T27 2553
valid_sources[0x4f] 75531 1 T23 1 T27 2451 T28 119
valid_sources[0x50] 71733 1 T23 2 T26 1 T27 2402
valid_sources[0x51] 77334 1 T23 4 T26 3 T27 2521
valid_sources[0x52] 75552 1 T23 1 T27 2343 T28 135
valid_sources[0x53] 73260 1 T23 2 T27 2402 T28 143
valid_sources[0x54] 72817 1 T23 1 T26 2 T27 2577
valid_sources[0x55] 76629 1 T23 3 T27 2535 T28 163
valid_sources[0x56] 71137 1 T22 1 T23 1 T26 13
valid_sources[0x57] 77649 1 T23 3 T27 2372 T28 163
valid_sources[0x58] 74303 1 T23 4 T26 1 T27 2419
valid_sources[0x59] 74119 1 T23 1 T26 1 T27 2475
valid_sources[0x5a] 70153 1 T22 20 T23 3 T27 2591
valid_sources[0x5b] 76234 1 T27 2596 T28 80 T41 3
valid_sources[0x5c] 70279 1 T23 1 T27 2637 T28 150
valid_sources[0x5d] 73680 1 T22 5 T23 2 T26 10
valid_sources[0x5e] 73749 1 T23 1 T27 2496 T28 74
valid_sources[0x5f] 68344 1 T26 1 T27 2457 T28 142
valid_sources[0x60] 72927 1 T23 3 T27 2558 T28 166
valid_sources[0x61] 69083 1 T27 2507 T28 244 T69 1
valid_sources[0x62] 72295 1 T22 1 T27 2501 T28 166
valid_sources[0x63] 80892 1 T23 1 T26 3 T27 2483
valid_sources[0x64] 68018 1 T26 3 T27 2507 T28 142
valid_sources[0x65] 78307 1 T26 1 T27 2481 T28 100
valid_sources[0x66] 70925 1 T23 1 T26 2 T27 2471
valid_sources[0x67] 66892 1 T26 7 T27 2516 T28 97
valid_sources[0x68] 82529 1 T22 21 T23 2 T27 2462
valid_sources[0x69] 79923 1 T22 47 T23 2 T26 4
valid_sources[0x6a] 76070 1 T26 4 T27 2469 T28 172
valid_sources[0x6b] 79863 1 T22 44 T27 2664 T28 176
valid_sources[0x6c] 78383 1 T23 2 T26 1 T27 2477
valid_sources[0x6d] 73814 1 T22 85 T23 3 T26 8
valid_sources[0x6e] 73109 1 T23 1 T26 8 T27 2332
valid_sources[0x6f] 68240 1 T23 1 T26 6 T27 2560
valid_sources[0x70] 65579 1 T26 9 T27 2461 T28 133
valid_sources[0x71] 79362 1 T23 2 T26 11 T27 2385
valid_sources[0x72] 74378 1 T22 27 T26 2 T27 2384
valid_sources[0x73] 80878 1 T23 1 T26 1 T27 2542
valid_sources[0x74] 83433 1 T22 32 T23 2 T27 2474
valid_sources[0x75] 73726 1 T23 1 T27 2344 T28 117
valid_sources[0x76] 65675 1 T23 3 T26 7 T27 2277
valid_sources[0x77] 70778 1 T23 3 T26 2 T27 2414
valid_sources[0x78] 161437 1 T22 32 T26 1 T27 2462
valid_sources[0x79] 139539 1 T22 33 T23 1 T27 2528
valid_sources[0x7a] 81001 1 T26 2 T27 2375 T28 156
valid_sources[0x7b] 72870 1 T20 1 T26 1 T27 2477
valid_sources[0x7c] 73112 1 T23 5 T26 6 T27 2392
valid_sources[0x7d] 76845 1 T26 8 T27 2653 T28 167
valid_sources[0x7e] 75709 1 T26 1 T27 2494 T28 161
valid_sources[0x7f] 72414 1 T23 2 T26 3 T27 2323
valid_sources[0x80] 83959 1 T20 3 T26 7 T27 2529



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 4658502 1 T31 33529 T32 203 T19 6
values[0x0] all_enables biggest_size 5999341 1 T31 42111 T32 194 T19 46
values[0x1] all_enables biggest_size 5988417 1 T31 42006 T32 202 T19 39

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%