Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	3036968	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

13418881

1

T20

2

T21

749

T22

389

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	6608793	1			T20	1		T21	337		T22	84
values[0x0]	4837812	1			T20	3		T21	308		T22	176
values[0x1]	5009244	1			T20	4		T21	279		T22	162

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	2337680	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

14118169

1

T20

2

T21

777

T22

396

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	62634	1			T21	2		T23	18		T26	16
valid_sources[0x01]	54546	1			T23	11		T26	25		T2	7
valid_sources[0x02]	61494	1			T21	4		T23	11		T24	1
valid_sources[0x03]	55150	1			T21	14		T23	13		T26	14
valid_sources[0x04]	61971	1			T23	20		T26	13		T27	3
valid_sources[0x05]	65290	1			T21	2		T23	11		T26	18
valid_sources[0x06]	60589	1			T23	13		T24	2		T26	9
valid_sources[0x07]	57791	1			T21	2		T23	18		T24	4
valid_sources[0x08]	53441	1			T23	10		T26	13		T27	3
valid_sources[0x09]	60171	1			T23	17		T26	19		T27	2
valid_sources[0x0a]	65953	1			T23	18		T24	2		T26	14
valid_sources[0x0b]	62753	1			T23	12		T24	1		T25	5
valid_sources[0x0c]	63368	1			T23	17		T24	2		T26	15
valid_sources[0x0d]	55747	1			T23	16		T26	6		T27	1
valid_sources[0x0e]	57716	1			T21	15		T23	17		T24	2
valid_sources[0x0f]	66115	1			T21	13		T23	20		T26	12
valid_sources[0x10]	49422	1			T23	20		T24	1		T26	14
valid_sources[0x11]	52729	1			T21	10		T23	18		T24	1
valid_sources[0x12]	61926	1			T23	11		T26	12		T27	3
valid_sources[0x13]	133151	1			T23	13		T24	3		T26	17
valid_sources[0x14]	63791	1			T21	1		T23	18		T25	1
valid_sources[0x15]	56326	1			T23	12		T26	12		T27	9
valid_sources[0x16]	55408	1			T23	16		T26	18		T27	4
valid_sources[0x17]	61291	1			T23	13		T24	6		T26	11
valid_sources[0x18]	58308	1			T21	1		T23	11		T24	4
valid_sources[0x19]	69410	1			T21	6		T23	12		T24	2
valid_sources[0x1a]	104217	1			T23	16		T24	2		T26	23
valid_sources[0x1b]	56011	1			T21	18		T23	11		T24	3
valid_sources[0x1c]	62961	1			T21	6		T23	18		T24	1
valid_sources[0x1d]	58104	1			T23	6		T24	1		T26	10
valid_sources[0x1e]	55752	1			T21	4		T23	17		T24	1
valid_sources[0x1f]	64558	1			T23	20		T26	10		T27	6
valid_sources[0x20]	66869	1			T23	17		T24	2		T26	18
valid_sources[0x21]	86569	1			T21	5		T23	14		T24	1
valid_sources[0x22]	61213	1			T21	24		T23	13		T26	12
valid_sources[0x23]	66166	1			T23	20		T24	1		T26	7
valid_sources[0x24]	58790	1			T23	13		T26	12		T27	4
valid_sources[0x25]	65884	1			T23	12		T26	8		T27	2
valid_sources[0x26]	54624	1			T21	32		T23	20		T24	1
valid_sources[0x27]	55694	1			T23	14		T25	3		T26	13
valid_sources[0x28]	64194	1			T23	13		T24	5		T25	2
valid_sources[0x29]	61894	1			T21	3		T23	12		T26	25
valid_sources[0x2a]	57525	1			T23	17		T26	12		T27	1
valid_sources[0x2b]	66285	1			T21	1		T23	12		T24	1
valid_sources[0x2c]	62457	1			T23	17		T26	8		T27	2
valid_sources[0x2d]	59414	1			T21	1		T23	19		T24	6
valid_sources[0x2e]	67625	1			T23	11		T26	10		T27	5
valid_sources[0x2f]	58828	1			T23	17		T24	13		T26	10
valid_sources[0x30]	158530	1			T23	19		T26	18		T27	4
valid_sources[0x31]	55322	1			T21	9		T23	21		T24	5
valid_sources[0x32]	58331	1			T23	16		T24	1		T26	14
valid_sources[0x33]	57648	1			T21	18		T23	11		T24	4
valid_sources[0x34]	61950	1			T21	5		T23	9		T24	4
valid_sources[0x35]	56283	1			T21	6		T23	11		T26	7
valid_sources[0x36]	65266	1			T23	14		T26	18		T27	1
valid_sources[0x37]	52907	1			T23	14		T26	12		T27	5
valid_sources[0x38]	66407	1			T23	13		T24	1		T26	14
valid_sources[0x39]	53948	1			T21	32		T23	19		T24	1
valid_sources[0x3a]	65670	1			T23	22		T26	16		T27	1
valid_sources[0x3b]	63636	1			T23	14		T24	1		T26	19
valid_sources[0x3c]	56745	1			T21	16		T23	14		T26	15
valid_sources[0x3d]	53659	1			T23	11		T26	22		T27	3
valid_sources[0x3e]	63133	1			T23	18		T24	7		T26	12
valid_sources[0x3f]	61876	1			T23	11		T26	17		T27	5
valid_sources[0x40]	61327	1			T23	19		T24	1		T26	14
valid_sources[0x41]	59461	1			T23	16		T24	1		T26	16
valid_sources[0x42]	54414	1			T23	18		T26	15		T27	1
valid_sources[0x43]	59248	1			T23	20		T26	10		T27	3
valid_sources[0x44]	56497	1			T23	9		T24	1		T26	11
valid_sources[0x45]	60889	1			T23	19		T25	1		T26	7
valid_sources[0x46]	57882	1			T23	13		T24	3		T25	1
valid_sources[0x47]	62039	1			T21	1		T23	24		T24	9
valid_sources[0x48]	62318	1			T23	18		T26	16		T27	3
valid_sources[0x49]	59472	1			T23	15		T24	1		T25	1
valid_sources[0x4a]	65938	1			T23	16		T26	14		T27	2
valid_sources[0x4b]	63624	1			T23	17		T24	3		T26	19
valid_sources[0x4c]	181523	1			T21	10		T23	18		T24	2
valid_sources[0x4d]	57934	1			T23	12		T26	21		T27	4
valid_sources[0x4e]	56776	1			T23	19		T26	20		T27	1
valid_sources[0x4f]	57505	1			T21	5		T23	14		T24	4
valid_sources[0x50]	65546	1			T23	10		T24	3		T26	8
valid_sources[0x51]	61136	1			T23	5		T26	10		T27	2
valid_sources[0x52]	66047	1			T23	16		T25	2		T26	8
valid_sources[0x53]	57368	1			T21	16		T23	14		T24	2
valid_sources[0x54]	57968	1			T23	15		T24	1		T26	15
valid_sources[0x55]	58437	1			T23	12		T26	35		T27	2
valid_sources[0x56]	67486	1			T21	2		T23	12		T24	4
valid_sources[0x57]	57154	1			T21	11		T23	11		T24	3
valid_sources[0x58]	65454	1			T23	12		T24	1		T26	12
valid_sources[0x59]	60311	1			T23	16		T24	1		T26	16
valid_sources[0x5a]	59334	1			T21	4		T23	19		T24	1
valid_sources[0x5b]	53772	1			T21	12		T23	17		T24	2
valid_sources[0x5c]	62683	1			T23	15		T24	1		T25	14
valid_sources[0x5d]	59810	1			T23	21		T24	1		T25	2
valid_sources[0x5e]	59385	1			T23	17		T25	2		T26	9
valid_sources[0x5f]	55650	1			T23	13		T25	6		T26	19
valid_sources[0x60]	61806	1			T21	9		T23	12		T24	2
valid_sources[0x61]	54649	1			T21	4		T23	20		T24	1
valid_sources[0x62]	56769	1			T23	14		T24	1		T25	10
valid_sources[0x63]	63753	1			T21	12		T23	20		T26	15
valid_sources[0x64]	60652	1			T23	20		T24	2		T26	9
valid_sources[0x65]	68084	1			T23	14		T26	16		T27	2
valid_sources[0x66]	54744	1			T21	1		T23	12		T24	1
valid_sources[0x67]	58093	1			T21	1		T23	15		T26	11
valid_sources[0x68]	57201	1			T23	11		T25	6		T26	5
valid_sources[0x69]	182384	1			T23	15		T26	14		T2	26
valid_sources[0x6a]	62756	1			T21	1		T23	15		T24	2
valid_sources[0x6b]	66596	1			T21	6		T23	18		T26	19
valid_sources[0x6c]	61515	1			T21	3		T23	16		T26	11
valid_sources[0x6d]	66962	1			T21	8		T23	21		T24	1
valid_sources[0x6e]	58573	1			T21	7		T23	18		T25	6
valid_sources[0x6f]	180171	1			T23	21		T24	1		T26	13
valid_sources[0x70]	61204	1			T21	3		T23	13		T24	1
valid_sources[0x71]	61929	1			T21	20		T23	13		T24	1
valid_sources[0x72]	57214	1			T23	15		T26	11		T27	3
valid_sources[0x73]	56735	1			T23	15		T25	1		T26	15
valid_sources[0x74]	62125	1			T23	15		T24	1		T25	1
valid_sources[0x75]	66193	1			T23	12		T24	2		T26	11
valid_sources[0x76]	60522	1			T23	13		T26	14		T27	6
valid_sources[0x77]	60134	1			T21	6		T23	20		T24	1
valid_sources[0x78]	71911	1			T23	22		T26	15		T27	5
valid_sources[0x79]	59703	1			T21	3		T23	16		T26	9
valid_sources[0x7a]	58089	1			T23	5		T26	21		T27	2
valid_sources[0x7b]	57714	1			T23	15		T26	8		T27	3
valid_sources[0x7c]	57488	1			T21	11		T23	30		T26	12
valid_sources[0x7d]	60080	1			T23	13		T26	21		T27	1
valid_sources[0x7e]	52770	1			T23	14		T26	24		T27	5
valid_sources[0x7f]	62897	1			T21	34		T23	22		T26	12
valid_sources[0x80]	55467	1			T23	15		T24	1		T26	6

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

3770482

1

T21

162

T22

51

T23

1703

values[0x0]

all_enables

biggest_size

4820958

1

T20

1

T21

308

T22

176

values[0x1]

all_enables

biggest_size

4827441

1

T20

1

T21

279

T22

162