Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 3382563 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 14919322 1 T19 486 T20 3718 T21 776



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 7360398 1 T19 258 T20 2247 T21 927
values[0x0] 5379502 1 T19 172 T20 1309 T21 163
values[0x1] 5561985 1 T19 174 T20 1314 T21 150



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 2605503 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 15696382 1 T19 507 T20 3964 T21 865



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 65143 1 T19 4 T20 14 T24 1
valid_sources[0x01] 66418 1 T19 3 T20 13 T21 3
valid_sources[0x02] 66097 1 T19 5 T20 28 T21 4
valid_sources[0x03] 64553 1 T20 18 T21 4 T22 1
valid_sources[0x04] 63639 1 T19 4 T20 30 T21 3
valid_sources[0x05] 72728 1 T20 29 T21 4 T24 3
valid_sources[0x06] 63782 1 T20 20 T21 4 T22 1
valid_sources[0x07] 68975 1 T19 2 T20 13 T21 6
valid_sources[0x08] 66610 1 T19 3 T20 19 T21 2
valid_sources[0x09] 67688 1 T19 2 T20 19 T21 7
valid_sources[0x0a] 64117 1 T20 25 T21 4 T24 1
valid_sources[0x0b] 66412 1 T19 2 T20 21 T21 13
valid_sources[0x0c] 66325 1 T19 6 T20 16 T21 9
valid_sources[0x0d] 64385 1 T19 5 T20 10 T21 8
valid_sources[0x0e] 66507 1 T19 1 T20 21 T21 1
valid_sources[0x0f] 65709 1 T19 3 T20 17 T21 3
valid_sources[0x10] 67376 1 T20 19 T21 2 T25 2701
valid_sources[0x11] 71417 1 T19 3 T20 14 T21 3
valid_sources[0x12] 66886 1 T19 1 T20 17 T21 7
valid_sources[0x13] 65661 1 T19 2 T20 24 T21 7
valid_sources[0x14] 69061 1 T20 28 T21 3 T22 2
valid_sources[0x15] 65744 1 T19 4 T20 19 T21 3
valid_sources[0x16] 66724 1 T20 11 T21 3 T22 2
valid_sources[0x17] 70085 1 T19 8 T20 12 T21 3
valid_sources[0x18] 69303 1 T19 3 T20 15 T21 8
valid_sources[0x19] 64751 1 T19 1 T20 18 T21 6
valid_sources[0x1a] 69799 1 T19 2 T20 18 T21 5
valid_sources[0x1b] 68736 1 T19 3 T20 12 T21 4
valid_sources[0x1c] 67100 1 T19 1 T20 31 T21 4
valid_sources[0x1d] 65534 1 T19 5 T20 20 T21 3
valid_sources[0x1e] 65120 1 T19 2 T20 21 T21 7
valid_sources[0x1f] 64446 1 T20 24 T21 8 T24 2
valid_sources[0x20] 66535 1 T20 25 T21 3 T22 1
valid_sources[0x21] 66527 1 T19 2 T20 26 T21 3
valid_sources[0x22] 64802 1 T19 4 T20 21 T21 4
valid_sources[0x23] 65959 1 T19 3 T20 28 T21 3
valid_sources[0x24] 64733 1 T19 2 T20 16 T21 2
valid_sources[0x25] 70514 1 T20 21 T21 7 T24 5
valid_sources[0x26] 64266 1 T19 2 T20 32 T21 7
valid_sources[0x27] 117720 1 T19 3 T20 19 T21 11
valid_sources[0x28] 65903 1 T19 3 T20 31 T21 8
valid_sources[0x29] 64897 1 T20 23 T21 6 T24 1
valid_sources[0x2a] 211107 1 T19 5 T20 29 T21 4
valid_sources[0x2b] 65030 1 T19 2 T20 15 T21 5
valid_sources[0x2c] 63525 1 T19 2 T20 9 T21 5
valid_sources[0x2d] 64899 1 T20 12 T21 4 T25 2476
valid_sources[0x2e] 65363 1 T20 16 T21 8 T22 1
valid_sources[0x2f] 67353 1 T19 3 T20 14 T21 5
valid_sources[0x30] 169288 1 T19 1 T20 14 T21 4
valid_sources[0x31] 66995 1 T19 2 T20 27 T21 5
valid_sources[0x32] 76282 1 T19 1 T20 10 T21 6
valid_sources[0x33] 64502 1 T20 20 T21 3 T22 1
valid_sources[0x34] 67699 1 T20 18 T21 5 T24 2
valid_sources[0x35] 64591 1 T19 4 T20 24 T21 1
valid_sources[0x36] 67391 1 T19 4 T20 15 T21 3
valid_sources[0x37] 64599 1 T20 19 T21 5 T22 1
valid_sources[0x38] 68726 1 T19 6 T20 19 T21 9
valid_sources[0x39] 66300 1 T19 2 T20 32 T21 2
valid_sources[0x3a] 66128 1 T20 10 T21 4 T22 2
valid_sources[0x3b] 63109 1 T20 10 T21 3 T22 2
valid_sources[0x3c] 67181 1 T19 5 T20 19 T21 3
valid_sources[0x3d] 69328 1 T20 26 T21 6 T22 1
valid_sources[0x3e] 67736 1 T19 1 T20 15 T21 2
valid_sources[0x3f] 66722 1 T19 4 T20 14 T21 5
valid_sources[0x40] 65288 1 T19 2 T20 15 T21 4
valid_sources[0x41] 62512 1 T19 1 T20 19 T21 3
valid_sources[0x42] 156888 1 T19 2 T20 22 T21 8
valid_sources[0x43] 65054 1 T20 21 T21 4 T22 1
valid_sources[0x44] 64573 1 T20 17 T21 5 T24 2
valid_sources[0x45] 63289 1 T19 1 T20 15 T21 7
valid_sources[0x46] 67150 1 T19 4 T20 24 T21 1
valid_sources[0x47] 64298 1 T19 7 T20 25 T21 8
valid_sources[0x48] 178236 1 T19 4 T20 29 T21 6
valid_sources[0x49] 63536 1 T19 1 T20 8 T21 4
valid_sources[0x4a] 65984 1 T19 4 T20 27 T21 4
valid_sources[0x4b] 62691 1 T20 25 T21 4 T22 2
valid_sources[0x4c] 67652 1 T19 3 T20 14 T21 6
valid_sources[0x4d] 85723 1 T19 1 T20 20 T21 6
valid_sources[0x4e] 67979 1 T19 1 T20 27 T21 8
valid_sources[0x4f] 64094 1 T20 21 T21 7 T25 2519
valid_sources[0x50] 66718 1 T19 1 T20 17 T21 1
valid_sources[0x51] 67838 1 T19 5 T20 14 T21 1
valid_sources[0x52] 63223 1 T19 2 T20 24 T21 9
valid_sources[0x53] 69260 1 T19 1 T20 13 T21 6
valid_sources[0x54] 67344 1 T19 2 T20 25 T21 2
valid_sources[0x55] 64453 1 T19 1 T20 16 T21 1
valid_sources[0x56] 64515 1 T19 2 T20 14 T21 8
valid_sources[0x57] 65500 1 T19 3 T20 28 T21 2
valid_sources[0x58] 68375 1 T19 3 T20 17 T21 5
valid_sources[0x59] 115039 1 T19 3 T20 21 T21 3
valid_sources[0x5a] 71364 1 T19 6 T20 15 T21 3
valid_sources[0x5b] 63981 1 T19 5 T20 11 T21 1
valid_sources[0x5c] 67561 1 T19 5 T20 16 T25 2679
valid_sources[0x5d] 67935 1 T19 1 T20 12 T24 1
valid_sources[0x5e] 64885 1 T19 3 T20 14 T21 2
valid_sources[0x5f] 65311 1 T19 2 T20 5 T21 3
valid_sources[0x60] 66296 1 T19 3 T20 30 T21 1
valid_sources[0x61] 74367 1 T19 1 T20 20 T21 4
valid_sources[0x62] 66432 1 T19 1 T20 20 T21 2
valid_sources[0x63] 214583 1 T19 1 T20 20 T21 6
valid_sources[0x64] 64908 1 T19 3 T20 35 T21 4
valid_sources[0x65] 66217 1 T19 3 T20 19 T21 5
valid_sources[0x66] 65221 1 T19 6 T20 24 T21 5
valid_sources[0x67] 66573 1 T19 4 T20 21 T21 5
valid_sources[0x68] 66752 1 T19 2 T20 12 T21 7
valid_sources[0x69] 69178 1 T19 8 T20 35 T21 7
valid_sources[0x6a] 65649 1 T19 3 T20 18 T21 5
valid_sources[0x6b] 65923 1 T19 6 T20 5 T21 5
valid_sources[0x6c] 68150 1 T19 4 T20 20 T21 4
valid_sources[0x6d] 70692 1 T19 3 T20 27 T21 8
valid_sources[0x6e] 63735 1 T19 5 T20 27 T21 4
valid_sources[0x6f] 68234 1 T19 7 T20 19 T21 10
valid_sources[0x70] 64157 1 T19 4 T20 23 T21 5
valid_sources[0x71] 70744 1 T19 1 T20 31 T21 7
valid_sources[0x72] 67115 1 T19 2 T20 15 T21 8
valid_sources[0x73] 69417 1 T19 1 T20 9 T21 5
valid_sources[0x74] 189905 1 T19 1 T20 8 T21 9
valid_sources[0x75] 63777 1 T19 2 T20 10 T21 3
valid_sources[0x76] 66605 1 T19 4 T20 21 T21 5
valid_sources[0x77] 68194 1 T19 1 T20 34 T21 7
valid_sources[0x78] 64721 1 T19 1 T20 17 T21 3
valid_sources[0x79] 67848 1 T19 4 T20 14 T21 8
valid_sources[0x7a] 63918 1 T19 4 T20 15 T21 5
valid_sources[0x7b] 64216 1 T19 1 T20 20 T21 9
valid_sources[0x7c] 65774 1 T20 20 T21 3 T22 3
valid_sources[0x7d] 69690 1 T20 14 T21 4 T22 1
valid_sources[0x7e] 68704 1 T19 1 T20 25 T21 8
valid_sources[0x7f] 67297 1 T19 3 T20 29 T21 6
valid_sources[0x80] 71773 1 T19 1 T20 10 T21 9



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 4197010 1 T19 140 T20 1095 T21 463
values[0x0] all_enables biggest_size 5361220 1 T19 172 T20 1309 T21 163
values[0x1] all_enables biggest_size 5361092 1 T19 174 T20 1314 T21 150

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%