Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_gpio_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	4121460	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

18779145

1

T24

218

T25

180519

T26

406

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	9071628	1			T24	77		T25	88634		T26	212
values[0x0]	6787602	1			T24	86		T25	65127		T26	147
values[0x1]	7041375	1			T24	94		T25	67594		T26	153

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	3154166	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

19746439

1

T24

223

T25

189832

T26

429

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	82017	1			T24	2		T25	1076		T26	1
valid_sources[0x01]	249156	1			T24	12		T25	41		T26	1
valid_sources[0x02]	231761	1			T25	24		T30	13		T31	1
valid_sources[0x03]	150267	1			T25	2822		T26	3		T27	1
valid_sources[0x04]	81608	1			T25	48		T26	5		T30	17
valid_sources[0x05]	83245	1			T25	848		T27	4		T30	23
valid_sources[0x06]	81079	1			T25	300		T26	2		T27	3
valid_sources[0x07]	81327	1			T25	1295		T26	2		T27	5
valid_sources[0x08]	90806	1			T25	46		T27	2		T30	12
valid_sources[0x09]	90419	1			T25	1067		T26	2		T30	19
valid_sources[0x0a]	88946	1			T25	1818		T26	3		T30	23
valid_sources[0x0b]	84385	1			T25	2555		T26	1		T27	5
valid_sources[0x0c]	86229	1			T25	59		T26	4		T27	5
valid_sources[0x0d]	79664	1			T24	7		T25	833		T26	4
valid_sources[0x0e]	99042	1			T25	614		T26	7		T30	23
valid_sources[0x0f]	86483	1			T25	1098		T26	1		T27	2
valid_sources[0x10]	86754	1			T25	261		T26	3		T27	13
valid_sources[0x11]	84669	1			T25	226		T27	1		T30	17
valid_sources[0x12]	97075	1			T25	2842		T26	5		T27	4
valid_sources[0x13]	90374	1			T25	142		T27	3		T30	26
valid_sources[0x14]	84718	1			T25	89		T27	3		T30	16
valid_sources[0x15]	85279	1			T25	2354		T26	1		T30	27
valid_sources[0x16]	86869	1			T25	53		T27	6		T30	20
valid_sources[0x17]	84210	1			T25	181		T26	3		T27	1
valid_sources[0x18]	85407	1			T25	57		T27	7		T30	14
valid_sources[0x19]	90237	1			T24	1		T25	1459		T26	7
valid_sources[0x1a]	90518	1			T24	14		T25	171		T26	1
valid_sources[0x1b]	84000	1			T25	72		T26	4		T27	3
valid_sources[0x1c]	84939	1			T25	43		T26	1		T27	2
valid_sources[0x1d]	82527	1			T25	149		T27	5		T30	18
valid_sources[0x1e]	87498	1			T25	2156		T27	2		T30	14
valid_sources[0x1f]	83053	1			T25	74		T27	1		T30	22
valid_sources[0x20]	84118	1			T25	21		T26	1		T27	1
valid_sources[0x21]	82511	1			T25	310		T26	2		T30	20
valid_sources[0x22]	92330	1			T25	291		T26	5		T27	4
valid_sources[0x23]	84559	1			T25	1165		T26	1		T27	3
valid_sources[0x24]	81960	1			T25	403		T26	1		T27	12
valid_sources[0x25]	91672	1			T25	3757		T27	3		T30	15
valid_sources[0x26]	85204	1			T25	331		T27	6		T30	18
valid_sources[0x27]	84643	1			T25	602		T26	2		T27	1
valid_sources[0x28]	88347	1			T25	204		T26	2		T27	3
valid_sources[0x29]	102063	1			T25	1609		T26	3		T27	3
valid_sources[0x2a]	97399	1			T24	11		T25	1212		T26	3
valid_sources[0x2b]	85700	1			T25	276		T26	6		T27	5
valid_sources[0x2c]	85981	1			T25	1008		T27	11		T30	16
valid_sources[0x2d]	89169	1			T25	445		T26	2		T30	15
valid_sources[0x2e]	84307	1			T25	3592		T26	3		T30	19
valid_sources[0x2f]	81587	1			T25	106		T26	5		T27	6
valid_sources[0x30]	84970	1			T25	236		T30	18		T32	11
valid_sources[0x31]	85991	1			T25	725		T26	1		T27	2
valid_sources[0x32]	87776	1			T25	184		T26	1		T27	2
valid_sources[0x33]	83552	1			T25	167		T27	2		T30	16
valid_sources[0x34]	86560	1			T25	2390		T27	4		T30	10
valid_sources[0x35]	90774	1			T25	1478		T26	1		T27	2
valid_sources[0x36]	84578	1			T25	4950		T27	7		T30	21
valid_sources[0x37]	82425	1			T25	386		T26	2		T27	10
valid_sources[0x38]	82547	1			T25	171		T26	6		T27	3
valid_sources[0x39]	79666	1			T25	797		T26	3		T30	14
valid_sources[0x3a]	88700	1			T25	734		T27	4		T30	21
valid_sources[0x3b]	89434	1			T24	2		T25	2939		T26	1
valid_sources[0x3c]	83546	1			T25	1364		T26	4		T27	2
valid_sources[0x3d]	84745	1			T25	1855		T26	3		T27	4
valid_sources[0x3e]	86496	1			T25	1142		T27	3		T30	18
valid_sources[0x3f]	86202	1			T25	230		T27	8		T30	15
valid_sources[0x40]	137647	1			T25	3703		T26	4		T30	20
valid_sources[0x41]	83634	1			T24	16		T25	240		T27	3
valid_sources[0x42]	79415	1			T25	51		T26	3		T27	5
valid_sources[0x43]	89724	1			T25	380		T26	1		T27	9
valid_sources[0x44]	84051	1			T24	10		T25	4		T27	4
valid_sources[0x45]	83423	1			T25	219		T27	8		T29	69
valid_sources[0x46]	88104	1			T25	2064		T27	2		T30	21
valid_sources[0x47]	88232	1			T24	49		T25	4324		T26	2
valid_sources[0x48]	81475	1			T25	1701		T26	5		T27	4
valid_sources[0x49]	84149	1			T25	47		T26	3		T27	7
valid_sources[0x4a]	84566	1			T25	423		T26	8		T27	2
valid_sources[0x4b]	99021	1			T25	659		T26	5		T30	26
valid_sources[0x4c]	85264	1			T25	1223		T26	5		T30	17
valid_sources[0x4d]	121220	1			T25	199		T27	2		T30	24
valid_sources[0x4e]	86262	1			T25	295		T26	1		T27	3
valid_sources[0x4f]	91136	1			T25	988		T26	4		T27	2
valid_sources[0x50]	79926	1			T25	202		T26	2		T30	28
valid_sources[0x51]	86816	1			T25	1756		T26	2		T27	6
valid_sources[0x52]	88449	1			T25	2589		T26	5		T27	1
valid_sources[0x53]	87399	1			T25	1280		T26	2		T27	5
valid_sources[0x54]	83036	1			T25	99		T26	3		T27	6
valid_sources[0x55]	83243	1			T25	107		T26	3		T30	27
valid_sources[0x56]	84739	1			T25	968		T30	22		T31	1
valid_sources[0x57]	86564	1			T25	1356		T26	1		T27	1
valid_sources[0x58]	97860	1			T25	295		T27	4		T30	23
valid_sources[0x59]	85274	1			T25	50		T26	5		T27	4
valid_sources[0x5a]	82188	1			T25	88		T26	3		T27	2
valid_sources[0x5b]	86242	1			T25	400		T26	8		T30	25
valid_sources[0x5c]	188332	1			T25	1821		T26	2		T30	18
valid_sources[0x5d]	80145	1			T25	346		T26	3		T30	16
valid_sources[0x5e]	87056	1			T25	799		T26	5		T27	7
valid_sources[0x5f]	82324	1			T25	186		T30	16		T32	8
valid_sources[0x60]	86933	1			T25	200		T26	2		T27	9
valid_sources[0x61]	90047	1			T25	1263		T27	2		T30	18
valid_sources[0x62]	83912	1			T25	2371		T30	14		T31	4
valid_sources[0x63]	81183	1			T24	1		T25	110		T26	2
valid_sources[0x64]	86878	1			T25	82		T30	15		T31	2
valid_sources[0x65]	81680	1			T25	13		T26	2		T30	14
valid_sources[0x66]	85403	1			T25	71		T27	3		T30	20
valid_sources[0x67]	89924	1			T25	250		T26	5		T27	4
valid_sources[0x68]	83863	1			T25	925		T26	1		T27	5
valid_sources[0x69]	91821	1			T25	111		T26	3		T27	2
valid_sources[0x6a]	82231	1			T25	30		T27	4		T30	19
valid_sources[0x6b]	81447	1			T25	1330		T27	2		T30	31
valid_sources[0x6c]	86957	1			T25	122		T26	3		T27	1
valid_sources[0x6d]	80000	1			T25	320		T26	2		T27	5
valid_sources[0x6e]	82347	1			T25	796		T27	4		T30	21
valid_sources[0x6f]	89133	1			T25	549		T26	5		T30	20
valid_sources[0x70]	86723	1			T25	695		T26	3		T27	9
valid_sources[0x71]	94471	1			T25	1258		T26	1		T27	1
valid_sources[0x72]	84812	1			T25	296		T26	9		T27	4
valid_sources[0x73]	83108	1			T25	103		T26	6		T30	20
valid_sources[0x74]	81561	1			T24	2		T25	26		T30	14
valid_sources[0x75]	84417	1			T24	7		T25	67		T26	1
valid_sources[0x76]	87507	1			T25	1589		T27	1		T30	18
valid_sources[0x77]	92055	1			T25	323		T26	2		T30	22
valid_sources[0x78]	87766	1			T25	214		T27	8		T30	21
valid_sources[0x79]	84396	1			T25	312		T26	1		T27	2
valid_sources[0x7a]	85738	1			T25	1483		T26	2		T27	3
valid_sources[0x7b]	87859	1			T25	220		T26	1		T30	16
valid_sources[0x7c]	92422	1			T25	440		T26	3		T30	15
valid_sources[0x7d]	85208	1			T25	278		T26	6		T27	5
valid_sources[0x7e]	83886	1			T25	50		T26	7		T27	1
valid_sources[0x7f]	85994	1			T25	39		T26	1		T27	4
valid_sources[0x80]	81823	1			T25	31		T26	1		T27	3

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

5253530

1

T24

38

T25

50344

T26

106

values[0x0]

all_enables

biggest_size

6762210

1

T24

86

T25

64895

T26

147

values[0x1]

all_enables

biggest_size

6763405

1

T24

94

T25

65280

T26

153