cp_pins | cp_stable_cycles | cp_pin_value | cp_filter_en | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58638 |
1 |
|
|
T23 |
2724 |
|
T102 |
1030 |
|
T17 |
1934 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52245 |
1 |
|
|
T23 |
857 |
|
T102 |
1533 |
|
T17 |
950 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56214 |
1 |
|
|
T23 |
1730 |
|
T102 |
1956 |
|
T17 |
1668 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41820 |
1 |
|
|
T23 |
724 |
|
T102 |
1287 |
|
T17 |
2145 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
26 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1662 |
1 |
|
|
T23 |
42 |
|
T102 |
46 |
|
T17 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T23 |
42 |
|
T102 |
45 |
|
T17 |
45 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
26 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T23 |
42 |
|
T102 |
46 |
|
T17 |
43 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
745 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T23 |
41 |
|
T102 |
43 |
|
T17 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
26 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1607 |
1 |
|
|
T23 |
41 |
|
T102 |
45 |
|
T17 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T23 |
41 |
|
T102 |
43 |
|
T17 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
26 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T23 |
40 |
|
T102 |
44 |
|
T17 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T23 |
40 |
|
T102 |
43 |
|
T17 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
26 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T23 |
40 |
|
T102 |
43 |
|
T17 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T23 |
40 |
|
T102 |
43 |
|
T17 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
26 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T23 |
40 |
|
T102 |
43 |
|
T17 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T23 |
40 |
|
T102 |
40 |
|
T17 |
44 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T23 |
25 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T23 |
41 |
|
T102 |
42 |
|
T17 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T23 |
39 |
|
T102 |
40 |
|
T17 |
43 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T23 |
25 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T23 |
39 |
|
T102 |
40 |
|
T17 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T23 |
37 |
|
T102 |
39 |
|
T17 |
42 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
25 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T23 |
39 |
|
T102 |
40 |
|
T17 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T23 |
35 |
|
T102 |
36 |
|
T17 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
25 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T23 |
37 |
|
T102 |
39 |
|
T17 |
41 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T23 |
35 |
|
T102 |
36 |
|
T17 |
37 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T23 |
25 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T23 |
35 |
|
T102 |
34 |
|
T17 |
40 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T23 |
33 |
|
T102 |
35 |
|
T17 |
35 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T23 |
25 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T23 |
35 |
|
T102 |
34 |
|
T17 |
39 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T23 |
33 |
|
T102 |
35 |
|
T17 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T23 |
25 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T23 |
35 |
|
T102 |
34 |
|
T17 |
38 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T23 |
30 |
|
T102 |
35 |
|
T17 |
34 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T23 |
25 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T23 |
34 |
|
T102 |
34 |
|
T17 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T23 |
30 |
|
T102 |
34 |
|
T17 |
31 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T23 |
25 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T23 |
33 |
|
T102 |
34 |
|
T17 |
36 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1178 |
1 |
|
|
T23 |
28 |
|
T102 |
33 |
|
T17 |
31 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53357 |
1 |
|
|
T23 |
1346 |
|
T102 |
1948 |
|
T17 |
2298 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
53610 |
1 |
|
|
T23 |
1330 |
|
T102 |
1473 |
|
T17 |
1440 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53003 |
1 |
|
|
T23 |
1001 |
|
T102 |
1463 |
|
T17 |
984 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47540 |
1 |
|
|
T23 |
2112 |
|
T102 |
735 |
|
T17 |
1458 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T23 |
17 |
|
T102 |
29 |
|
T17 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1765 |
1 |
|
|
T23 |
64 |
|
T102 |
43 |
|
T17 |
78 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T23 |
15 |
|
T102 |
26 |
|
T17 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1756 |
1 |
|
|
T23 |
66 |
|
T102 |
46 |
|
T17 |
80 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T23 |
17 |
|
T102 |
29 |
|
T17 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1731 |
1 |
|
|
T23 |
60 |
|
T102 |
43 |
|
T17 |
78 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T23 |
15 |
|
T102 |
26 |
|
T17 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1717 |
1 |
|
|
T23 |
64 |
|
T102 |
46 |
|
T17 |
79 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T23 |
17 |
|
T102 |
29 |
|
T17 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1699 |
1 |
|
|
T23 |
60 |
|
T102 |
43 |
|
T17 |
75 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T23 |
15 |
|
T102 |
26 |
|
T17 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1683 |
1 |
|
|
T23 |
63 |
|
T102 |
43 |
|
T17 |
77 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T23 |
17 |
|
T102 |
29 |
|
T17 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T23 |
60 |
|
T102 |
43 |
|
T17 |
73 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T23 |
15 |
|
T102 |
26 |
|
T17 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1642 |
1 |
|
|
T23 |
58 |
|
T102 |
40 |
|
T17 |
74 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T23 |
17 |
|
T102 |
29 |
|
T17 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T23 |
59 |
|
T102 |
42 |
|
T17 |
68 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T23 |
15 |
|
T102 |
26 |
|
T17 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T23 |
56 |
|
T102 |
40 |
|
T17 |
73 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T23 |
17 |
|
T102 |
29 |
|
T17 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T23 |
55 |
|
T102 |
42 |
|
T17 |
67 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T23 |
15 |
|
T102 |
26 |
|
T17 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1571 |
1 |
|
|
T23 |
55 |
|
T102 |
37 |
|
T17 |
73 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T23 |
16 |
|
T102 |
29 |
|
T17 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T23 |
56 |
|
T102 |
42 |
|
T17 |
67 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T23 |
15 |
|
T102 |
26 |
|
T17 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1546 |
1 |
|
|
T23 |
55 |
|
T102 |
37 |
|
T17 |
72 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T23 |
16 |
|
T102 |
29 |
|
T17 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T23 |
55 |
|
T102 |
41 |
|
T17 |
67 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T23 |
15 |
|
T102 |
26 |
|
T17 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1512 |
1 |
|
|
T23 |
54 |
|
T102 |
35 |
|
T17 |
70 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T23 |
16 |
|
T102 |
29 |
|
T17 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T23 |
55 |
|
T102 |
40 |
|
T17 |
65 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T23 |
15 |
|
T102 |
26 |
|
T17 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1486 |
1 |
|
|
T23 |
54 |
|
T102 |
32 |
|
T17 |
69 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T23 |
16 |
|
T102 |
29 |
|
T17 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T23 |
55 |
|
T102 |
37 |
|
T17 |
63 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T23 |
15 |
|
T102 |
26 |
|
T17 |
16 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T23 |
51 |
|
T102 |
32 |
|
T17 |
66 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T23 |
16 |
|
T102 |
29 |
|
T17 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T23 |
52 |
|
T102 |
37 |
|
T17 |
62 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T23 |
15 |
|
T102 |
25 |
|
T17 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T23 |
50 |
|
T102 |
30 |
|
T17 |
62 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T23 |
16 |
|
T102 |
29 |
|
T17 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T23 |
52 |
|
T102 |
37 |
|
T17 |
59 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T23 |
15 |
|
T102 |
25 |
|
T17 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T23 |
50 |
|
T102 |
30 |
|
T17 |
62 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T23 |
16 |
|
T102 |
29 |
|
T17 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T23 |
50 |
|
T102 |
37 |
|
T17 |
58 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T23 |
15 |
|
T102 |
25 |
|
T17 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T23 |
50 |
|
T102 |
29 |
|
T17 |
61 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T23 |
16 |
|
T102 |
29 |
|
T17 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T23 |
49 |
|
T102 |
36 |
|
T17 |
56 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T23 |
15 |
|
T102 |
25 |
|
T17 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T23 |
47 |
|
T102 |
28 |
|
T17 |
58 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T23 |
16 |
|
T102 |
29 |
|
T17 |
18 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T23 |
48 |
|
T102 |
34 |
|
T17 |
53 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T23 |
15 |
|
T102 |
25 |
|
T17 |
15 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T23 |
45 |
|
T102 |
28 |
|
T17 |
55 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53986 |
1 |
|
|
T23 |
2135 |
|
T102 |
990 |
|
T17 |
1248 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47827 |
1 |
|
|
T23 |
1132 |
|
T102 |
1463 |
|
T17 |
1342 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57002 |
1 |
|
|
T23 |
1625 |
|
T102 |
1243 |
|
T17 |
2798 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49032 |
1 |
|
|
T23 |
1055 |
|
T102 |
1638 |
|
T17 |
1127 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T23 |
22 |
|
T102 |
15 |
|
T17 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1760 |
1 |
|
|
T23 |
51 |
|
T102 |
68 |
|
T17 |
61 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T23 |
21 |
|
T102 |
14 |
|
T17 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1754 |
1 |
|
|
T23 |
51 |
|
T102 |
70 |
|
T17 |
61 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T23 |
22 |
|
T102 |
15 |
|
T17 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1712 |
1 |
|
|
T23 |
50 |
|
T102 |
67 |
|
T17 |
59 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T23 |
21 |
|
T102 |
14 |
|
T17 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T23 |
50 |
|
T102 |
68 |
|
T17 |
60 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T23 |
22 |
|
T102 |
15 |
|
T17 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1683 |
1 |
|
|
T23 |
50 |
|
T102 |
65 |
|
T17 |
59 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T23 |
21 |
|
T102 |
14 |
|
T17 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T23 |
49 |
|
T102 |
66 |
|
T17 |
59 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T23 |
22 |
|
T102 |
15 |
|
T17 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T23 |
50 |
|
T102 |
65 |
|
T17 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T23 |
21 |
|
T102 |
14 |
|
T17 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1635 |
1 |
|
|
T23 |
45 |
|
T102 |
65 |
|
T17 |
58 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T23 |
22 |
|
T102 |
15 |
|
T17 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1600 |
1 |
|
|
T23 |
49 |
|
T102 |
64 |
|
T17 |
55 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T23 |
21 |
|
T102 |
14 |
|
T17 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1604 |
1 |
|
|
T23 |
45 |
|
T102 |
65 |
|
T17 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T23 |
22 |
|
T102 |
15 |
|
T17 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T23 |
48 |
|
T102 |
62 |
|
T17 |
54 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T23 |
21 |
|
T102 |
14 |
|
T17 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1563 |
1 |
|
|
T23 |
45 |
|
T102 |
64 |
|
T17 |
56 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T23 |
48 |
|
T102 |
62 |
|
T17 |
53 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T23 |
21 |
|
T102 |
14 |
|
T17 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T23 |
42 |
|
T102 |
64 |
|
T17 |
55 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T23 |
46 |
|
T102 |
60 |
|
T17 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T23 |
21 |
|
T102 |
14 |
|
T17 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1500 |
1 |
|
|
T23 |
41 |
|
T102 |
63 |
|
T17 |
54 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T23 |
46 |
|
T102 |
60 |
|
T17 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T23 |
21 |
|
T102 |
14 |
|
T17 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T23 |
41 |
|
T102 |
61 |
|
T17 |
53 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T23 |
46 |
|
T102 |
59 |
|
T17 |
50 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T23 |
21 |
|
T102 |
14 |
|
T17 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T23 |
40 |
|
T102 |
59 |
|
T17 |
51 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T23 |
44 |
|
T102 |
57 |
|
T17 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T23 |
21 |
|
T102 |
13 |
|
T17 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T23 |
39 |
|
T102 |
56 |
|
T17 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T23 |
43 |
|
T102 |
57 |
|
T17 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T23 |
21 |
|
T102 |
13 |
|
T17 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T23 |
39 |
|
T102 |
54 |
|
T17 |
49 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T23 |
40 |
|
T102 |
54 |
|
T17 |
46 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T23 |
21 |
|
T102 |
13 |
|
T17 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T23 |
37 |
|
T102 |
52 |
|
T17 |
47 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T23 |
40 |
|
T102 |
53 |
|
T17 |
43 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T23 |
21 |
|
T102 |
13 |
|
T17 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1303 |
1 |
|
|
T23 |
36 |
|
T102 |
50 |
|
T17 |
45 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
20 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T23 |
39 |
|
T102 |
50 |
|
T17 |
42 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T23 |
21 |
|
T102 |
13 |
|
T17 |
21 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1285 |
1 |
|
|
T23 |
35 |
|
T102 |
45 |
|
T17 |
45 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55647 |
1 |
|
|
T23 |
1493 |
|
T102 |
1252 |
|
T17 |
1908 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48999 |
1 |
|
|
T23 |
1148 |
|
T102 |
1755 |
|
T17 |
1203 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63925 |
1 |
|
|
T23 |
1930 |
|
T102 |
1430 |
|
T17 |
2192 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40704 |
1 |
|
|
T23 |
1180 |
|
T102 |
1069 |
|
T17 |
1203 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T23 |
18 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T23 |
62 |
|
T102 |
57 |
|
T17 |
51 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
19 |
|
T102 |
25 |
|
T17 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T23 |
61 |
|
T102 |
52 |
|
T17 |
55 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T23 |
18 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T23 |
61 |
|
T102 |
57 |
|
T17 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
19 |
|
T102 |
25 |
|
T17 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1603 |
1 |
|
|
T23 |
60 |
|
T102 |
50 |
|
T17 |
54 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T23 |
18 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T23 |
59 |
|
T102 |
57 |
|
T17 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
19 |
|
T102 |
25 |
|
T17 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1576 |
1 |
|
|
T23 |
60 |
|
T102 |
49 |
|
T17 |
53 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T23 |
18 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T23 |
57 |
|
T102 |
54 |
|
T17 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
19 |
|
T102 |
25 |
|
T17 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T23 |
59 |
|
T102 |
47 |
|
T17 |
53 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T23 |
18 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T23 |
56 |
|
T102 |
53 |
|
T17 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T23 |
19 |
|
T102 |
25 |
|
T17 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T23 |
58 |
|
T102 |
46 |
|
T17 |
51 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T23 |
18 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T23 |
53 |
|
T102 |
52 |
|
T17 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T23 |
19 |
|
T102 |
25 |
|
T17 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T23 |
58 |
|
T102 |
46 |
|
T17 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T23 |
18 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T23 |
53 |
|
T102 |
51 |
|
T17 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T23 |
58 |
|
T102 |
47 |
|
T17 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T23 |
18 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T23 |
52 |
|
T102 |
51 |
|
T17 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T23 |
55 |
|
T102 |
45 |
|
T17 |
50 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
18 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T23 |
51 |
|
T102 |
49 |
|
T17 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T23 |
55 |
|
T102 |
41 |
|
T17 |
49 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
18 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T23 |
49 |
|
T102 |
48 |
|
T17 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1363 |
1 |
|
|
T23 |
54 |
|
T102 |
40 |
|
T17 |
48 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T23 |
18 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T23 |
47 |
|
T102 |
47 |
|
T17 |
45 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T23 |
53 |
|
T102 |
39 |
|
T17 |
48 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T23 |
18 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T23 |
44 |
|
T102 |
46 |
|
T17 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1300 |
1 |
|
|
T23 |
53 |
|
T102 |
38 |
|
T17 |
47 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
18 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1251 |
1 |
|
|
T23 |
40 |
|
T102 |
46 |
|
T17 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T23 |
52 |
|
T102 |
36 |
|
T17 |
46 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
18 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T23 |
40 |
|
T102 |
42 |
|
T17 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T23 |
52 |
|
T102 |
36 |
|
T17 |
44 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
18 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T23 |
38 |
|
T102 |
40 |
|
T17 |
43 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
24 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1202 |
1 |
|
|
T23 |
52 |
|
T102 |
35 |
|
T17 |
43 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59631 |
1 |
|
|
T23 |
1757 |
|
T102 |
1338 |
|
T17 |
1563 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44633 |
1 |
|
|
T23 |
605 |
|
T102 |
974 |
|
T17 |
834 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59777 |
1 |
|
|
T23 |
2950 |
|
T102 |
1788 |
|
T17 |
1760 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45574 |
1 |
|
|
T23 |
872 |
|
T102 |
1538 |
|
T17 |
2495 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T23 |
24 |
|
T102 |
19 |
|
T17 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T23 |
39 |
|
T102 |
52 |
|
T17 |
50 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T23 |
26 |
|
T102 |
26 |
|
T17 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T23 |
37 |
|
T102 |
46 |
|
T17 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T23 |
24 |
|
T102 |
19 |
|
T17 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T23 |
37 |
|
T102 |
50 |
|
T17 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
749 |
1 |
|
|
T23 |
26 |
|
T102 |
26 |
|
T17 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T23 |
37 |
|
T102 |
45 |
|
T17 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
24 |
|
T102 |
19 |
|
T17 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T23 |
37 |
|
T102 |
50 |
|
T17 |
47 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T23 |
26 |
|
T102 |
26 |
|
T17 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T23 |
36 |
|
T102 |
45 |
|
T17 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
24 |
|
T102 |
19 |
|
T17 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T23 |
36 |
|
T102 |
50 |
|
T17 |
43 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T23 |
26 |
|
T102 |
26 |
|
T17 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T23 |
36 |
|
T102 |
44 |
|
T17 |
49 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
24 |
|
T102 |
19 |
|
T17 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T23 |
36 |
|
T102 |
49 |
|
T17 |
41 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T23 |
26 |
|
T102 |
26 |
|
T17 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T23 |
34 |
|
T102 |
42 |
|
T17 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
24 |
|
T102 |
19 |
|
T17 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T23 |
33 |
|
T102 |
48 |
|
T17 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T23 |
26 |
|
T102 |
26 |
|
T17 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T23 |
34 |
|
T102 |
42 |
|
T17 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T23 |
34 |
|
T102 |
48 |
|
T17 |
40 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T23 |
26 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T23 |
33 |
|
T102 |
40 |
|
T17 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T23 |
34 |
|
T102 |
47 |
|
T17 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T23 |
26 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1415 |
1 |
|
|
T23 |
33 |
|
T102 |
38 |
|
T17 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1361 |
1 |
|
|
T23 |
32 |
|
T102 |
47 |
|
T17 |
38 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T23 |
26 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T23 |
33 |
|
T102 |
37 |
|
T17 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T23 |
30 |
|
T102 |
46 |
|
T17 |
37 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T23 |
26 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T23 |
33 |
|
T102 |
35 |
|
T17 |
48 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T23 |
28 |
|
T102 |
44 |
|
T17 |
35 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T23 |
26 |
|
T102 |
25 |
|
T17 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T23 |
33 |
|
T102 |
34 |
|
T17 |
44 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T23 |
27 |
|
T102 |
41 |
|
T17 |
33 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T23 |
26 |
|
T102 |
25 |
|
T17 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T23 |
33 |
|
T102 |
34 |
|
T17 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T23 |
26 |
|
T102 |
40 |
|
T17 |
31 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
26 |
|
T102 |
25 |
|
T17 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T23 |
32 |
|
T102 |
34 |
|
T17 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1181 |
1 |
|
|
T23 |
25 |
|
T102 |
37 |
|
T17 |
31 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
26 |
|
T102 |
25 |
|
T17 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T23 |
31 |
|
T102 |
33 |
|
T17 |
42 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
25 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1148 |
1 |
|
|
T23 |
24 |
|
T102 |
36 |
|
T17 |
29 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
26 |
|
T102 |
25 |
|
T17 |
26 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1211 |
1 |
|
|
T23 |
30 |
|
T102 |
31 |
|
T17 |
42 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56388 |
1 |
|
|
T23 |
1446 |
|
T102 |
1333 |
|
T17 |
2433 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
52797 |
1 |
|
|
T23 |
1914 |
|
T102 |
1523 |
|
T17 |
1366 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52747 |
1 |
|
|
T23 |
1831 |
|
T102 |
1405 |
|
T17 |
1090 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47458 |
1 |
|
|
T23 |
1103 |
|
T102 |
1337 |
|
T17 |
1722 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
22 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T23 |
38 |
|
T102 |
46 |
|
T17 |
65 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T23 |
21 |
|
T102 |
18 |
|
T17 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1678 |
1 |
|
|
T23 |
38 |
|
T102 |
53 |
|
T17 |
63 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
22 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T23 |
36 |
|
T102 |
44 |
|
T17 |
63 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T23 |
21 |
|
T102 |
18 |
|
T17 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1649 |
1 |
|
|
T23 |
37 |
|
T102 |
53 |
|
T17 |
59 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
22 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T23 |
36 |
|
T102 |
44 |
|
T17 |
60 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T23 |
21 |
|
T102 |
18 |
|
T17 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1618 |
1 |
|
|
T23 |
36 |
|
T102 |
51 |
|
T17 |
58 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
22 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T23 |
35 |
|
T102 |
43 |
|
T17 |
56 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T23 |
21 |
|
T102 |
18 |
|
T17 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1582 |
1 |
|
|
T23 |
36 |
|
T102 |
51 |
|
T17 |
58 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T23 |
22 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T23 |
34 |
|
T102 |
42 |
|
T17 |
55 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T23 |
21 |
|
T102 |
18 |
|
T17 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T23 |
33 |
|
T102 |
51 |
|
T17 |
58 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T23 |
22 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T23 |
33 |
|
T102 |
42 |
|
T17 |
54 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T23 |
21 |
|
T102 |
18 |
|
T17 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T23 |
32 |
|
T102 |
51 |
|
T17 |
55 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T23 |
34 |
|
T102 |
41 |
|
T17 |
52 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T23 |
21 |
|
T102 |
18 |
|
T17 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1482 |
1 |
|
|
T23 |
32 |
|
T102 |
51 |
|
T17 |
53 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T23 |
33 |
|
T102 |
41 |
|
T17 |
52 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T23 |
21 |
|
T102 |
18 |
|
T17 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T23 |
32 |
|
T102 |
50 |
|
T17 |
51 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1418 |
1 |
|
|
T23 |
32 |
|
T102 |
36 |
|
T17 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T23 |
21 |
|
T102 |
18 |
|
T17 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1423 |
1 |
|
|
T23 |
32 |
|
T102 |
50 |
|
T17 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T23 |
31 |
|
T102 |
35 |
|
T17 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T23 |
21 |
|
T102 |
18 |
|
T17 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T23 |
32 |
|
T102 |
49 |
|
T17 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1345 |
1 |
|
|
T23 |
30 |
|
T102 |
35 |
|
T17 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T23 |
32 |
|
T102 |
49 |
|
T17 |
50 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1312 |
1 |
|
|
T23 |
30 |
|
T102 |
35 |
|
T17 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T23 |
31 |
|
T102 |
48 |
|
T17 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1281 |
1 |
|
|
T23 |
29 |
|
T102 |
33 |
|
T17 |
48 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1272 |
1 |
|
|
T23 |
31 |
|
T102 |
48 |
|
T17 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T23 |
28 |
|
T102 |
33 |
|
T17 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T23 |
29 |
|
T102 |
48 |
|
T17 |
47 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T23 |
28 |
|
T102 |
30 |
|
T17 |
45 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
18 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1200 |
1 |
|
|
T23 |
28 |
|
T102 |
48 |
|
T17 |
46 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53717 |
1 |
|
|
T23 |
1340 |
|
T102 |
1394 |
|
T17 |
1461 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46840 |
1 |
|
|
T23 |
1337 |
|
T102 |
1582 |
|
T17 |
1353 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56959 |
1 |
|
|
T23 |
1352 |
|
T102 |
1493 |
|
T17 |
2621 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49393 |
1 |
|
|
T23 |
1819 |
|
T102 |
940 |
|
T17 |
1157 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T23 |
22 |
|
T102 |
34 |
|
T17 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1715 |
1 |
|
|
T23 |
54 |
|
T102 |
45 |
|
T17 |
55 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T23 |
23 |
|
T102 |
30 |
|
T17 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1727 |
1 |
|
|
T23 |
53 |
|
T102 |
49 |
|
T17 |
60 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
756 |
1 |
|
|
T23 |
22 |
|
T102 |
34 |
|
T17 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1684 |
1 |
|
|
T23 |
52 |
|
T102 |
44 |
|
T17 |
54 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T23 |
23 |
|
T102 |
30 |
|
T17 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T23 |
53 |
|
T102 |
48 |
|
T17 |
59 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T23 |
22 |
|
T102 |
34 |
|
T17 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T23 |
51 |
|
T102 |
44 |
|
T17 |
53 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T23 |
23 |
|
T102 |
30 |
|
T17 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T23 |
51 |
|
T102 |
47 |
|
T17 |
55 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
754 |
1 |
|
|
T23 |
22 |
|
T102 |
34 |
|
T17 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T23 |
50 |
|
T102 |
43 |
|
T17 |
51 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
747 |
1 |
|
|
T23 |
23 |
|
T102 |
30 |
|
T17 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T23 |
49 |
|
T102 |
46 |
|
T17 |
55 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T23 |
22 |
|
T102 |
34 |
|
T17 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T23 |
49 |
|
T102 |
42 |
|
T17 |
51 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
23 |
|
T102 |
30 |
|
T17 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T23 |
48 |
|
T102 |
45 |
|
T17 |
53 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
753 |
1 |
|
|
T23 |
22 |
|
T102 |
34 |
|
T17 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T23 |
48 |
|
T102 |
40 |
|
T17 |
49 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
746 |
1 |
|
|
T23 |
23 |
|
T102 |
30 |
|
T17 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T23 |
47 |
|
T102 |
43 |
|
T17 |
50 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T23 |
22 |
|
T102 |
34 |
|
T17 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T23 |
48 |
|
T102 |
40 |
|
T17 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T23 |
23 |
|
T102 |
30 |
|
T17 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T23 |
47 |
|
T102 |
42 |
|
T17 |
50 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T23 |
22 |
|
T102 |
34 |
|
T17 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T23 |
47 |
|
T102 |
39 |
|
T17 |
47 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
744 |
1 |
|
|
T23 |
23 |
|
T102 |
30 |
|
T17 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T23 |
44 |
|
T102 |
42 |
|
T17 |
48 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T23 |
22 |
|
T102 |
34 |
|
T17 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T23 |
46 |
|
T102 |
37 |
|
T17 |
47 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
23 |
|
T102 |
30 |
|
T17 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T23 |
44 |
|
T102 |
40 |
|
T17 |
47 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T23 |
22 |
|
T102 |
34 |
|
T17 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T23 |
45 |
|
T102 |
36 |
|
T17 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
23 |
|
T102 |
30 |
|
T17 |
20 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T23 |
43 |
|
T102 |
39 |
|
T17 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T23 |
21 |
|
T102 |
34 |
|
T17 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T23 |
44 |
|
T102 |
36 |
|
T17 |
46 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
23 |
|
T102 |
29 |
|
T17 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T23 |
43 |
|
T102 |
38 |
|
T17 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
747 |
1 |
|
|
T23 |
21 |
|
T102 |
34 |
|
T17 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T23 |
44 |
|
T102 |
35 |
|
T17 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
23 |
|
T102 |
29 |
|
T17 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T23 |
43 |
|
T102 |
37 |
|
T17 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
21 |
|
T102 |
34 |
|
T17 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T23 |
42 |
|
T102 |
34 |
|
T17 |
45 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
23 |
|
T102 |
29 |
|
T17 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T23 |
42 |
|
T102 |
37 |
|
T17 |
44 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
21 |
|
T102 |
34 |
|
T17 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T23 |
42 |
|
T102 |
33 |
|
T17 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
23 |
|
T102 |
29 |
|
T17 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T23 |
40 |
|
T102 |
36 |
|
T17 |
42 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
745 |
1 |
|
|
T23 |
21 |
|
T102 |
34 |
|
T17 |
24 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T23 |
42 |
|
T102 |
32 |
|
T17 |
40 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
23 |
|
T102 |
29 |
|
T17 |
19 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T23 |
39 |
|
T102 |
36 |
|
T17 |
42 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56963 |
1 |
|
|
T23 |
2041 |
|
T102 |
1510 |
|
T17 |
1096 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46410 |
1 |
|
|
T23 |
1157 |
|
T102 |
1079 |
|
T17 |
1113 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52200 |
1 |
|
|
T23 |
1572 |
|
T102 |
1970 |
|
T17 |
1481 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52490 |
1 |
|
|
T23 |
1035 |
|
T102 |
959 |
|
T17 |
2733 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1699 |
1 |
|
|
T23 |
58 |
|
T102 |
51 |
|
T17 |
65 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
25 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1706 |
1 |
|
|
T23 |
53 |
|
T102 |
49 |
|
T17 |
71 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T23 |
56 |
|
T102 |
51 |
|
T17 |
61 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
25 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T23 |
52 |
|
T102 |
49 |
|
T17 |
71 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T23 |
56 |
|
T102 |
51 |
|
T17 |
61 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T23 |
25 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T23 |
51 |
|
T102 |
47 |
|
T17 |
68 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T23 |
54 |
|
T102 |
50 |
|
T17 |
60 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T23 |
25 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T23 |
49 |
|
T102 |
47 |
|
T17 |
65 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T23 |
53 |
|
T102 |
50 |
|
T17 |
58 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
25 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1575 |
1 |
|
|
T23 |
48 |
|
T102 |
46 |
|
T17 |
65 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T23 |
53 |
|
T102 |
47 |
|
T17 |
55 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
25 |
|
T102 |
25 |
|
T17 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T23 |
46 |
|
T102 |
46 |
|
T17 |
65 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1484 |
1 |
|
|
T23 |
52 |
|
T102 |
47 |
|
T17 |
51 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
25 |
|
T102 |
24 |
|
T17 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1508 |
1 |
|
|
T23 |
45 |
|
T102 |
46 |
|
T17 |
64 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T23 |
51 |
|
T102 |
46 |
|
T17 |
50 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
25 |
|
T102 |
24 |
|
T17 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T23 |
41 |
|
T102 |
46 |
|
T17 |
64 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T23 |
49 |
|
T102 |
46 |
|
T17 |
49 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T23 |
25 |
|
T102 |
24 |
|
T17 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T23 |
41 |
|
T102 |
45 |
|
T17 |
62 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T23 |
49 |
|
T102 |
43 |
|
T17 |
47 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T23 |
25 |
|
T102 |
24 |
|
T17 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T23 |
41 |
|
T102 |
43 |
|
T17 |
62 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T23 |
20 |
|
T102 |
22 |
|
T17 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T23 |
49 |
|
T102 |
43 |
|
T17 |
46 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T23 |
25 |
|
T102 |
24 |
|
T17 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T23 |
40 |
|
T102 |
42 |
|
T17 |
62 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T23 |
20 |
|
T102 |
22 |
|
T17 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T23 |
48 |
|
T102 |
41 |
|
T17 |
45 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T23 |
25 |
|
T102 |
24 |
|
T17 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T23 |
39 |
|
T102 |
42 |
|
T17 |
61 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T23 |
20 |
|
T102 |
22 |
|
T17 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T23 |
46 |
|
T102 |
41 |
|
T17 |
43 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
25 |
|
T102 |
24 |
|
T17 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T23 |
38 |
|
T102 |
42 |
|
T17 |
60 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T23 |
20 |
|
T102 |
22 |
|
T17 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1266 |
1 |
|
|
T23 |
45 |
|
T102 |
40 |
|
T17 |
41 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
25 |
|
T102 |
24 |
|
T17 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T23 |
36 |
|
T102 |
41 |
|
T17 |
60 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T23 |
20 |
|
T102 |
22 |
|
T17 |
21 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T23 |
45 |
|
T102 |
38 |
|
T17 |
38 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T23 |
25 |
|
T102 |
24 |
|
T17 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T23 |
34 |
|
T102 |
39 |
|
T17 |
57 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58868 |
1 |
|
|
T23 |
1779 |
|
T102 |
943 |
|
T17 |
1668 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43626 |
1 |
|
|
T23 |
915 |
|
T102 |
2066 |
|
T17 |
1313 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56210 |
1 |
|
|
T23 |
2415 |
|
T102 |
1303 |
|
T17 |
1576 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49224 |
1 |
|
|
T23 |
909 |
|
T102 |
1203 |
|
T17 |
2062 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T23 |
26 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T23 |
43 |
|
T102 |
57 |
|
T17 |
55 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T23 |
43 |
|
T102 |
54 |
|
T17 |
50 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
752 |
1 |
|
|
T23 |
26 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T23 |
43 |
|
T102 |
54 |
|
T17 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
743 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1650 |
1 |
|
|
T23 |
43 |
|
T102 |
53 |
|
T17 |
50 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T23 |
26 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T23 |
39 |
|
T102 |
52 |
|
T17 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T23 |
41 |
|
T102 |
51 |
|
T17 |
48 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
751 |
1 |
|
|
T23 |
26 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T23 |
38 |
|
T102 |
52 |
|
T17 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1593 |
1 |
|
|
T23 |
40 |
|
T102 |
48 |
|
T17 |
48 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T23 |
26 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1524 |
1 |
|
|
T23 |
37 |
|
T102 |
50 |
|
T17 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T23 |
40 |
|
T102 |
47 |
|
T17 |
48 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
748 |
1 |
|
|
T23 |
26 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T23 |
37 |
|
T102 |
50 |
|
T17 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T23 |
39 |
|
T102 |
47 |
|
T17 |
47 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T23 |
26 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T23 |
37 |
|
T102 |
50 |
|
T17 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T23 |
39 |
|
T102 |
46 |
|
T17 |
45 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
744 |
1 |
|
|
T23 |
26 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T23 |
36 |
|
T102 |
50 |
|
T17 |
54 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T23 |
39 |
|
T102 |
45 |
|
T17 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T23 |
26 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T23 |
34 |
|
T102 |
47 |
|
T17 |
53 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T23 |
38 |
|
T102 |
44 |
|
T17 |
44 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T23 |
26 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T23 |
34 |
|
T102 |
46 |
|
T17 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T23 |
38 |
|
T102 |
43 |
|
T17 |
40 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1343 |
1 |
|
|
T23 |
34 |
|
T102 |
45 |
|
T17 |
52 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T23 |
37 |
|
T102 |
43 |
|
T17 |
39 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T23 |
31 |
|
T102 |
44 |
|
T17 |
51 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T23 |
37 |
|
T102 |
43 |
|
T17 |
37 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T23 |
31 |
|
T102 |
43 |
|
T17 |
50 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T23 |
36 |
|
T102 |
42 |
|
T17 |
33 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1253 |
1 |
|
|
T23 |
31 |
|
T102 |
43 |
|
T17 |
50 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T23 |
35 |
|
T102 |
40 |
|
T17 |
33 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1219 |
1 |
|
|
T23 |
31 |
|
T102 |
41 |
|
T17 |
50 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
25 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1214 |
1 |
|
|
T23 |
34 |
|
T102 |
39 |
|
T17 |
29 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52931 |
1 |
|
|
T23 |
2051 |
|
T102 |
1648 |
|
T17 |
2786 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48783 |
1 |
|
|
T23 |
1064 |
|
T102 |
1102 |
|
T17 |
1076 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58956 |
1 |
|
|
T23 |
1726 |
|
T102 |
1993 |
|
T17 |
1608 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48264 |
1 |
|
|
T23 |
1196 |
|
T102 |
883 |
|
T17 |
1182 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1660 |
1 |
|
|
T23 |
48 |
|
T102 |
46 |
|
T17 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T23 |
22 |
|
T102 |
25 |
|
T17 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T23 |
46 |
|
T102 |
47 |
|
T17 |
52 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T23 |
47 |
|
T102 |
46 |
|
T17 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
739 |
1 |
|
|
T23 |
22 |
|
T102 |
25 |
|
T17 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1623 |
1 |
|
|
T23 |
45 |
|
T102 |
47 |
|
T17 |
51 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T23 |
47 |
|
T102 |
42 |
|
T17 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
22 |
|
T102 |
25 |
|
T17 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T23 |
45 |
|
T102 |
46 |
|
T17 |
50 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1562 |
1 |
|
|
T23 |
45 |
|
T102 |
42 |
|
T17 |
49 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
738 |
1 |
|
|
T23 |
22 |
|
T102 |
25 |
|
T17 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T23 |
44 |
|
T102 |
44 |
|
T17 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T23 |
45 |
|
T102 |
42 |
|
T17 |
47 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
22 |
|
T102 |
25 |
|
T17 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T23 |
44 |
|
T102 |
43 |
|
T17 |
45 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T23 |
44 |
|
T102 |
41 |
|
T17 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
22 |
|
T102 |
25 |
|
T17 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T23 |
44 |
|
T102 |
41 |
|
T17 |
43 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T23 |
20 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T23 |
43 |
|
T102 |
41 |
|
T17 |
46 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T23 |
22 |
|
T102 |
24 |
|
T17 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T23 |
44 |
|
T102 |
42 |
|
T17 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T23 |
20 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T23 |
39 |
|
T102 |
41 |
|
T17 |
44 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
733 |
1 |
|
|
T23 |
22 |
|
T102 |
24 |
|
T17 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T23 |
43 |
|
T102 |
40 |
|
T17 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T23 |
20 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T23 |
37 |
|
T102 |
41 |
|
T17 |
42 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T23 |
22 |
|
T102 |
24 |
|
T17 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T23 |
41 |
|
T102 |
37 |
|
T17 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T23 |
20 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T23 |
37 |
|
T102 |
40 |
|
T17 |
41 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T23 |
22 |
|
T102 |
24 |
|
T17 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T23 |
41 |
|
T102 |
37 |
|
T17 |
39 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
20 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T23 |
35 |
|
T102 |
40 |
|
T17 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
22 |
|
T102 |
24 |
|
T17 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T23 |
40 |
|
T102 |
35 |
|
T17 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
20 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T23 |
35 |
|
T102 |
40 |
|
T17 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
22 |
|
T102 |
24 |
|
T17 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T23 |
40 |
|
T102 |
34 |
|
T17 |
34 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T23 |
20 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1302 |
1 |
|
|
T23 |
35 |
|
T102 |
39 |
|
T17 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T23 |
22 |
|
T102 |
24 |
|
T17 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T23 |
40 |
|
T102 |
34 |
|
T17 |
32 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T23 |
20 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T23 |
33 |
|
T102 |
37 |
|
T17 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T23 |
22 |
|
T102 |
24 |
|
T17 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T23 |
39 |
|
T102 |
31 |
|
T17 |
30 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T23 |
20 |
|
T102 |
25 |
|
T17 |
27 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T23 |
32 |
|
T102 |
37 |
|
T17 |
40 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T23 |
22 |
|
T102 |
24 |
|
T17 |
25 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1152 |
1 |
|
|
T23 |
37 |
|
T102 |
29 |
|
T17 |
30 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60947 |
1 |
|
|
T23 |
1500 |
|
T102 |
1346 |
|
T17 |
3102 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46628 |
1 |
|
|
T23 |
977 |
|
T102 |
893 |
|
T17 |
1153 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54564 |
1 |
|
|
T23 |
1202 |
|
T102 |
2297 |
|
T17 |
1646 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46695 |
1 |
|
|
T23 |
2216 |
|
T102 |
1191 |
|
T17 |
992 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T23 |
53 |
|
T102 |
45 |
|
T17 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1713 |
1 |
|
|
T23 |
55 |
|
T102 |
46 |
|
T17 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
725 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T23 |
52 |
|
T102 |
45 |
|
T17 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
673 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T23 |
55 |
|
T102 |
46 |
|
T17 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T23 |
51 |
|
T102 |
44 |
|
T17 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1647 |
1 |
|
|
T23 |
55 |
|
T102 |
44 |
|
T17 |
41 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1587 |
1 |
|
|
T23 |
49 |
|
T102 |
43 |
|
T17 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1615 |
1 |
|
|
T23 |
54 |
|
T102 |
42 |
|
T17 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1556 |
1 |
|
|
T23 |
47 |
|
T102 |
43 |
|
T17 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T23 |
52 |
|
T102 |
40 |
|
T17 |
39 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T23 |
46 |
|
T102 |
41 |
|
T17 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1550 |
1 |
|
|
T23 |
51 |
|
T102 |
40 |
|
T17 |
38 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T23 |
44 |
|
T102 |
39 |
|
T17 |
37 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T23 |
51 |
|
T102 |
40 |
|
T17 |
37 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T23 |
42 |
|
T102 |
39 |
|
T17 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T23 |
51 |
|
T102 |
39 |
|
T17 |
36 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T23 |
42 |
|
T102 |
37 |
|
T17 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T23 |
49 |
|
T102 |
39 |
|
T17 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T23 |
21 |
|
T102 |
22 |
|
T17 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1386 |
1 |
|
|
T23 |
40 |
|
T102 |
37 |
|
T17 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
660 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T23 |
49 |
|
T102 |
38 |
|
T17 |
34 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T23 |
20 |
|
T102 |
22 |
|
T17 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T23 |
40 |
|
T102 |
35 |
|
T17 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1397 |
1 |
|
|
T23 |
49 |
|
T102 |
38 |
|
T17 |
33 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T23 |
20 |
|
T102 |
22 |
|
T17 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T23 |
39 |
|
T102 |
35 |
|
T17 |
35 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T23 |
48 |
|
T102 |
38 |
|
T17 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
20 |
|
T102 |
22 |
|
T17 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1275 |
1 |
|
|
T23 |
39 |
|
T102 |
35 |
|
T17 |
34 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T23 |
47 |
|
T102 |
37 |
|
T17 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
20 |
|
T102 |
22 |
|
T17 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T23 |
39 |
|
T102 |
34 |
|
T17 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T23 |
47 |
|
T102 |
36 |
|
T17 |
32 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
20 |
|
T102 |
22 |
|
T17 |
26 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T23 |
37 |
|
T102 |
34 |
|
T17 |
29 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T23 |
45 |
|
T102 |
33 |
|
T17 |
32 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58586 |
1 |
|
|
T23 |
1304 |
|
T102 |
1454 |
|
T17 |
1877 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48245 |
1 |
|
|
T23 |
1326 |
|
T102 |
1736 |
|
T17 |
1407 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56600 |
1 |
|
|
T23 |
1823 |
|
T102 |
1225 |
|
T17 |
2445 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44781 |
1 |
|
|
T23 |
1258 |
|
T102 |
1209 |
|
T17 |
993 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
20 |
|
T102 |
20 |
|
T17 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T23 |
62 |
|
T102 |
52 |
|
T17 |
56 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
20 |
|
T102 |
19 |
|
T17 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1667 |
1 |
|
|
T23 |
62 |
|
T102 |
53 |
|
T17 |
54 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
20 |
|
T102 |
20 |
|
T17 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1631 |
1 |
|
|
T23 |
62 |
|
T102 |
51 |
|
T17 |
55 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
20 |
|
T102 |
19 |
|
T17 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T23 |
60 |
|
T102 |
52 |
|
T17 |
53 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T23 |
20 |
|
T102 |
20 |
|
T17 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T23 |
61 |
|
T102 |
50 |
|
T17 |
54 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T23 |
20 |
|
T102 |
19 |
|
T17 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T23 |
58 |
|
T102 |
52 |
|
T17 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
738 |
1 |
|
|
T23 |
20 |
|
T102 |
20 |
|
T17 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1574 |
1 |
|
|
T23 |
59 |
|
T102 |
48 |
|
T17 |
53 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T23 |
20 |
|
T102 |
19 |
|
T17 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T23 |
57 |
|
T102 |
50 |
|
T17 |
48 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
20 |
|
T102 |
20 |
|
T17 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T23 |
57 |
|
T102 |
46 |
|
T17 |
51 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T23 |
20 |
|
T102 |
19 |
|
T17 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T23 |
56 |
|
T102 |
49 |
|
T17 |
47 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
737 |
1 |
|
|
T23 |
20 |
|
T102 |
20 |
|
T17 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T23 |
56 |
|
T102 |
44 |
|
T17 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T23 |
20 |
|
T102 |
19 |
|
T17 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1513 |
1 |
|
|
T23 |
55 |
|
T102 |
49 |
|
T17 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
20 |
|
T102 |
20 |
|
T17 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T23 |
53 |
|
T102 |
44 |
|
T17 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
20 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T23 |
55 |
|
T102 |
49 |
|
T17 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
20 |
|
T102 |
20 |
|
T17 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T23 |
53 |
|
T102 |
44 |
|
T17 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
20 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T23 |
55 |
|
T102 |
48 |
|
T17 |
42 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T23 |
20 |
|
T102 |
20 |
|
T17 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T23 |
53 |
|
T102 |
43 |
|
T17 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
20 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T23 |
53 |
|
T102 |
47 |
|
T17 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T23 |
20 |
|
T102 |
20 |
|
T17 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T23 |
52 |
|
T102 |
40 |
|
T17 |
50 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
20 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T23 |
50 |
|
T102 |
46 |
|
T17 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
20 |
|
T102 |
20 |
|
T17 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T23 |
51 |
|
T102 |
39 |
|
T17 |
48 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T23 |
20 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T23 |
50 |
|
T102 |
46 |
|
T17 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
20 |
|
T102 |
20 |
|
T17 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T23 |
48 |
|
T102 |
39 |
|
T17 |
45 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T23 |
20 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1341 |
1 |
|
|
T23 |
48 |
|
T102 |
45 |
|
T17 |
40 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
20 |
|
T102 |
20 |
|
T17 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T23 |
47 |
|
T102 |
38 |
|
T17 |
44 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
20 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T23 |
45 |
|
T102 |
45 |
|
T17 |
39 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
20 |
|
T102 |
20 |
|
T17 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T23 |
47 |
|
T102 |
36 |
|
T17 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
20 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T23 |
44 |
|
T102 |
45 |
|
T17 |
38 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
20 |
|
T102 |
20 |
|
T17 |
18 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T23 |
44 |
|
T102 |
36 |
|
T17 |
43 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
20 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T23 |
44 |
|
T102 |
43 |
|
T17 |
36 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59395 |
1 |
|
|
T23 |
1980 |
|
T102 |
2399 |
|
T17 |
1471 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48943 |
1 |
|
|
T23 |
1552 |
|
T102 |
955 |
|
T17 |
1121 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54063 |
1 |
|
|
T23 |
1714 |
|
T102 |
1411 |
|
T17 |
2231 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45755 |
1 |
|
|
T23 |
891 |
|
T102 |
827 |
|
T17 |
2034 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1674 |
1 |
|
|
T23 |
39 |
|
T102 |
51 |
|
T17 |
41 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T23 |
28 |
|
T102 |
23 |
|
T17 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1684 |
1 |
|
|
T23 |
36 |
|
T102 |
51 |
|
T17 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1647 |
1 |
|
|
T23 |
39 |
|
T102 |
50 |
|
T17 |
40 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T23 |
28 |
|
T102 |
23 |
|
T17 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1662 |
1 |
|
|
T23 |
35 |
|
T102 |
51 |
|
T17 |
44 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T23 |
38 |
|
T102 |
49 |
|
T17 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T23 |
28 |
|
T102 |
23 |
|
T17 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T23 |
33 |
|
T102 |
51 |
|
T17 |
42 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T23 |
38 |
|
T102 |
48 |
|
T17 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T23 |
28 |
|
T102 |
23 |
|
T17 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T23 |
33 |
|
T102 |
48 |
|
T17 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T23 |
38 |
|
T102 |
48 |
|
T17 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T23 |
28 |
|
T102 |
23 |
|
T17 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T23 |
32 |
|
T102 |
47 |
|
T17 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
26 |
|
T102 |
23 |
|
T17 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T23 |
37 |
|
T102 |
47 |
|
T17 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T23 |
28 |
|
T102 |
23 |
|
T17 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1549 |
1 |
|
|
T23 |
31 |
|
T102 |
45 |
|
T17 |
39 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
25 |
|
T102 |
23 |
|
T17 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T23 |
37 |
|
T102 |
47 |
|
T17 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
28 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T23 |
31 |
|
T102 |
44 |
|
T17 |
38 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
25 |
|
T102 |
23 |
|
T17 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T23 |
36 |
|
T102 |
45 |
|
T17 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
28 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T23 |
29 |
|
T102 |
39 |
|
T17 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
25 |
|
T102 |
23 |
|
T17 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T23 |
34 |
|
T102 |
45 |
|
T17 |
35 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T23 |
28 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1444 |
1 |
|
|
T23 |
28 |
|
T102 |
37 |
|
T17 |
37 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
25 |
|
T102 |
23 |
|
T17 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T23 |
33 |
|
T102 |
43 |
|
T17 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T23 |
28 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T23 |
27 |
|
T102 |
37 |
|
T17 |
36 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T23 |
25 |
|
T102 |
23 |
|
T17 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T23 |
32 |
|
T102 |
43 |
|
T17 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T23 |
28 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T23 |
26 |
|
T102 |
36 |
|
T17 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T23 |
25 |
|
T102 |
23 |
|
T17 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T23 |
32 |
|
T102 |
42 |
|
T17 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T23 |
28 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T23 |
26 |
|
T102 |
36 |
|
T17 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T23 |
25 |
|
T102 |
23 |
|
T17 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T23 |
32 |
|
T102 |
39 |
|
T17 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T23 |
28 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T23 |
26 |
|
T102 |
35 |
|
T17 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T23 |
25 |
|
T102 |
23 |
|
T17 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T23 |
31 |
|
T102 |
38 |
|
T17 |
34 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T23 |
28 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T23 |
26 |
|
T102 |
33 |
|
T17 |
33 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T23 |
25 |
|
T102 |
23 |
|
T17 |
26 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T23 |
30 |
|
T102 |
38 |
|
T17 |
32 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T23 |
28 |
|
T102 |
22 |
|
T17 |
23 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T23 |
25 |
|
T102 |
33 |
|
T17 |
33 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58479 |
1 |
|
|
T23 |
1472 |
|
T102 |
2093 |
|
T17 |
1356 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49278 |
1 |
|
|
T23 |
1845 |
|
T102 |
1049 |
|
T17 |
1491 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53206 |
1 |
|
|
T23 |
1458 |
|
T102 |
1687 |
|
T17 |
3007 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47266 |
1 |
|
|
T23 |
953 |
|
T102 |
741 |
|
T17 |
956 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
26 |
|
T102 |
20 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1698 |
1 |
|
|
T23 |
56 |
|
T102 |
54 |
|
T17 |
50 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T23 |
25 |
|
T102 |
26 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T23 |
56 |
|
T102 |
48 |
|
T17 |
51 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
26 |
|
T102 |
20 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1667 |
1 |
|
|
T23 |
54 |
|
T102 |
53 |
|
T17 |
50 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T23 |
25 |
|
T102 |
26 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1661 |
1 |
|
|
T23 |
56 |
|
T102 |
48 |
|
T17 |
50 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T23 |
26 |
|
T102 |
20 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T23 |
53 |
|
T102 |
52 |
|
T17 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
25 |
|
T102 |
26 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1629 |
1 |
|
|
T23 |
52 |
|
T102 |
48 |
|
T17 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T23 |
26 |
|
T102 |
20 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1609 |
1 |
|
|
T23 |
53 |
|
T102 |
50 |
|
T17 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
25 |
|
T102 |
26 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T23 |
52 |
|
T102 |
45 |
|
T17 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T23 |
26 |
|
T102 |
20 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T23 |
53 |
|
T102 |
50 |
|
T17 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
25 |
|
T102 |
26 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T23 |
51 |
|
T102 |
44 |
|
T17 |
48 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T23 |
26 |
|
T102 |
20 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T23 |
53 |
|
T102 |
48 |
|
T17 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
25 |
|
T102 |
26 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1525 |
1 |
|
|
T23 |
49 |
|
T102 |
44 |
|
T17 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1528 |
1 |
|
|
T23 |
54 |
|
T102 |
47 |
|
T17 |
49 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T23 |
25 |
|
T102 |
25 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1496 |
1 |
|
|
T23 |
47 |
|
T102 |
45 |
|
T17 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T23 |
52 |
|
T102 |
47 |
|
T17 |
47 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T23 |
25 |
|
T102 |
25 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T23 |
46 |
|
T102 |
42 |
|
T17 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T23 |
50 |
|
T102 |
47 |
|
T17 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
25 |
|
T102 |
25 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T23 |
44 |
|
T102 |
39 |
|
T17 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1406 |
1 |
|
|
T23 |
50 |
|
T102 |
46 |
|
T17 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
25 |
|
T102 |
25 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1417 |
1 |
|
|
T23 |
42 |
|
T102 |
38 |
|
T17 |
44 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T23 |
47 |
|
T102 |
46 |
|
T17 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
25 |
|
T102 |
25 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1372 |
1 |
|
|
T23 |
40 |
|
T102 |
33 |
|
T17 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T23 |
47 |
|
T102 |
46 |
|
T17 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
25 |
|
T102 |
25 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T23 |
38 |
|
T102 |
33 |
|
T17 |
41 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T23 |
45 |
|
T102 |
46 |
|
T17 |
46 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
25 |
|
T102 |
25 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1304 |
1 |
|
|
T23 |
35 |
|
T102 |
32 |
|
T17 |
40 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T23 |
42 |
|
T102 |
45 |
|
T17 |
43 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
25 |
|
T102 |
25 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T23 |
34 |
|
T102 |
30 |
|
T17 |
39 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T23 |
25 |
|
T102 |
20 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T23 |
41 |
|
T102 |
44 |
|
T17 |
42 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
25 |
|
T102 |
25 |
|
T17 |
17 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T23 |
32 |
|
T102 |
28 |
|
T17 |
39 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59553 |
1 |
|
|
T23 |
1453 |
|
T102 |
869 |
|
T17 |
1737 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50391 |
1 |
|
|
T23 |
1802 |
|
T102 |
2075 |
|
T17 |
1085 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56798 |
1 |
|
|
T23 |
1599 |
|
T102 |
913 |
|
T17 |
1798 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42665 |
1 |
|
|
T23 |
1005 |
|
T102 |
1370 |
|
T17 |
2116 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
22 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1663 |
1 |
|
|
T23 |
54 |
|
T102 |
70 |
|
T17 |
48 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
23 |
|
T102 |
17 |
|
T17 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T23 |
52 |
|
T102 |
70 |
|
T17 |
46 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
22 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1619 |
1 |
|
|
T23 |
53 |
|
T102 |
69 |
|
T17 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
23 |
|
T102 |
17 |
|
T17 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1625 |
1 |
|
|
T23 |
51 |
|
T102 |
68 |
|
T17 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T23 |
22 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T23 |
53 |
|
T102 |
69 |
|
T17 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
23 |
|
T102 |
17 |
|
T17 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1595 |
1 |
|
|
T23 |
48 |
|
T102 |
67 |
|
T17 |
44 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T23 |
22 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T23 |
53 |
|
T102 |
67 |
|
T17 |
40 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
23 |
|
T102 |
17 |
|
T17 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T23 |
46 |
|
T102 |
65 |
|
T17 |
42 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T23 |
22 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T23 |
53 |
|
T102 |
66 |
|
T17 |
39 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T23 |
23 |
|
T102 |
17 |
|
T17 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T23 |
46 |
|
T102 |
65 |
|
T17 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T23 |
22 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T23 |
52 |
|
T102 |
65 |
|
T17 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T23 |
23 |
|
T102 |
17 |
|
T17 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T23 |
46 |
|
T102 |
64 |
|
T17 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
22 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1454 |
1 |
|
|
T23 |
49 |
|
T102 |
65 |
|
T17 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T23 |
23 |
|
T102 |
16 |
|
T17 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T23 |
46 |
|
T102 |
63 |
|
T17 |
36 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
22 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T23 |
47 |
|
T102 |
65 |
|
T17 |
38 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T23 |
23 |
|
T102 |
16 |
|
T17 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1431 |
1 |
|
|
T23 |
46 |
|
T102 |
60 |
|
T17 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
22 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T23 |
46 |
|
T102 |
64 |
|
T17 |
37 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T23 |
23 |
|
T102 |
16 |
|
T17 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T23 |
45 |
|
T102 |
58 |
|
T17 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
22 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1365 |
1 |
|
|
T23 |
46 |
|
T102 |
63 |
|
T17 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T23 |
23 |
|
T102 |
16 |
|
T17 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T23 |
42 |
|
T102 |
58 |
|
T17 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T23 |
44 |
|
T102 |
60 |
|
T17 |
35 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T23 |
23 |
|
T102 |
16 |
|
T17 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T23 |
41 |
|
T102 |
56 |
|
T17 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T23 |
43 |
|
T102 |
55 |
|
T17 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T23 |
23 |
|
T102 |
16 |
|
T17 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T23 |
41 |
|
T102 |
55 |
|
T17 |
34 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1247 |
1 |
|
|
T23 |
42 |
|
T102 |
54 |
|
T17 |
32 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T23 |
23 |
|
T102 |
16 |
|
T17 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T23 |
40 |
|
T102 |
53 |
|
T17 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T23 |
41 |
|
T102 |
53 |
|
T17 |
31 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T23 |
23 |
|
T102 |
16 |
|
T17 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T23 |
36 |
|
T102 |
52 |
|
T17 |
33 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T23 |
41 |
|
T102 |
52 |
|
T17 |
29 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T23 |
23 |
|
T102 |
16 |
|
T17 |
30 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1225 |
1 |
|
|
T23 |
36 |
|
T102 |
50 |
|
T17 |
31 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58519 |
1 |
|
|
T23 |
1287 |
|
T102 |
1321 |
|
T17 |
2410 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50710 |
1 |
|
|
T23 |
1111 |
|
T102 |
1682 |
|
T17 |
1764 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53733 |
1 |
|
|
T23 |
1265 |
|
T102 |
1635 |
|
T17 |
1000 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45822 |
1 |
|
|
T23 |
2079 |
|
T102 |
872 |
|
T17 |
1279 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
22 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T23 |
59 |
|
T102 |
53 |
|
T17 |
66 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T23 |
16 |
|
T102 |
24 |
|
T17 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1685 |
1 |
|
|
T23 |
65 |
|
T102 |
53 |
|
T17 |
62 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
22 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1659 |
1 |
|
|
T23 |
58 |
|
T102 |
53 |
|
T17 |
64 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T23 |
16 |
|
T102 |
24 |
|
T17 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T23 |
63 |
|
T102 |
50 |
|
T17 |
59 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T23 |
22 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1621 |
1 |
|
|
T23 |
55 |
|
T102 |
51 |
|
T17 |
64 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T23 |
16 |
|
T102 |
24 |
|
T17 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T23 |
63 |
|
T102 |
50 |
|
T17 |
59 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T23 |
22 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1596 |
1 |
|
|
T23 |
55 |
|
T102 |
51 |
|
T17 |
64 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T23 |
16 |
|
T102 |
24 |
|
T17 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T23 |
63 |
|
T102 |
47 |
|
T17 |
59 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
22 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T23 |
53 |
|
T102 |
51 |
|
T17 |
62 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T23 |
16 |
|
T102 |
24 |
|
T17 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T23 |
61 |
|
T102 |
45 |
|
T17 |
59 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
22 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T23 |
52 |
|
T102 |
48 |
|
T17 |
61 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T23 |
16 |
|
T102 |
24 |
|
T17 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T23 |
59 |
|
T102 |
43 |
|
T17 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T23 |
53 |
|
T102 |
47 |
|
T17 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T23 |
16 |
|
T102 |
24 |
|
T17 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T23 |
58 |
|
T102 |
42 |
|
T17 |
56 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T23 |
51 |
|
T102 |
46 |
|
T17 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T23 |
16 |
|
T102 |
24 |
|
T17 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1468 |
1 |
|
|
T23 |
57 |
|
T102 |
42 |
|
T17 |
56 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T23 |
49 |
|
T102 |
46 |
|
T17 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T23 |
16 |
|
T102 |
24 |
|
T17 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T23 |
55 |
|
T102 |
42 |
|
T17 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T23 |
49 |
|
T102 |
45 |
|
T17 |
58 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T23 |
16 |
|
T102 |
24 |
|
T17 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T23 |
55 |
|
T102 |
40 |
|
T17 |
53 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1364 |
1 |
|
|
T23 |
46 |
|
T102 |
44 |
|
T17 |
57 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T23 |
16 |
|
T102 |
24 |
|
T17 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T23 |
53 |
|
T102 |
40 |
|
T17 |
52 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T23 |
46 |
|
T102 |
42 |
|
T17 |
56 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T23 |
16 |
|
T102 |
24 |
|
T17 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T23 |
52 |
|
T102 |
39 |
|
T17 |
46 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T23 |
44 |
|
T102 |
41 |
|
T17 |
55 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T23 |
16 |
|
T102 |
24 |
|
T17 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T23 |
50 |
|
T102 |
38 |
|
T17 |
42 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T23 |
43 |
|
T102 |
39 |
|
T17 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T23 |
16 |
|
T102 |
24 |
|
T17 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T23 |
48 |
|
T102 |
37 |
|
T17 |
40 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T23 |
43 |
|
T102 |
37 |
|
T17 |
54 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T23 |
16 |
|
T102 |
24 |
|
T17 |
21 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1237 |
1 |
|
|
T23 |
47 |
|
T102 |
37 |
|
T17 |
38 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54016 |
1 |
|
|
T23 |
2138 |
|
T102 |
1689 |
|
T17 |
1427 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46115 |
1 |
|
|
T23 |
1143 |
|
T102 |
721 |
|
T17 |
1254 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63903 |
1 |
|
|
T23 |
1300 |
|
T102 |
2431 |
|
T17 |
2447 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44629 |
1 |
|
|
T23 |
1139 |
|
T102 |
971 |
|
T17 |
1341 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T23 |
25 |
|
T102 |
23 |
|
T17 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1668 |
1 |
|
|
T23 |
57 |
|
T102 |
40 |
|
T17 |
62 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
19 |
|
T102 |
25 |
|
T17 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1692 |
1 |
|
|
T23 |
62 |
|
T102 |
39 |
|
T17 |
67 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T23 |
25 |
|
T102 |
23 |
|
T17 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T23 |
57 |
|
T102 |
39 |
|
T17 |
60 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
19 |
|
T102 |
25 |
|
T17 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1661 |
1 |
|
|
T23 |
61 |
|
T102 |
38 |
|
T17 |
67 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T23 |
25 |
|
T102 |
23 |
|
T17 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1614 |
1 |
|
|
T23 |
57 |
|
T102 |
38 |
|
T17 |
57 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T23 |
19 |
|
T102 |
25 |
|
T17 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T23 |
61 |
|
T102 |
37 |
|
T17 |
66 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
741 |
1 |
|
|
T23 |
25 |
|
T102 |
23 |
|
T17 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1582 |
1 |
|
|
T23 |
56 |
|
T102 |
35 |
|
T17 |
54 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T23 |
19 |
|
T102 |
25 |
|
T17 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T23 |
60 |
|
T102 |
37 |
|
T17 |
66 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
25 |
|
T102 |
23 |
|
T17 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1545 |
1 |
|
|
T23 |
55 |
|
T102 |
35 |
|
T17 |
54 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T23 |
19 |
|
T102 |
25 |
|
T17 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T23 |
58 |
|
T102 |
37 |
|
T17 |
66 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
25 |
|
T102 |
23 |
|
T17 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1515 |
1 |
|
|
T23 |
54 |
|
T102 |
35 |
|
T17 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T23 |
19 |
|
T102 |
25 |
|
T17 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T23 |
56 |
|
T102 |
37 |
|
T17 |
64 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
24 |
|
T102 |
23 |
|
T17 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T23 |
53 |
|
T102 |
35 |
|
T17 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T23 |
53 |
|
T102 |
38 |
|
T17 |
62 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
24 |
|
T102 |
23 |
|
T17 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T23 |
53 |
|
T102 |
35 |
|
T17 |
49 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T23 |
49 |
|
T102 |
38 |
|
T17 |
61 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
24 |
|
T102 |
23 |
|
T17 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T23 |
52 |
|
T102 |
35 |
|
T17 |
46 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T23 |
49 |
|
T102 |
37 |
|
T17 |
61 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
24 |
|
T102 |
23 |
|
T17 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T23 |
51 |
|
T102 |
33 |
|
T17 |
45 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
18 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T23 |
47 |
|
T102 |
35 |
|
T17 |
60 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
24 |
|
T102 |
23 |
|
T17 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T23 |
48 |
|
T102 |
33 |
|
T17 |
43 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T23 |
44 |
|
T102 |
34 |
|
T17 |
58 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
24 |
|
T102 |
23 |
|
T17 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T23 |
45 |
|
T102 |
32 |
|
T17 |
41 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T23 |
44 |
|
T102 |
34 |
|
T17 |
55 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
24 |
|
T102 |
23 |
|
T17 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T23 |
42 |
|
T102 |
30 |
|
T17 |
40 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T23 |
44 |
|
T102 |
33 |
|
T17 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
24 |
|
T102 |
23 |
|
T17 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1256 |
1 |
|
|
T23 |
42 |
|
T102 |
28 |
|
T17 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T23 |
44 |
|
T102 |
32 |
|
T17 |
52 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
24 |
|
T102 |
23 |
|
T17 |
22 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T23 |
41 |
|
T102 |
26 |
|
T17 |
39 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
19 |
|
T102 |
24 |
|
T17 |
17 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T23 |
42 |
|
T102 |
31 |
|
T17 |
51 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58422 |
1 |
|
|
T23 |
2593 |
|
T102 |
1749 |
|
T17 |
1104 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46380 |
1 |
|
|
T23 |
936 |
|
T102 |
1242 |
|
T17 |
2465 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58082 |
1 |
|
|
T23 |
1581 |
|
T102 |
1251 |
|
T17 |
1701 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44675 |
1 |
|
|
T23 |
841 |
|
T102 |
1058 |
|
T17 |
1241 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T23 |
30 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1689 |
1 |
|
|
T23 |
40 |
|
T102 |
67 |
|
T17 |
63 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T23 |
25 |
|
T102 |
22 |
|
T17 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T23 |
44 |
|
T102 |
65 |
|
T17 |
62 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T23 |
30 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1656 |
1 |
|
|
T23 |
39 |
|
T102 |
64 |
|
T17 |
60 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T23 |
25 |
|
T102 |
22 |
|
T17 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1632 |
1 |
|
|
T23 |
44 |
|
T102 |
62 |
|
T17 |
60 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T23 |
30 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1620 |
1 |
|
|
T23 |
39 |
|
T102 |
62 |
|
T17 |
60 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T23 |
25 |
|
T102 |
22 |
|
T17 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T23 |
43 |
|
T102 |
62 |
|
T17 |
60 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
750 |
1 |
|
|
T23 |
30 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1577 |
1 |
|
|
T23 |
39 |
|
T102 |
61 |
|
T17 |
59 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
764 |
1 |
|
|
T23 |
25 |
|
T102 |
22 |
|
T17 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T23 |
41 |
|
T102 |
61 |
|
T17 |
59 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T23 |
30 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T23 |
39 |
|
T102 |
59 |
|
T17 |
58 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T23 |
25 |
|
T102 |
22 |
|
T17 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1554 |
1 |
|
|
T23 |
41 |
|
T102 |
60 |
|
T17 |
58 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
749 |
1 |
|
|
T23 |
30 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1508 |
1 |
|
|
T23 |
39 |
|
T102 |
59 |
|
T17 |
57 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
761 |
1 |
|
|
T23 |
25 |
|
T102 |
22 |
|
T17 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T23 |
38 |
|
T102 |
58 |
|
T17 |
56 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T23 |
30 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T23 |
38 |
|
T102 |
58 |
|
T17 |
55 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T23 |
25 |
|
T102 |
22 |
|
T17 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T23 |
38 |
|
T102 |
57 |
|
T17 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
742 |
1 |
|
|
T23 |
30 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T23 |
38 |
|
T102 |
56 |
|
T17 |
54 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
760 |
1 |
|
|
T23 |
25 |
|
T102 |
22 |
|
T17 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1453 |
1 |
|
|
T23 |
38 |
|
T102 |
52 |
|
T17 |
53 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T23 |
30 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T23 |
38 |
|
T102 |
54 |
|
T17 |
52 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T23 |
25 |
|
T102 |
22 |
|
T17 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T23 |
38 |
|
T102 |
51 |
|
T17 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T23 |
30 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1392 |
1 |
|
|
T23 |
38 |
|
T102 |
53 |
|
T17 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
755 |
1 |
|
|
T23 |
25 |
|
T102 |
22 |
|
T17 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1400 |
1 |
|
|
T23 |
37 |
|
T102 |
51 |
|
T17 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T23 |
30 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1355 |
1 |
|
|
T23 |
38 |
|
T102 |
52 |
|
T17 |
51 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T23 |
25 |
|
T102 |
21 |
|
T17 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1366 |
1 |
|
|
T23 |
35 |
|
T102 |
49 |
|
T17 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T23 |
30 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1318 |
1 |
|
|
T23 |
38 |
|
T102 |
50 |
|
T17 |
50 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T23 |
25 |
|
T102 |
21 |
|
T17 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1333 |
1 |
|
|
T23 |
34 |
|
T102 |
46 |
|
T17 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
30 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T23 |
36 |
|
T102 |
49 |
|
T17 |
49 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T23 |
25 |
|
T102 |
21 |
|
T17 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T23 |
34 |
|
T102 |
45 |
|
T17 |
46 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
30 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T23 |
33 |
|
T102 |
47 |
|
T17 |
48 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T23 |
25 |
|
T102 |
21 |
|
T17 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T23 |
32 |
|
T102 |
45 |
|
T17 |
45 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T23 |
30 |
|
T102 |
20 |
|
T17 |
19 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T23 |
33 |
|
T102 |
45 |
|
T17 |
47 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
750 |
1 |
|
|
T23 |
25 |
|
T102 |
21 |
|
T17 |
20 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T23 |
30 |
|
T102 |
44 |
|
T17 |
45 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54527 |
1 |
|
|
T23 |
2224 |
|
T102 |
1052 |
|
T17 |
1894 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49964 |
1 |
|
|
T23 |
987 |
|
T102 |
1322 |
|
T17 |
2317 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57962 |
1 |
|
|
T23 |
1419 |
|
T102 |
1213 |
|
T17 |
1582 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46187 |
1 |
|
|
T23 |
1380 |
|
T102 |
1932 |
|
T17 |
894 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
22 |
|
T102 |
15 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1675 |
1 |
|
|
T23 |
47 |
|
T102 |
63 |
|
T17 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T23 |
16 |
|
T102 |
18 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1674 |
1 |
|
|
T23 |
52 |
|
T102 |
61 |
|
T17 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
22 |
|
T102 |
15 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1646 |
1 |
|
|
T23 |
47 |
|
T102 |
62 |
|
T17 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T23 |
16 |
|
T102 |
18 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1637 |
1 |
|
|
T23 |
52 |
|
T102 |
58 |
|
T17 |
46 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
22 |
|
T102 |
15 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1606 |
1 |
|
|
T23 |
47 |
|
T102 |
60 |
|
T17 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
16 |
|
T102 |
18 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T23 |
52 |
|
T102 |
56 |
|
T17 |
45 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
22 |
|
T102 |
15 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1584 |
1 |
|
|
T23 |
47 |
|
T102 |
59 |
|
T17 |
41 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
16 |
|
T102 |
18 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T23 |
52 |
|
T102 |
55 |
|
T17 |
43 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
22 |
|
T102 |
15 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T23 |
45 |
|
T102 |
57 |
|
T17 |
41 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
16 |
|
T102 |
18 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T23 |
51 |
|
T102 |
53 |
|
T17 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
22 |
|
T102 |
15 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1533 |
1 |
|
|
T23 |
44 |
|
T102 |
56 |
|
T17 |
41 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
16 |
|
T102 |
18 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T23 |
51 |
|
T102 |
51 |
|
T17 |
42 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T23 |
42 |
|
T102 |
56 |
|
T17 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
16 |
|
T102 |
17 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1471 |
1 |
|
|
T23 |
51 |
|
T102 |
52 |
|
T17 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1476 |
1 |
|
|
T23 |
40 |
|
T102 |
55 |
|
T17 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
16 |
|
T102 |
17 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T23 |
51 |
|
T102 |
49 |
|
T17 |
40 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T23 |
38 |
|
T102 |
54 |
|
T17 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T23 |
16 |
|
T102 |
17 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T23 |
50 |
|
T102 |
49 |
|
T17 |
39 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T23 |
37 |
|
T102 |
52 |
|
T17 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T23 |
16 |
|
T102 |
17 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T23 |
48 |
|
T102 |
47 |
|
T17 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T23 |
36 |
|
T102 |
51 |
|
T17 |
37 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
16 |
|
T102 |
17 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T23 |
48 |
|
T102 |
46 |
|
T17 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T23 |
33 |
|
T102 |
51 |
|
T17 |
35 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
16 |
|
T102 |
17 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1309 |
1 |
|
|
T23 |
47 |
|
T102 |
43 |
|
T17 |
38 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T23 |
32 |
|
T102 |
50 |
|
T17 |
33 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
16 |
|
T102 |
17 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1270 |
1 |
|
|
T23 |
46 |
|
T102 |
42 |
|
T17 |
35 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T23 |
32 |
|
T102 |
48 |
|
T17 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
16 |
|
T102 |
17 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T23 |
46 |
|
T102 |
41 |
|
T17 |
35 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T23 |
21 |
|
T102 |
15 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T23 |
28 |
|
T102 |
47 |
|
T17 |
32 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
16 |
|
T102 |
17 |
|
T17 |
28 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T23 |
45 |
|
T102 |
40 |
|
T17 |
35 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56512 |
1 |
|
|
T23 |
1446 |
|
T102 |
1438 |
|
T17 |
2617 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48697 |
1 |
|
|
T23 |
1065 |
|
T102 |
1589 |
|
T17 |
1322 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54418 |
1 |
|
|
T23 |
1407 |
|
T102 |
1160 |
|
T17 |
1786 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48563 |
1 |
|
|
T23 |
1937 |
|
T102 |
1383 |
|
T17 |
917 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T23 |
26 |
|
T102 |
16 |
|
T17 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1709 |
1 |
|
|
T23 |
50 |
|
T102 |
60 |
|
T17 |
58 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
21 |
|
T102 |
18 |
|
T17 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1686 |
1 |
|
|
T23 |
55 |
|
T102 |
58 |
|
T17 |
55 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T23 |
26 |
|
T102 |
16 |
|
T17 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1678 |
1 |
|
|
T23 |
49 |
|
T102 |
56 |
|
T17 |
58 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
21 |
|
T102 |
18 |
|
T17 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1658 |
1 |
|
|
T23 |
55 |
|
T102 |
58 |
|
T17 |
53 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
26 |
|
T102 |
16 |
|
T17 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T23 |
49 |
|
T102 |
54 |
|
T17 |
56 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
21 |
|
T102 |
18 |
|
T17 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1634 |
1 |
|
|
T23 |
54 |
|
T102 |
58 |
|
T17 |
52 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
26 |
|
T102 |
16 |
|
T17 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T23 |
48 |
|
T102 |
50 |
|
T17 |
54 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
21 |
|
T102 |
18 |
|
T17 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T23 |
52 |
|
T102 |
57 |
|
T17 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T23 |
26 |
|
T102 |
16 |
|
T17 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T23 |
48 |
|
T102 |
49 |
|
T17 |
54 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
21 |
|
T102 |
18 |
|
T17 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T23 |
52 |
|
T102 |
56 |
|
T17 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T23 |
26 |
|
T102 |
16 |
|
T17 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T23 |
47 |
|
T102 |
47 |
|
T17 |
54 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
21 |
|
T102 |
18 |
|
T17 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1536 |
1 |
|
|
T23 |
51 |
|
T102 |
56 |
|
T17 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
25 |
|
T102 |
16 |
|
T17 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T23 |
47 |
|
T102 |
46 |
|
T17 |
53 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T23 |
47 |
|
T102 |
55 |
|
T17 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
25 |
|
T102 |
16 |
|
T17 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T23 |
46 |
|
T102 |
46 |
|
T17 |
51 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T23 |
44 |
|
T102 |
55 |
|
T17 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T23 |
25 |
|
T102 |
16 |
|
T17 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1420 |
1 |
|
|
T23 |
44 |
|
T102 |
42 |
|
T17 |
49 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T23 |
44 |
|
T102 |
55 |
|
T17 |
42 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T23 |
25 |
|
T102 |
16 |
|
T17 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T23 |
42 |
|
T102 |
40 |
|
T17 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
23 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T23 |
43 |
|
T102 |
54 |
|
T17 |
41 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T23 |
25 |
|
T102 |
16 |
|
T17 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T23 |
39 |
|
T102 |
40 |
|
T17 |
48 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T23 |
42 |
|
T102 |
52 |
|
T17 |
39 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T23 |
25 |
|
T102 |
16 |
|
T17 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T23 |
39 |
|
T102 |
40 |
|
T17 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T23 |
40 |
|
T102 |
51 |
|
T17 |
35 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T23 |
25 |
|
T102 |
16 |
|
T17 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T23 |
38 |
|
T102 |
39 |
|
T17 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1298 |
1 |
|
|
T23 |
40 |
|
T102 |
50 |
|
T17 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T23 |
25 |
|
T102 |
16 |
|
T17 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1279 |
1 |
|
|
T23 |
38 |
|
T102 |
38 |
|
T17 |
47 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T23 |
39 |
|
T102 |
50 |
|
T17 |
34 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T23 |
25 |
|
T102 |
16 |
|
T17 |
20 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T23 |
38 |
|
T102 |
37 |
|
T17 |
45 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T23 |
21 |
|
T102 |
17 |
|
T17 |
22 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T23 |
37 |
|
T102 |
49 |
|
T17 |
33 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56906 |
1 |
|
|
T23 |
2177 |
|
T102 |
1096 |
|
T17 |
1900 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46843 |
1 |
|
|
T23 |
1113 |
|
T102 |
1297 |
|
T17 |
871 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61996 |
1 |
|
|
T23 |
1569 |
|
T102 |
967 |
|
T17 |
2891 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44229 |
1 |
|
|
T23 |
897 |
|
T102 |
1924 |
|
T17 |
1093 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T23 |
25 |
|
T102 |
15 |
|
T17 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T23 |
54 |
|
T102 |
69 |
|
T17 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
27 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1619 |
1 |
|
|
T23 |
51 |
|
T102 |
68 |
|
T17 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T23 |
25 |
|
T102 |
15 |
|
T17 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T23 |
53 |
|
T102 |
66 |
|
T17 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
27 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T23 |
50 |
|
T102 |
67 |
|
T17 |
44 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
25 |
|
T102 |
15 |
|
T17 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1565 |
1 |
|
|
T23 |
53 |
|
T102 |
66 |
|
T17 |
46 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
27 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T23 |
49 |
|
T102 |
66 |
|
T17 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
25 |
|
T102 |
15 |
|
T17 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T23 |
53 |
|
T102 |
66 |
|
T17 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
734 |
1 |
|
|
T23 |
27 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1526 |
1 |
|
|
T23 |
46 |
|
T102 |
66 |
|
T17 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
25 |
|
T102 |
15 |
|
T17 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T23 |
51 |
|
T102 |
65 |
|
T17 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T23 |
27 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T23 |
45 |
|
T102 |
66 |
|
T17 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
25 |
|
T102 |
15 |
|
T17 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T23 |
49 |
|
T102 |
63 |
|
T17 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T23 |
27 |
|
T102 |
17 |
|
T17 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T23 |
44 |
|
T102 |
66 |
|
T17 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T23 |
25 |
|
T102 |
15 |
|
T17 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1441 |
1 |
|
|
T23 |
49 |
|
T102 |
63 |
|
T17 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T23 |
27 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1437 |
1 |
|
|
T23 |
43 |
|
T102 |
65 |
|
T17 |
43 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T23 |
25 |
|
T102 |
15 |
|
T17 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T23 |
47 |
|
T102 |
61 |
|
T17 |
40 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T23 |
27 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1406 |
1 |
|
|
T23 |
43 |
|
T102 |
63 |
|
T17 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T23 |
25 |
|
T102 |
15 |
|
T17 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1384 |
1 |
|
|
T23 |
47 |
|
T102 |
60 |
|
T17 |
40 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
27 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1375 |
1 |
|
|
T23 |
43 |
|
T102 |
62 |
|
T17 |
42 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T23 |
25 |
|
T102 |
15 |
|
T17 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T23 |
47 |
|
T102 |
58 |
|
T17 |
34 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
27 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T23 |
42 |
|
T102 |
57 |
|
T17 |
41 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T23 |
24 |
|
T102 |
15 |
|
T17 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T23 |
46 |
|
T102 |
57 |
|
T17 |
31 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T23 |
27 |
|
T102 |
16 |
|
T17 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1302 |
1 |
|
|
T23 |
41 |
|
T102 |
55 |
|
T17 |
40 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T23 |
24 |
|
T102 |
15 |
|
T17 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T23 |
45 |
|
T102 |
56 |
|
T17 |
31 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T23 |
27 |
|
T102 |
16 |
|
T17 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1271 |
1 |
|
|
T23 |
41 |
|
T102 |
53 |
|
T17 |
40 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T23 |
24 |
|
T102 |
15 |
|
T17 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T23 |
45 |
|
T102 |
55 |
|
T17 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
27 |
|
T102 |
16 |
|
T17 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T23 |
37 |
|
T102 |
53 |
|
T17 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T23 |
24 |
|
T102 |
15 |
|
T17 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T23 |
45 |
|
T102 |
52 |
|
T17 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
27 |
|
T102 |
16 |
|
T17 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T23 |
37 |
|
T102 |
50 |
|
T17 |
38 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T23 |
24 |
|
T102 |
15 |
|
T17 |
24 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T23 |
45 |
|
T102 |
50 |
|
T17 |
29 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
27 |
|
T102 |
16 |
|
T17 |
26 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1161 |
1 |
|
|
T23 |
36 |
|
T102 |
50 |
|
T17 |
37 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53618 |
1 |
|
|
T23 |
1346 |
|
T102 |
1830 |
|
T17 |
1536 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44667 |
1 |
|
|
T23 |
1418 |
|
T102 |
847 |
|
T17 |
1317 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
63628 |
1 |
|
|
T23 |
1979 |
|
T102 |
2019 |
|
T17 |
2673 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47600 |
1 |
|
|
T23 |
1001 |
|
T102 |
967 |
|
T17 |
1121 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
26 |
|
T102 |
28 |
|
T17 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1637 |
1 |
|
|
T23 |
54 |
|
T102 |
40 |
|
T17 |
55 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
21 |
|
T102 |
26 |
|
T17 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T23 |
59 |
|
T102 |
43 |
|
T17 |
54 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
26 |
|
T102 |
28 |
|
T17 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1615 |
1 |
|
|
T23 |
54 |
|
T102 |
39 |
|
T17 |
55 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
730 |
1 |
|
|
T23 |
21 |
|
T102 |
26 |
|
T17 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T23 |
58 |
|
T102 |
43 |
|
T17 |
54 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
26 |
|
T102 |
28 |
|
T17 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T23 |
53 |
|
T102 |
38 |
|
T17 |
53 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
21 |
|
T102 |
26 |
|
T17 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T23 |
58 |
|
T102 |
42 |
|
T17 |
52 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
26 |
|
T102 |
28 |
|
T17 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T23 |
51 |
|
T102 |
38 |
|
T17 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
21 |
|
T102 |
26 |
|
T17 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1529 |
1 |
|
|
T23 |
58 |
|
T102 |
41 |
|
T17 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
26 |
|
T102 |
28 |
|
T17 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T23 |
51 |
|
T102 |
38 |
|
T17 |
50 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
21 |
|
T102 |
26 |
|
T17 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T23 |
57 |
|
T102 |
41 |
|
T17 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
26 |
|
T102 |
28 |
|
T17 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1495 |
1 |
|
|
T23 |
50 |
|
T102 |
38 |
|
T17 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
21 |
|
T102 |
26 |
|
T17 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T23 |
56 |
|
T102 |
41 |
|
T17 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T23 |
26 |
|
T102 |
28 |
|
T17 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T23 |
50 |
|
T102 |
38 |
|
T17 |
48 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T23 |
50 |
|
T102 |
40 |
|
T17 |
49 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T23 |
26 |
|
T102 |
28 |
|
T17 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T23 |
49 |
|
T102 |
36 |
|
T17 |
46 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T23 |
46 |
|
T102 |
38 |
|
T17 |
47 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
26 |
|
T102 |
28 |
|
T17 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T23 |
49 |
|
T102 |
35 |
|
T17 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T23 |
44 |
|
T102 |
37 |
|
T17 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
26 |
|
T102 |
28 |
|
T17 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T23 |
48 |
|
T102 |
35 |
|
T17 |
44 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
23 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T23 |
43 |
|
T102 |
35 |
|
T17 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
26 |
|
T102 |
28 |
|
T17 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T23 |
47 |
|
T102 |
35 |
|
T17 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T23 |
40 |
|
T102 |
34 |
|
T17 |
45 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
26 |
|
T102 |
28 |
|
T17 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1301 |
1 |
|
|
T23 |
46 |
|
T102 |
35 |
|
T17 |
41 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T23 |
39 |
|
T102 |
34 |
|
T17 |
43 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T23 |
26 |
|
T102 |
28 |
|
T17 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1267 |
1 |
|
|
T23 |
46 |
|
T102 |
35 |
|
T17 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1239 |
1 |
|
|
T23 |
38 |
|
T102 |
32 |
|
T17 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T23 |
26 |
|
T102 |
28 |
|
T17 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T23 |
46 |
|
T102 |
33 |
|
T17 |
40 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T23 |
37 |
|
T102 |
30 |
|
T17 |
42 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T23 |
26 |
|
T102 |
28 |
|
T17 |
21 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T23 |
46 |
|
T102 |
31 |
|
T17 |
39 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
22 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1191 |
1 |
|
|
T23 |
36 |
|
T102 |
30 |
|
T17 |
41 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56539 |
1 |
|
|
T23 |
1250 |
|
T102 |
1587 |
|
T17 |
1332 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47070 |
1 |
|
|
T23 |
1206 |
|
T102 |
1544 |
|
T17 |
1217 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53415 |
1 |
|
|
T23 |
2290 |
|
T102 |
1316 |
|
T17 |
1406 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
52118 |
1 |
|
|
T23 |
1159 |
|
T102 |
1070 |
|
T17 |
2520 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
24 |
|
T102 |
23 |
|
T17 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T23 |
49 |
|
T102 |
52 |
|
T17 |
60 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T23 |
23 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1670 |
1 |
|
|
T23 |
50 |
|
T102 |
55 |
|
T17 |
60 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
726 |
1 |
|
|
T23 |
24 |
|
T102 |
23 |
|
T17 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T23 |
48 |
|
T102 |
51 |
|
T17 |
58 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
710 |
1 |
|
|
T23 |
23 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1643 |
1 |
|
|
T23 |
50 |
|
T102 |
55 |
|
T17 |
58 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
24 |
|
T102 |
23 |
|
T17 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T23 |
45 |
|
T102 |
50 |
|
T17 |
57 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
23 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T23 |
50 |
|
T102 |
53 |
|
T17 |
57 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
24 |
|
T102 |
23 |
|
T17 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T23 |
45 |
|
T102 |
49 |
|
T17 |
57 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
23 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T23 |
50 |
|
T102 |
53 |
|
T17 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
24 |
|
T102 |
23 |
|
T17 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T23 |
44 |
|
T102 |
49 |
|
T17 |
57 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T23 |
23 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T23 |
49 |
|
T102 |
53 |
|
T17 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
24 |
|
T102 |
23 |
|
T17 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T23 |
44 |
|
T102 |
46 |
|
T17 |
56 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T23 |
23 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T23 |
49 |
|
T102 |
51 |
|
T17 |
52 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
23 |
|
T102 |
23 |
|
T17 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1465 |
1 |
|
|
T23 |
43 |
|
T102 |
46 |
|
T17 |
55 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1479 |
1 |
|
|
T23 |
49 |
|
T102 |
51 |
|
T17 |
52 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
23 |
|
T102 |
23 |
|
T17 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T23 |
42 |
|
T102 |
44 |
|
T17 |
53 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T23 |
48 |
|
T102 |
51 |
|
T17 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T23 |
23 |
|
T102 |
23 |
|
T17 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1399 |
1 |
|
|
T23 |
41 |
|
T102 |
43 |
|
T17 |
52 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1418 |
1 |
|
|
T23 |
46 |
|
T102 |
48 |
|
T17 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T23 |
23 |
|
T102 |
23 |
|
T17 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T23 |
38 |
|
T102 |
43 |
|
T17 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T23 |
45 |
|
T102 |
48 |
|
T17 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
23 |
|
T102 |
23 |
|
T17 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T23 |
36 |
|
T102 |
41 |
|
T17 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1355 |
1 |
|
|
T23 |
43 |
|
T102 |
48 |
|
T17 |
51 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
23 |
|
T102 |
23 |
|
T17 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T23 |
36 |
|
T102 |
41 |
|
T17 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T23 |
41 |
|
T102 |
47 |
|
T17 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T23 |
23 |
|
T102 |
23 |
|
T17 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T23 |
35 |
|
T102 |
40 |
|
T17 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1289 |
1 |
|
|
T23 |
41 |
|
T102 |
46 |
|
T17 |
50 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T23 |
23 |
|
T102 |
23 |
|
T17 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1255 |
1 |
|
|
T23 |
35 |
|
T102 |
39 |
|
T17 |
49 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1255 |
1 |
|
|
T23 |
41 |
|
T102 |
44 |
|
T17 |
46 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T23 |
23 |
|
T102 |
23 |
|
T17 |
21 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T23 |
33 |
|
T102 |
37 |
|
T17 |
48 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
22 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T23 |
41 |
|
T102 |
42 |
|
T17 |
43 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54424 |
1 |
|
|
T23 |
1593 |
|
T102 |
1434 |
|
T17 |
1648 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44804 |
1 |
|
|
T23 |
1117 |
|
T102 |
938 |
|
T17 |
1015 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54118 |
1 |
|
|
T23 |
1563 |
|
T102 |
2290 |
|
T17 |
1369 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
54759 |
1 |
|
|
T23 |
1762 |
|
T102 |
1112 |
|
T17 |
2512 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
23 |
|
T102 |
28 |
|
T17 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1680 |
1 |
|
|
T23 |
44 |
|
T102 |
36 |
|
T17 |
54 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T23 |
23 |
|
T102 |
25 |
|
T17 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1706 |
1 |
|
|
T23 |
44 |
|
T102 |
40 |
|
T17 |
54 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
23 |
|
T102 |
28 |
|
T17 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1652 |
1 |
|
|
T23 |
43 |
|
T102 |
36 |
|
T17 |
54 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T23 |
23 |
|
T102 |
25 |
|
T17 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T23 |
43 |
|
T102 |
40 |
|
T17 |
53 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T23 |
23 |
|
T102 |
28 |
|
T17 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1623 |
1 |
|
|
T23 |
43 |
|
T102 |
35 |
|
T17 |
53 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
23 |
|
T102 |
25 |
|
T17 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T23 |
43 |
|
T102 |
39 |
|
T17 |
52 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T23 |
23 |
|
T102 |
28 |
|
T17 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T23 |
42 |
|
T102 |
35 |
|
T17 |
52 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
23 |
|
T102 |
25 |
|
T17 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1606 |
1 |
|
|
T23 |
43 |
|
T102 |
39 |
|
T17 |
51 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
23 |
|
T102 |
28 |
|
T17 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T23 |
41 |
|
T102 |
35 |
|
T17 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
23 |
|
T102 |
25 |
|
T17 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T23 |
42 |
|
T102 |
38 |
|
T17 |
51 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
23 |
|
T102 |
28 |
|
T17 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T23 |
40 |
|
T102 |
34 |
|
T17 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
23 |
|
T102 |
25 |
|
T17 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T23 |
41 |
|
T102 |
37 |
|
T17 |
51 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T23 |
22 |
|
T102 |
28 |
|
T17 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1483 |
1 |
|
|
T23 |
41 |
|
T102 |
34 |
|
T17 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T23 |
23 |
|
T102 |
25 |
|
T17 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T23 |
41 |
|
T102 |
36 |
|
T17 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T23 |
22 |
|
T102 |
28 |
|
T17 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1444 |
1 |
|
|
T23 |
41 |
|
T102 |
29 |
|
T17 |
46 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T23 |
23 |
|
T102 |
25 |
|
T17 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T23 |
40 |
|
T102 |
36 |
|
T17 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
22 |
|
T102 |
28 |
|
T17 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1412 |
1 |
|
|
T23 |
39 |
|
T102 |
29 |
|
T17 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T23 |
23 |
|
T102 |
25 |
|
T17 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T23 |
40 |
|
T102 |
36 |
|
T17 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
22 |
|
T102 |
28 |
|
T17 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T23 |
38 |
|
T102 |
27 |
|
T17 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T23 |
23 |
|
T102 |
25 |
|
T17 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T23 |
40 |
|
T102 |
35 |
|
T17 |
50 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
22 |
|
T102 |
28 |
|
T17 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T23 |
38 |
|
T102 |
27 |
|
T17 |
44 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T23 |
23 |
|
T102 |
24 |
|
T17 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T23 |
39 |
|
T102 |
35 |
|
T17 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
22 |
|
T102 |
28 |
|
T17 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1308 |
1 |
|
|
T23 |
36 |
|
T102 |
26 |
|
T17 |
43 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T23 |
23 |
|
T102 |
24 |
|
T17 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1362 |
1 |
|
|
T23 |
38 |
|
T102 |
34 |
|
T17 |
49 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T23 |
22 |
|
T102 |
28 |
|
T17 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T23 |
36 |
|
T102 |
26 |
|
T17 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T23 |
23 |
|
T102 |
24 |
|
T17 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1330 |
1 |
|
|
T23 |
37 |
|
T102 |
34 |
|
T17 |
48 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T23 |
22 |
|
T102 |
28 |
|
T17 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1259 |
1 |
|
|
T23 |
36 |
|
T102 |
26 |
|
T17 |
40 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T23 |
23 |
|
T102 |
24 |
|
T17 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T23 |
34 |
|
T102 |
34 |
|
T17 |
48 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T23 |
22 |
|
T102 |
28 |
|
T17 |
23 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1229 |
1 |
|
|
T23 |
35 |
|
T102 |
24 |
|
T17 |
39 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T23 |
23 |
|
T102 |
24 |
|
T17 |
24 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T23 |
34 |
|
T102 |
33 |
|
T17 |
48 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48516 |
1 |
|
|
T23 |
1399 |
|
T102 |
1237 |
|
T17 |
1233 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47461 |
1 |
|
|
T23 |
1210 |
|
T102 |
909 |
|
T17 |
1281 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
65914 |
1 |
|
|
T23 |
1610 |
|
T102 |
2064 |
|
T17 |
2787 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45134 |
1 |
|
|
T23 |
1657 |
|
T102 |
1260 |
|
T17 |
1207 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1749 |
1 |
|
|
T23 |
57 |
|
T102 |
56 |
|
T17 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1701 |
1 |
|
|
T23 |
55 |
|
T102 |
55 |
|
T17 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1722 |
1 |
|
|
T23 |
56 |
|
T102 |
52 |
|
T17 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
754 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1672 |
1 |
|
|
T23 |
53 |
|
T102 |
54 |
|
T17 |
52 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1704 |
1 |
|
|
T23 |
55 |
|
T102 |
51 |
|
T17 |
55 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1630 |
1 |
|
|
T23 |
52 |
|
T102 |
53 |
|
T17 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1677 |
1 |
|
|
T23 |
52 |
|
T102 |
51 |
|
T17 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
752 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1594 |
1 |
|
|
T23 |
50 |
|
T102 |
53 |
|
T17 |
49 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1641 |
1 |
|
|
T23 |
51 |
|
T102 |
50 |
|
T17 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T23 |
50 |
|
T102 |
52 |
|
T17 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1608 |
1 |
|
|
T23 |
51 |
|
T102 |
50 |
|
T17 |
54 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
751 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1541 |
1 |
|
|
T23 |
50 |
|
T102 |
50 |
|
T17 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1586 |
1 |
|
|
T23 |
51 |
|
T102 |
47 |
|
T17 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T23 |
48 |
|
T102 |
50 |
|
T17 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T23 |
51 |
|
T102 |
46 |
|
T17 |
53 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
748 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T23 |
45 |
|
T102 |
49 |
|
T17 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1522 |
1 |
|
|
T23 |
50 |
|
T102 |
45 |
|
T17 |
51 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T23 |
45 |
|
T102 |
47 |
|
T17 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T23 |
49 |
|
T102 |
42 |
|
T17 |
48 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
742 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
27 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1396 |
1 |
|
|
T23 |
42 |
|
T102 |
46 |
|
T17 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T23 |
49 |
|
T102 |
41 |
|
T17 |
47 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1360 |
1 |
|
|
T23 |
41 |
|
T102 |
46 |
|
T17 |
42 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T23 |
48 |
|
T102 |
40 |
|
T17 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
740 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1320 |
1 |
|
|
T23 |
39 |
|
T102 |
44 |
|
T17 |
41 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T23 |
47 |
|
T102 |
39 |
|
T17 |
46 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1281 |
1 |
|
|
T23 |
37 |
|
T102 |
43 |
|
T17 |
40 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T23 |
43 |
|
T102 |
37 |
|
T17 |
45 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T23 |
37 |
|
T102 |
43 |
|
T17 |
38 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T23 |
19 |
|
T102 |
22 |
|
T17 |
24 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T23 |
42 |
|
T102 |
37 |
|
T17 |
43 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
737 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
26 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T23 |
36 |
|
T102 |
40 |
|
T17 |
38 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57467 |
1 |
|
|
T23 |
987 |
|
T102 |
1356 |
|
T17 |
1639 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47991 |
1 |
|
|
T23 |
964 |
|
T102 |
1252 |
|
T17 |
2268 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
61099 |
1 |
|
|
T23 |
2989 |
|
T102 |
1820 |
|
T17 |
1574 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42570 |
1 |
|
|
T23 |
1067 |
|
T102 |
1259 |
|
T17 |
1108 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1650 |
1 |
|
|
T23 |
48 |
|
T102 |
52 |
|
T17 |
57 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
23 |
|
T102 |
15 |
|
T17 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1644 |
1 |
|
|
T23 |
48 |
|
T102 |
56 |
|
T17 |
51 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T23 |
47 |
|
T102 |
51 |
|
T17 |
54 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
736 |
1 |
|
|
T23 |
23 |
|
T102 |
15 |
|
T17 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1610 |
1 |
|
|
T23 |
47 |
|
T102 |
56 |
|
T17 |
51 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T23 |
43 |
|
T102 |
50 |
|
T17 |
54 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
23 |
|
T102 |
15 |
|
T17 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T23 |
47 |
|
T102 |
54 |
|
T17 |
50 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1555 |
1 |
|
|
T23 |
42 |
|
T102 |
49 |
|
T17 |
54 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
735 |
1 |
|
|
T23 |
23 |
|
T102 |
15 |
|
T17 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T23 |
46 |
|
T102 |
52 |
|
T17 |
48 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T23 |
40 |
|
T102 |
46 |
|
T17 |
53 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T23 |
23 |
|
T102 |
15 |
|
T17 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T23 |
44 |
|
T102 |
51 |
|
T17 |
47 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1486 |
1 |
|
|
T23 |
40 |
|
T102 |
46 |
|
T17 |
51 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
732 |
1 |
|
|
T23 |
23 |
|
T102 |
15 |
|
T17 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T23 |
44 |
|
T102 |
47 |
|
T17 |
44 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T23 |
39 |
|
T102 |
46 |
|
T17 |
48 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T23 |
23 |
|
T102 |
14 |
|
T17 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T23 |
44 |
|
T102 |
48 |
|
T17 |
44 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T23 |
38 |
|
T102 |
46 |
|
T17 |
48 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T23 |
23 |
|
T102 |
14 |
|
T17 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T23 |
43 |
|
T102 |
47 |
|
T17 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T23 |
38 |
|
T102 |
45 |
|
T17 |
46 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
23 |
|
T102 |
14 |
|
T17 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1377 |
1 |
|
|
T23 |
39 |
|
T102 |
47 |
|
T17 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T23 |
38 |
|
T102 |
44 |
|
T17 |
46 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
23 |
|
T102 |
14 |
|
T17 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T23 |
39 |
|
T102 |
46 |
|
T17 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
22 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T23 |
36 |
|
T102 |
43 |
|
T17 |
44 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T23 |
23 |
|
T102 |
14 |
|
T17 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1324 |
1 |
|
|
T23 |
39 |
|
T102 |
44 |
|
T17 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
22 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1313 |
1 |
|
|
T23 |
36 |
|
T102 |
42 |
|
T17 |
44 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
722 |
1 |
|
|
T23 |
23 |
|
T102 |
14 |
|
T17 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T23 |
39 |
|
T102 |
43 |
|
T17 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
22 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1277 |
1 |
|
|
T23 |
35 |
|
T102 |
41 |
|
T17 |
43 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
23 |
|
T102 |
14 |
|
T17 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T23 |
37 |
|
T102 |
43 |
|
T17 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
22 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T23 |
35 |
|
T102 |
41 |
|
T17 |
42 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
23 |
|
T102 |
14 |
|
T17 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T23 |
36 |
|
T102 |
40 |
|
T17 |
41 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T23 |
22 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T23 |
34 |
|
T102 |
40 |
|
T17 |
40 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
23 |
|
T102 |
14 |
|
T17 |
27 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1199 |
1 |
|
|
T23 |
35 |
|
T102 |
40 |
|
T17 |
40 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60483 |
1 |
|
|
T23 |
1403 |
|
T102 |
1301 |
|
T17 |
1491 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45698 |
1 |
|
|
T23 |
1456 |
|
T102 |
1709 |
|
T17 |
1035 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59888 |
1 |
|
|
T23 |
2004 |
|
T102 |
1420 |
|
T17 |
1752 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42922 |
1 |
|
|
T23 |
1084 |
|
T102 |
1173 |
|
T17 |
2303 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
17 |
|
T102 |
19 |
|
T17 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1676 |
1 |
|
|
T23 |
56 |
|
T102 |
54 |
|
T17 |
54 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
18 |
|
T102 |
22 |
|
T17 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1665 |
1 |
|
|
T23 |
55 |
|
T102 |
51 |
|
T17 |
54 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
720 |
1 |
|
|
T23 |
17 |
|
T102 |
19 |
|
T17 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T23 |
56 |
|
T102 |
53 |
|
T17 |
53 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
18 |
|
T102 |
22 |
|
T17 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T23 |
54 |
|
T102 |
51 |
|
T17 |
53 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T23 |
17 |
|
T102 |
19 |
|
T17 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T23 |
56 |
|
T102 |
51 |
|
T17 |
52 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T23 |
18 |
|
T102 |
22 |
|
T17 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1599 |
1 |
|
|
T23 |
52 |
|
T102 |
51 |
|
T17 |
50 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T23 |
17 |
|
T102 |
19 |
|
T17 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1569 |
1 |
|
|
T23 |
56 |
|
T102 |
51 |
|
T17 |
51 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
727 |
1 |
|
|
T23 |
18 |
|
T102 |
22 |
|
T17 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T23 |
51 |
|
T102 |
49 |
|
T17 |
50 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
17 |
|
T102 |
19 |
|
T17 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1532 |
1 |
|
|
T23 |
53 |
|
T102 |
51 |
|
T17 |
50 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T23 |
18 |
|
T102 |
22 |
|
T17 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T23 |
49 |
|
T102 |
47 |
|
T17 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
17 |
|
T102 |
19 |
|
T17 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T23 |
52 |
|
T102 |
49 |
|
T17 |
49 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
726 |
1 |
|
|
T23 |
18 |
|
T102 |
22 |
|
T17 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T23 |
48 |
|
T102 |
46 |
|
T17 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T23 |
16 |
|
T102 |
19 |
|
T17 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T23 |
53 |
|
T102 |
48 |
|
T17 |
48 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T23 |
18 |
|
T102 |
21 |
|
T17 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T23 |
45 |
|
T102 |
46 |
|
T17 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T23 |
16 |
|
T102 |
19 |
|
T17 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1433 |
1 |
|
|
T23 |
51 |
|
T102 |
47 |
|
T17 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T23 |
18 |
|
T102 |
21 |
|
T17 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T23 |
44 |
|
T102 |
44 |
|
T17 |
47 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
16 |
|
T102 |
19 |
|
T17 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1402 |
1 |
|
|
T23 |
50 |
|
T102 |
44 |
|
T17 |
46 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
18 |
|
T102 |
21 |
|
T17 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T23 |
43 |
|
T102 |
44 |
|
T17 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
16 |
|
T102 |
19 |
|
T17 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T23 |
49 |
|
T102 |
44 |
|
T17 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
18 |
|
T102 |
21 |
|
T17 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T23 |
43 |
|
T102 |
42 |
|
T17 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
16 |
|
T102 |
19 |
|
T17 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T23 |
48 |
|
T102 |
44 |
|
T17 |
45 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T23 |
18 |
|
T102 |
21 |
|
T17 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1346 |
1 |
|
|
T23 |
42 |
|
T102 |
42 |
|
T17 |
44 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
16 |
|
T102 |
19 |
|
T17 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1306 |
1 |
|
|
T23 |
46 |
|
T102 |
41 |
|
T17 |
43 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T23 |
18 |
|
T102 |
21 |
|
T17 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T23 |
41 |
|
T102 |
39 |
|
T17 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T23 |
16 |
|
T102 |
19 |
|
T17 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T23 |
44 |
|
T102 |
40 |
|
T17 |
42 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
18 |
|
T102 |
21 |
|
T17 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T23 |
41 |
|
T102 |
39 |
|
T17 |
40 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T23 |
16 |
|
T102 |
19 |
|
T17 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T23 |
44 |
|
T102 |
40 |
|
T17 |
39 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
18 |
|
T102 |
21 |
|
T17 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T23 |
40 |
|
T102 |
37 |
|
T17 |
38 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T23 |
16 |
|
T102 |
19 |
|
T17 |
24 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T23 |
43 |
|
T102 |
38 |
|
T17 |
37 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
18 |
|
T102 |
21 |
|
T17 |
25 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1212 |
1 |
|
|
T23 |
40 |
|
T102 |
37 |
|
T17 |
37 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59855 |
1 |
|
|
T23 |
1371 |
|
T102 |
928 |
|
T17 |
1722 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45328 |
1 |
|
|
T23 |
1961 |
|
T102 |
1384 |
|
T17 |
853 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56972 |
1 |
|
|
T23 |
1726 |
|
T102 |
1004 |
|
T17 |
2809 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
48524 |
1 |
|
|
T23 |
939 |
|
T102 |
1948 |
|
T17 |
1096 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T23 |
18 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T23 |
53 |
|
T102 |
70 |
|
T17 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T23 |
23 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1617 |
1 |
|
|
T23 |
47 |
|
T102 |
67 |
|
T17 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
718 |
1 |
|
|
T23 |
18 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T23 |
52 |
|
T102 |
70 |
|
T17 |
54 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T23 |
23 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1586 |
1 |
|
|
T23 |
45 |
|
T102 |
63 |
|
T17 |
55 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T23 |
18 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T23 |
50 |
|
T102 |
70 |
|
T17 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T23 |
23 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T23 |
45 |
|
T102 |
62 |
|
T17 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T23 |
18 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T23 |
50 |
|
T102 |
69 |
|
T17 |
51 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T23 |
23 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1514 |
1 |
|
|
T23 |
44 |
|
T102 |
60 |
|
T17 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T23 |
18 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T23 |
50 |
|
T102 |
67 |
|
T17 |
48 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T23 |
23 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1487 |
1 |
|
|
T23 |
44 |
|
T102 |
60 |
|
T17 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T23 |
18 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T23 |
48 |
|
T102 |
65 |
|
T17 |
46 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
721 |
1 |
|
|
T23 |
23 |
|
T102 |
20 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1461 |
1 |
|
|
T23 |
43 |
|
T102 |
59 |
|
T17 |
53 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T23 |
18 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T23 |
47 |
|
T102 |
64 |
|
T17 |
46 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T23 |
42 |
|
T102 |
58 |
|
T17 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T23 |
18 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T23 |
46 |
|
T102 |
61 |
|
T17 |
44 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T23 |
42 |
|
T102 |
55 |
|
T17 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T23 |
18 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T23 |
46 |
|
T102 |
60 |
|
T17 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T23 |
42 |
|
T102 |
55 |
|
T17 |
50 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T23 |
18 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T23 |
46 |
|
T102 |
58 |
|
T17 |
41 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T23 |
37 |
|
T102 |
55 |
|
T17 |
47 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
17 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1270 |
1 |
|
|
T23 |
46 |
|
T102 |
58 |
|
T17 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T23 |
37 |
|
T102 |
53 |
|
T17 |
46 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
17 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1227 |
1 |
|
|
T23 |
42 |
|
T102 |
55 |
|
T17 |
40 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
707 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T23 |
36 |
|
T102 |
51 |
|
T17 |
46 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T23 |
17 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T23 |
42 |
|
T102 |
54 |
|
T17 |
39 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1251 |
1 |
|
|
T23 |
33 |
|
T102 |
51 |
|
T17 |
46 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T23 |
17 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T23 |
41 |
|
T102 |
53 |
|
T17 |
38 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T23 |
33 |
|
T102 |
50 |
|
T17 |
43 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T23 |
17 |
|
T102 |
16 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T23 |
40 |
|
T102 |
52 |
|
T17 |
36 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
27 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T23 |
32 |
|
T102 |
49 |
|
T17 |
42 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60286 |
1 |
|
|
T23 |
2534 |
|
T102 |
2021 |
|
T17 |
2118 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44040 |
1 |
|
|
T23 |
930 |
|
T102 |
775 |
|
T17 |
1323 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56944 |
1 |
|
|
T23 |
1467 |
|
T102 |
1785 |
|
T17 |
1539 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46752 |
1 |
|
|
T23 |
951 |
|
T102 |
1294 |
|
T17 |
1417 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T23 |
29 |
|
T102 |
24 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1670 |
1 |
|
|
T23 |
45 |
|
T102 |
38 |
|
T17 |
66 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T23 |
23 |
|
T102 |
26 |
|
T17 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T23 |
50 |
|
T102 |
37 |
|
T17 |
65 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
743 |
1 |
|
|
T23 |
29 |
|
T102 |
24 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1638 |
1 |
|
|
T23 |
45 |
|
T102 |
37 |
|
T17 |
66 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
779 |
1 |
|
|
T23 |
23 |
|
T102 |
26 |
|
T17 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T23 |
50 |
|
T102 |
36 |
|
T17 |
62 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
29 |
|
T102 |
24 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1612 |
1 |
|
|
T23 |
45 |
|
T102 |
34 |
|
T17 |
64 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T23 |
23 |
|
T102 |
26 |
|
T17 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1560 |
1 |
|
|
T23 |
48 |
|
T102 |
35 |
|
T17 |
61 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
740 |
1 |
|
|
T23 |
29 |
|
T102 |
24 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T23 |
44 |
|
T102 |
33 |
|
T17 |
63 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
778 |
1 |
|
|
T23 |
23 |
|
T102 |
26 |
|
T17 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T23 |
47 |
|
T102 |
35 |
|
T17 |
60 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T23 |
29 |
|
T102 |
24 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T23 |
43 |
|
T102 |
33 |
|
T17 |
62 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T23 |
23 |
|
T102 |
26 |
|
T17 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1509 |
1 |
|
|
T23 |
46 |
|
T102 |
35 |
|
T17 |
60 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
739 |
1 |
|
|
T23 |
29 |
|
T102 |
24 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1520 |
1 |
|
|
T23 |
42 |
|
T102 |
32 |
|
T17 |
62 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
775 |
1 |
|
|
T23 |
23 |
|
T102 |
26 |
|
T17 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T23 |
43 |
|
T102 |
35 |
|
T17 |
59 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T23 |
28 |
|
T102 |
24 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T23 |
43 |
|
T102 |
30 |
|
T17 |
59 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T23 |
23 |
|
T102 |
26 |
|
T17 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T23 |
43 |
|
T102 |
35 |
|
T17 |
58 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
736 |
1 |
|
|
T23 |
28 |
|
T102 |
24 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T23 |
42 |
|
T102 |
28 |
|
T17 |
59 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
773 |
1 |
|
|
T23 |
23 |
|
T102 |
26 |
|
T17 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T23 |
42 |
|
T102 |
35 |
|
T17 |
57 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
28 |
|
T102 |
24 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T23 |
41 |
|
T102 |
27 |
|
T17 |
57 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T23 |
23 |
|
T102 |
26 |
|
T17 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1392 |
1 |
|
|
T23 |
41 |
|
T102 |
35 |
|
T17 |
56 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
735 |
1 |
|
|
T23 |
28 |
|
T102 |
24 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1389 |
1 |
|
|
T23 |
41 |
|
T102 |
26 |
|
T17 |
57 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
772 |
1 |
|
|
T23 |
23 |
|
T102 |
26 |
|
T17 |
20 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T23 |
41 |
|
T102 |
35 |
|
T17 |
56 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T23 |
28 |
|
T102 |
24 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1348 |
1 |
|
|
T23 |
40 |
|
T102 |
26 |
|
T17 |
54 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T23 |
23 |
|
T102 |
26 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T23 |
40 |
|
T102 |
34 |
|
T17 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T23 |
28 |
|
T102 |
24 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T23 |
39 |
|
T102 |
26 |
|
T17 |
52 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
770 |
1 |
|
|
T23 |
23 |
|
T102 |
26 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T23 |
38 |
|
T102 |
31 |
|
T17 |
53 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
28 |
|
T102 |
24 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T23 |
37 |
|
T102 |
24 |
|
T17 |
52 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T23 |
23 |
|
T102 |
26 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1265 |
1 |
|
|
T23 |
37 |
|
T102 |
30 |
|
T17 |
52 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
28 |
|
T102 |
24 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T23 |
35 |
|
T102 |
23 |
|
T17 |
52 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T23 |
23 |
|
T102 |
26 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T23 |
36 |
|
T102 |
29 |
|
T17 |
51 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
730 |
1 |
|
|
T23 |
28 |
|
T102 |
24 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1199 |
1 |
|
|
T23 |
35 |
|
T102 |
21 |
|
T17 |
50 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
766 |
1 |
|
|
T23 |
23 |
|
T102 |
26 |
|
T17 |
19 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1191 |
1 |
|
|
T23 |
36 |
|
T102 |
29 |
|
T17 |
50 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
59329 |
1 |
|
|
T23 |
1487 |
|
T102 |
2237 |
|
T17 |
1246 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
49141 |
1 |
|
|
T23 |
1005 |
|
T102 |
1172 |
|
T17 |
2620 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56240 |
1 |
|
|
T23 |
1667 |
|
T102 |
1153 |
|
T17 |
990 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43789 |
1 |
|
|
T23 |
1842 |
|
T102 |
995 |
|
T17 |
1427 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1695 |
1 |
|
|
T23 |
50 |
|
T102 |
51 |
|
T17 |
78 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1682 |
1 |
|
|
T23 |
50 |
|
T102 |
50 |
|
T17 |
79 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1651 |
1 |
|
|
T23 |
49 |
|
T102 |
48 |
|
T17 |
76 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1655 |
1 |
|
|
T23 |
48 |
|
T102 |
50 |
|
T17 |
78 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1626 |
1 |
|
|
T23 |
48 |
|
T102 |
47 |
|
T17 |
74 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1621 |
1 |
|
|
T23 |
47 |
|
T102 |
49 |
|
T17 |
78 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T23 |
47 |
|
T102 |
46 |
|
T17 |
72 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1583 |
1 |
|
|
T23 |
47 |
|
T102 |
47 |
|
T17 |
75 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1567 |
1 |
|
|
T23 |
47 |
|
T102 |
46 |
|
T17 |
71 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T23 |
46 |
|
T102 |
45 |
|
T17 |
73 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1538 |
1 |
|
|
T23 |
47 |
|
T102 |
46 |
|
T17 |
70 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1511 |
1 |
|
|
T23 |
45 |
|
T102 |
43 |
|
T17 |
70 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1503 |
1 |
|
|
T23 |
46 |
|
T102 |
46 |
|
T17 |
68 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T23 |
45 |
|
T102 |
42 |
|
T17 |
68 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T23 |
44 |
|
T102 |
46 |
|
T17 |
65 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T23 |
44 |
|
T102 |
40 |
|
T17 |
66 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T23 |
42 |
|
T102 |
45 |
|
T17 |
65 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1412 |
1 |
|
|
T23 |
41 |
|
T102 |
35 |
|
T17 |
66 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1414 |
1 |
|
|
T23 |
41 |
|
T102 |
45 |
|
T17 |
65 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T23 |
21 |
|
T102 |
25 |
|
T17 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T23 |
39 |
|
T102 |
35 |
|
T17 |
66 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
20 |
|
T102 |
24 |
|
T17 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1390 |
1 |
|
|
T23 |
39 |
|
T102 |
45 |
|
T17 |
64 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T23 |
38 |
|
T102 |
34 |
|
T17 |
63 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T23 |
20 |
|
T102 |
24 |
|
T17 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1363 |
1 |
|
|
T23 |
38 |
|
T102 |
45 |
|
T17 |
63 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T23 |
37 |
|
T102 |
32 |
|
T17 |
62 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T23 |
20 |
|
T102 |
24 |
|
T17 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T23 |
38 |
|
T102 |
45 |
|
T17 |
62 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T23 |
36 |
|
T102 |
31 |
|
T17 |
60 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T23 |
20 |
|
T102 |
24 |
|
T17 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T23 |
37 |
|
T102 |
45 |
|
T17 |
59 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1245 |
1 |
|
|
T23 |
35 |
|
T102 |
30 |
|
T17 |
54 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T23 |
20 |
|
T102 |
24 |
|
T17 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T23 |
36 |
|
T102 |
45 |
|
T17 |
59 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T23 |
21 |
|
T102 |
24 |
|
T17 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1210 |
1 |
|
|
T23 |
35 |
|
T102 |
28 |
|
T17 |
53 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57092 |
1 |
|
|
T23 |
2370 |
|
T102 |
1216 |
|
T17 |
1376 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48980 |
1 |
|
|
T23 |
987 |
|
T102 |
1810 |
|
T17 |
1207 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57899 |
1 |
|
|
T23 |
1295 |
|
T102 |
1292 |
|
T17 |
1445 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45481 |
1 |
|
|
T23 |
1267 |
|
T102 |
1195 |
|
T17 |
2568 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
28 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1635 |
1 |
|
|
T23 |
46 |
|
T102 |
57 |
|
T17 |
53 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1628 |
1 |
|
|
T23 |
50 |
|
T102 |
58 |
|
T17 |
55 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
729 |
1 |
|
|
T23 |
28 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T23 |
45 |
|
T102 |
55 |
|
T17 |
52 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
731 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1602 |
1 |
|
|
T23 |
50 |
|
T102 |
58 |
|
T17 |
55 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
28 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T23 |
42 |
|
T102 |
54 |
|
T17 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1577 |
1 |
|
|
T23 |
47 |
|
T102 |
57 |
|
T17 |
55 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T23 |
28 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1516 |
1 |
|
|
T23 |
41 |
|
T102 |
51 |
|
T17 |
49 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
729 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T23 |
47 |
|
T102 |
57 |
|
T17 |
55 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
28 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T23 |
41 |
|
T102 |
50 |
|
T17 |
49 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T23 |
46 |
|
T102 |
57 |
|
T17 |
55 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T23 |
28 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T23 |
40 |
|
T102 |
48 |
|
T17 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
728 |
1 |
|
|
T23 |
23 |
|
T102 |
19 |
|
T17 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T23 |
46 |
|
T102 |
57 |
|
T17 |
55 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
28 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T23 |
39 |
|
T102 |
47 |
|
T17 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T23 |
44 |
|
T102 |
56 |
|
T17 |
53 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T23 |
28 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T23 |
39 |
|
T102 |
47 |
|
T17 |
46 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
725 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T23 |
43 |
|
T102 |
53 |
|
T17 |
53 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T23 |
28 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T23 |
37 |
|
T102 |
46 |
|
T17 |
44 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T23 |
42 |
|
T102 |
50 |
|
T17 |
52 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T23 |
28 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1328 |
1 |
|
|
T23 |
36 |
|
T102 |
44 |
|
T17 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
720 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T23 |
42 |
|
T102 |
48 |
|
T17 |
52 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T23 |
27 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1296 |
1 |
|
|
T23 |
36 |
|
T102 |
43 |
|
T17 |
42 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T23 |
40 |
|
T102 |
46 |
|
T17 |
51 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T23 |
27 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1269 |
1 |
|
|
T23 |
36 |
|
T102 |
43 |
|
T17 |
41 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
718 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T23 |
40 |
|
T102 |
45 |
|
T17 |
50 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
27 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T23 |
35 |
|
T102 |
42 |
|
T17 |
40 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1278 |
1 |
|
|
T23 |
37 |
|
T102 |
45 |
|
T17 |
48 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
27 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T23 |
34 |
|
T102 |
42 |
|
T17 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
714 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1249 |
1 |
|
|
T23 |
37 |
|
T102 |
43 |
|
T17 |
47 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
711 |
1 |
|
|
T23 |
27 |
|
T102 |
20 |
|
T17 |
22 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1186 |
1 |
|
|
T23 |
34 |
|
T102 |
40 |
|
T17 |
39 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T23 |
23 |
|
T102 |
18 |
|
T17 |
21 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T23 |
37 |
|
T102 |
41 |
|
T17 |
46 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55988 |
1 |
|
|
T23 |
1596 |
|
T102 |
1678 |
|
T17 |
1851 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44649 |
1 |
|
|
T23 |
1869 |
|
T102 |
1187 |
|
T17 |
2386 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56926 |
1 |
|
|
T23 |
1372 |
|
T102 |
1419 |
|
T17 |
1622 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51077 |
1 |
|
|
T23 |
1081 |
|
T102 |
1325 |
|
T17 |
932 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T23 |
22 |
|
T102 |
13 |
|
T17 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1705 |
1 |
|
|
T23 |
54 |
|
T102 |
62 |
|
T17 |
50 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T23 |
19 |
|
T102 |
15 |
|
T17 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1714 |
1 |
|
|
T23 |
56 |
|
T102 |
60 |
|
T17 |
47 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T23 |
22 |
|
T102 |
13 |
|
T17 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1679 |
1 |
|
|
T23 |
53 |
|
T102 |
61 |
|
T17 |
50 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T23 |
19 |
|
T102 |
15 |
|
T17 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1689 |
1 |
|
|
T23 |
55 |
|
T102 |
60 |
|
T17 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T23 |
22 |
|
T102 |
13 |
|
T17 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1658 |
1 |
|
|
T23 |
53 |
|
T102 |
60 |
|
T17 |
50 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T23 |
19 |
|
T102 |
15 |
|
T17 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1657 |
1 |
|
|
T23 |
51 |
|
T102 |
58 |
|
T17 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T23 |
22 |
|
T102 |
13 |
|
T17 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T23 |
53 |
|
T102 |
57 |
|
T17 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T23 |
19 |
|
T102 |
15 |
|
T17 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1633 |
1 |
|
|
T23 |
49 |
|
T102 |
57 |
|
T17 |
44 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T23 |
22 |
|
T102 |
13 |
|
T17 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1579 |
1 |
|
|
T23 |
52 |
|
T102 |
55 |
|
T17 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T23 |
19 |
|
T102 |
15 |
|
T17 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1608 |
1 |
|
|
T23 |
49 |
|
T102 |
56 |
|
T17 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T23 |
22 |
|
T102 |
13 |
|
T17 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1536 |
1 |
|
|
T23 |
51 |
|
T102 |
55 |
|
T17 |
49 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
681 |
1 |
|
|
T23 |
19 |
|
T102 |
15 |
|
T17 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T23 |
47 |
|
T102 |
56 |
|
T17 |
41 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T23 |
21 |
|
T102 |
13 |
|
T17 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T23 |
49 |
|
T102 |
54 |
|
T17 |
48 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T23 |
19 |
|
T102 |
14 |
|
T17 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T23 |
45 |
|
T102 |
56 |
|
T17 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T23 |
21 |
|
T102 |
13 |
|
T17 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T23 |
48 |
|
T102 |
52 |
|
T17 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T23 |
19 |
|
T102 |
14 |
|
T17 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1517 |
1 |
|
|
T23 |
45 |
|
T102 |
54 |
|
T17 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T23 |
21 |
|
T102 |
13 |
|
T17 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T23 |
45 |
|
T102 |
48 |
|
T17 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T23 |
19 |
|
T102 |
14 |
|
T17 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T23 |
43 |
|
T102 |
51 |
|
T17 |
40 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T23 |
21 |
|
T102 |
13 |
|
T17 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T23 |
44 |
|
T102 |
47 |
|
T17 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T23 |
19 |
|
T102 |
14 |
|
T17 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1466 |
1 |
|
|
T23 |
43 |
|
T102 |
48 |
|
T17 |
39 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T23 |
21 |
|
T102 |
13 |
|
T17 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T23 |
41 |
|
T102 |
42 |
|
T17 |
46 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T23 |
19 |
|
T102 |
14 |
|
T17 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T23 |
43 |
|
T102 |
48 |
|
T17 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T23 |
21 |
|
T102 |
13 |
|
T17 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T23 |
41 |
|
T102 |
41 |
|
T17 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T23 |
19 |
|
T102 |
14 |
|
T17 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1401 |
1 |
|
|
T23 |
40 |
|
T102 |
48 |
|
T17 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T23 |
21 |
|
T102 |
13 |
|
T17 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T23 |
40 |
|
T102 |
41 |
|
T17 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T23 |
19 |
|
T102 |
14 |
|
T17 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T23 |
39 |
|
T102 |
47 |
|
T17 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T23 |
21 |
|
T102 |
13 |
|
T17 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1220 |
1 |
|
|
T23 |
40 |
|
T102 |
41 |
|
T17 |
43 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T23 |
19 |
|
T102 |
14 |
|
T17 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1337 |
1 |
|
|
T23 |
38 |
|
T102 |
47 |
|
T17 |
35 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T23 |
21 |
|
T102 |
13 |
|
T17 |
19 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T23 |
40 |
|
T102 |
40 |
|
T17 |
42 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T23 |
19 |
|
T102 |
14 |
|
T17 |
22 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1314 |
1 |
|
|
T23 |
37 |
|
T102 |
47 |
|
T17 |
35 |