Unified Coverage Report :: Group :: cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

Group : cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_26/gpio-sim-vcs/default/sim-vcs/../src/lowrisc_dv_cip_lib_0/cip_base_env_cov.sv

---

Summary for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	38	0	38	100.00
Crosses	192	0	192	100.00

Variables for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_intr	32	0	32	100.00	100	1	1	0
cp_intr_en	2	0	2	100.00	100	1	1	2
cp_intr_state	2	0	2	100.00	100	1	1	2
cp_intr_test	2	0	2	100.00	100	1	1	2

Crosses for Group cip_base_pkg::intr_test_cg::SHAPE{(num_interrupts - 1)=31}

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
intr_test_cg_cc	192	0	192	100.00	100	1	1	0

Summary for Variable cp_intr

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	32	0	32	100.00

User Defined Bins for cp_intr

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	6447633	1			T33	503		T34	364		T35	394
all_values[1]	6447633	1			T33	503		T34	364		T35	394
all_values[2]	6447633	1			T33	503		T34	364		T35	394
all_values[3]	6447633	1			T33	503		T34	364		T35	394
all_values[4]	6447633	1			T33	503		T34	364		T35	394
all_values[5]	6447633	1			T33	503		T34	364		T35	394
all_values[6]	6447633	1			T33	503		T34	364		T35	394
all_values[7]	6447633	1			T33	503		T34	364		T35	394
all_values[8]	6447633	1			T33	503		T34	364		T35	394
all_values[9]	6447633	1			T33	503		T34	364		T35	394
all_values[10]	6447633	1			T33	503		T34	364		T35	394
all_values[11]	6447633	1			T33	503		T34	364		T35	394
all_values[12]	6447633	1			T33	503		T34	364		T35	394
all_values[13]	6447633	1			T33	503		T34	364		T35	394
all_values[14]	6447633	1			T33	503		T34	364		T35	394
all_values[15]	6447633	1			T33	503		T34	364		T35	394
all_values[16]	6447633	1			T33	503		T34	364		T35	394
all_values[17]	6447633	1			T33	503		T34	364		T35	394
all_values[18]	6447633	1			T33	503		T34	364		T35	394
all_values[19]	6447633	1			T33	503		T34	364		T35	394
all_values[20]	6447633	1			T33	503		T34	364		T35	394
all_values[21]	6447633	1			T33	503		T34	364		T35	394
all_values[22]	6447633	1			T33	503		T34	364		T35	394
all_values[23]	6447633	1			T33	503		T34	364		T35	394
all_values[24]	6447633	1			T33	503		T34	364		T35	394
all_values[25]	6447633	1			T33	503		T34	364		T35	394
all_values[26]	6447633	1			T33	503		T34	364		T35	394
all_values[27]	6447633	1			T33	503		T34	364		T35	394
all_values[28]	6447633	1			T33	503		T34	364		T35	394
all_values[29]	6447633	1			T33	503		T34	364		T35	394
all_values[30]	6447633	1			T33	503		T34	364		T35	394
all_values[31]	6447633	1			T33	503		T34	364		T35	394

---

Summary for Variable cp_intr_en

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_en

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

142049726

1

T33

16096

T34

11648

T35

12608

auto[1]

64274530

1

T38

2852

T20

952

T21

29334

---

Summary for Variable cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_state

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

90315726

1

T33

16096

T34

11648

T35

12608

auto[1]

116008530

1

T38

4949

T20

889

T21

54934

---

Summary for Variable cp_intr_test

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_intr_test

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

204486367

1

T33

16096

T34

11648

T35

12608

auto[1]

1837889

1

T20

123

T22

1120

T39

278

---

Summary for Cross intr_test_cg_cc

Samples crossed: cp_intr cp_intr_test cp_intr_en cp_intr_state

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	192	0	192	100.00
Automatically Generated Cross Bins	192	0	192	100.00
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for intr_test_cg_cc

Bins

cp_intr	cp_intr_test	cp_intr_en	cp_intr_state	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_values[0]	auto[0]	auto[0]	auto[0]	2623168	1			T33	503		T34	364		T35	394
all_values[0]	auto[0]	auto[0]	auto[1]	1792361	1			T38	109		T20	12		T21	993
all_values[0]	auto[0]	auto[1]	auto[0]	203949	1			T38	6		T20	11		T21	105
all_values[0]	auto[0]	auto[1]	auto[1]	1771127	1			T38	62		T20	19		T21	694
all_values[0]	auto[1]	auto[0]	auto[1]	28992	1			T20	1		T22	21		T39	9
all_values[0]	auto[1]	auto[1]	auto[1]	28036	1			T20	3		T22	15		T39	3
all_values[1]	auto[0]	auto[0]	auto[0]	2619903	1			T33	503		T34	364		T35	394
all_values[1]	auto[0]	auto[0]	auto[1]	1789749	1			T38	70		T20	9		T21	936
all_values[1]	auto[0]	auto[1]	auto[0]	201893	1			T38	23		T20	29		T21	61
all_values[1]	auto[0]	auto[1]	auto[1]	1778510	1			T38	70		T20	2		T21	687
all_values[1]	auto[1]	auto[0]	auto[1]	29028	1			T20	2		T22	24		T39	6
all_values[1]	auto[1]	auto[1]	auto[1]	28550	1			T20	3		T22	13		T39	6
all_values[2]	auto[0]	auto[0]	auto[0]	2620324	1			T33	503		T34	364		T35	394
all_values[2]	auto[0]	auto[0]	auto[1]	1806310	1			T38	77		T20	7		T21	795
all_values[2]	auto[0]	auto[1]	auto[0]	200960	1			T38	19		T20	32		T21	91
all_values[2]	auto[0]	auto[1]	auto[1]	1762779	1			T38	72		T20	7		T21	941
all_values[2]	auto[1]	auto[0]	auto[1]	28712	1			T20	2		T22	21		T39	8
all_values[2]	auto[1]	auto[1]	auto[1]	28548	1			T22	14		T39	4		T1	26
all_values[3]	auto[0]	auto[0]	auto[0]	2620187	1			T33	503		T34	364		T35	394
all_values[3]	auto[0]	auto[0]	auto[1]	1791005	1			T38	100		T20	12		T21	867
all_values[3]	auto[0]	auto[1]	auto[0]	204535	1			T38	4		T20	15		T21	103
all_values[3]	auto[0]	auto[1]	auto[1]	1774662	1			T38	61		T20	23		T21	797
all_values[3]	auto[1]	auto[0]	auto[1]	28845	1			T20	2		T22	20		T39	7
all_values[3]	auto[1]	auto[1]	auto[1]	28399	1			T20	3		T22	18		T39	3
all_values[4]	auto[0]	auto[0]	auto[0]	2621448	1			T33	503		T34	364		T35	394
all_values[4]	auto[0]	auto[0]	auto[1]	1807580	1			T38	83		T20	6		T21	1189
all_values[4]	auto[0]	auto[1]	auto[0]	201524	1			T38	3		T20	19		T21	56
all_values[4]	auto[0]	auto[1]	auto[1]	1759349	1			T38	65		T20	10		T21	591
all_values[4]	auto[1]	auto[0]	auto[1]	29047	1			T20	3		T22	20		T39	5
all_values[4]	auto[1]	auto[1]	auto[1]	28685	1			T22	11		T39	2		T1	12
all_values[5]	auto[0]	auto[0]	auto[0]	2619006	1			T33	503		T34	364		T35	394
all_values[5]	auto[0]	auto[0]	auto[1]	1782670	1			T38	102		T20	8		T21	1055
all_values[5]	auto[0]	auto[1]	auto[0]	203598	1			T38	10		T20	20		T21	88
all_values[5]	auto[0]	auto[1]	auto[1]	1784905	1			T38	62		T20	14		T21	635
all_values[5]	auto[1]	auto[0]	auto[1]	28773	1			T20	2		T22	15		T39	9
all_values[5]	auto[1]	auto[1]	auto[1]	28681	1			T20	2		T22	20		T39	1
all_values[6]	auto[0]	auto[0]	auto[0]	2619198	1			T33	503		T34	364		T35	394
all_values[6]	auto[0]	auto[0]	auto[1]	1790229	1			T38	91		T20	13		T21	676
all_values[6]	auto[0]	auto[1]	auto[0]	200753	1			T38	4		T20	7		T21	107
all_values[6]	auto[0]	auto[1]	auto[1]	1779755	1			T38	78		T20	6		T21	1086
all_values[6]	auto[1]	auto[0]	auto[1]	28868	1			T20	1		T22	21		T39	7
all_values[6]	auto[1]	auto[1]	auto[1]	28830	1			T20	2		T22	13		T39	2
all_values[7]	auto[0]	auto[0]	auto[0]	2621447	1			T33	503		T34	364		T35	394
all_values[7]	auto[0]	auto[0]	auto[1]	1796501	1			T38	40		T20	12		T21	866
all_values[7]	auto[0]	auto[1]	auto[0]	202741	1			T38	23		T20	15		T21	156
all_values[7]	auto[0]	auto[1]	auto[1]	1769601	1			T38	103		T20	23		T21	775
all_values[7]	auto[1]	auto[0]	auto[1]	28939	1			T20	2		T22	7		T39	6
all_values[7]	auto[1]	auto[1]	auto[1]	28404	1			T20	4		T22	20		T39	2
all_values[8]	auto[0]	auto[0]	auto[0]	2617687	1			T33	503		T34	364		T35	394
all_values[8]	auto[0]	auto[0]	auto[1]	1789882	1			T38	64		T20	21		T21	1055
all_values[8]	auto[0]	auto[1]	auto[0]	202156	1			T38	19		T20	22		T21	55
all_values[8]	auto[0]	auto[1]	auto[1]	1780171	1			T38	85		T20	8		T21	680
all_values[8]	auto[1]	auto[0]	auto[1]	29241	1			T20	3		T22	14		T39	8
all_values[8]	auto[1]	auto[1]	auto[1]	28496	1			T20	1		T22	25		T39	2
all_values[9]	auto[0]	auto[0]	auto[0]	2618374	1			T33	503		T34	364		T35	394
all_values[9]	auto[0]	auto[0]	auto[1]	1772613	1			T38	63		T20	7		T21	712
all_values[9]	auto[0]	auto[1]	auto[0]	205663	1			T38	1		T20	15		T21	118
all_values[9]	auto[0]	auto[1]	auto[1]	1793761	1			T38	94		T20	22		T21	984
all_values[9]	auto[1]	auto[0]	auto[1]	28878	1			T20	1		T22	15		T39	4
all_values[9]	auto[1]	auto[1]	auto[1]	28344	1			T20	2		T22	25		T1	25
all_values[10]	auto[0]	auto[0]	auto[0]	2620636	1			T33	503		T34	364		T35	394
all_values[10]	auto[0]	auto[0]	auto[1]	1785109	1			T38	102		T20	24		T21	922
all_values[10]	auto[0]	auto[1]	auto[0]	199583	1			T38	6		T20	22		T21	96
all_values[10]	auto[0]	auto[1]	auto[1]	1784953	1			T38	68		T20	5		T21	829
all_values[10]	auto[1]	auto[0]	auto[1]	28884	1			T20	2		T22	22		T39	5
all_values[10]	auto[1]	auto[1]	auto[1]	28468	1			T20	3		T22	14		T1	27
all_values[11]	auto[0]	auto[0]	auto[0]	2616367	1			T33	503		T34	364		T35	394
all_values[11]	auto[0]	auto[0]	auto[1]	1785411	1			T38	63		T20	15		T21	774
all_values[11]	auto[0]	auto[1]	auto[0]	201448	1			T38	8		T20	24		T21	108
all_values[11]	auto[0]	auto[1]	auto[1]	1786842	1			T38	103		T20	1		T21	932
all_values[11]	auto[1]	auto[0]	auto[1]	29005	1			T20	4		T22	17		T39	4
all_values[11]	auto[1]	auto[1]	auto[1]	28560	1			T20	1		T22	23		T39	5
all_values[12]	auto[0]	auto[0]	auto[0]	2624888	1			T33	503		T34	364		T35	394
all_values[12]	auto[0]	auto[0]	auto[1]	1780797	1			T38	96		T20	16		T21	824
all_values[12]	auto[0]	auto[1]	auto[0]	201718	1			T20	6		T21	85		T22	41
all_values[12]	auto[0]	auto[1]	auto[1]	1782626	1			T38	78		T20	13		T21	805
all_values[12]	auto[1]	auto[0]	auto[1]	29058	1			T20	2		T22	12		T39	3
all_values[12]	auto[1]	auto[1]	auto[1]	28546	1			T20	2		T22	18		T39	3
all_values[13]	auto[0]	auto[0]	auto[0]	2618146	1			T33	503		T34	364		T35	394
all_values[13]	auto[0]	auto[0]	auto[1]	1789393	1			T38	87		T20	22		T21	653
all_values[13]	auto[0]	auto[1]	auto[0]	202175	1			T38	11		T20	4		T21	75
all_values[13]	auto[0]	auto[1]	auto[1]	1780646	1			T38	70		T20	24		T21	1132
all_values[13]	auto[1]	auto[0]	auto[1]	28756	1			T20	2		T22	25		T39	5
all_values[13]	auto[1]	auto[1]	auto[1]	28517	1			T20	1		T22	11		T39	1
all_values[14]	auto[0]	auto[0]	auto[0]	2620417	1			T33	503		T34	364		T35	394
all_values[14]	auto[0]	auto[0]	auto[1]	1791465	1			T38	73		T20	27		T21	1011
all_values[14]	auto[0]	auto[1]	auto[0]	200389	1			T38	20		T20	16		T21	62
all_values[14]	auto[0]	auto[1]	auto[1]	1777890	1			T38	77		T20	1		T21	748
all_values[14]	auto[1]	auto[0]	auto[1]	29144	1			T20	3		T22	14		T39	4
all_values[14]	auto[1]	auto[1]	auto[1]	28328	1			T20	1		T22	22		T39	6
all_values[15]	auto[0]	auto[0]	auto[0]	2623448	1			T33	503		T34	364		T35	394
all_values[15]	auto[0]	auto[0]	auto[1]	1786395	1			T38	74		T20	28		T21	812
all_values[15]	auto[0]	auto[1]	auto[0]	201601	1			T38	4		T20	10		T21	132
all_values[15]	auto[0]	auto[1]	auto[1]	1778831	1			T38	97		T20	8		T21	891
all_values[15]	auto[1]	auto[0]	auto[1]	28786	1			T22	18		T39	7		T1	19
all_values[15]	auto[1]	auto[1]	auto[1]	28572	1			T20	2		T22	19		T39	1
all_values[16]	auto[0]	auto[0]	auto[0]	2621204	1			T33	503		T34	364		T35	394
all_values[16]	auto[0]	auto[0]	auto[1]	1792859	1			T38	82		T20	6		T21	751
all_values[16]	auto[0]	auto[1]	auto[0]	198542	1			T38	19		T20	28		T21	77
all_values[16]	auto[0]	auto[1]	auto[1]	1777627	1			T38	52		T20	9		T21	935
all_values[16]	auto[1]	auto[0]	auto[1]	28929	1			T20	1		T22	18		T39	8
all_values[16]	auto[1]	auto[1]	auto[1]	28472	1			T20	4		T22	8		T39	1
all_values[17]	auto[0]	auto[0]	auto[0]	2621659	1			T33	503		T34	364		T35	394
all_values[17]	auto[0]	auto[0]	auto[1]	1780143	1			T38	62		T20	23		T21	661
all_values[17]	auto[0]	auto[1]	auto[0]	198917	1			T38	8		T20	9		T21	130
all_values[17]	auto[0]	auto[1]	auto[1]	1789449	1			T38	104		T20	7		T21	1060
all_values[17]	auto[1]	auto[0]	auto[1]	28864	1			T20	2		T22	15		T39	8
all_values[17]	auto[1]	auto[1]	auto[1]	28601	1			T20	1		T22	17		T39	3
all_values[18]	auto[0]	auto[0]	auto[0]	2625378	1			T33	503		T34	364		T35	394
all_values[18]	auto[0]	auto[0]	auto[1]	1791993	1			T38	83		T20	8		T21	655
all_values[18]	auto[0]	auto[1]	auto[0]	203763	1			T38	17		T20	27		T21	119
all_values[18]	auto[0]	auto[1]	auto[1]	1769036	1			T38	70		T20	6		T21	1093
all_values[18]	auto[1]	auto[0]	auto[1]	28925	1			T20	3		T22	18		T39	7
all_values[18]	auto[1]	auto[1]	auto[1]	28538	1			T20	2		T22	18		T39	5
all_values[19]	auto[0]	auto[0]	auto[0]	2623005	1			T33	503		T34	364		T35	394
all_values[19]	auto[0]	auto[0]	auto[1]	1790533	1			T38	38		T20	3		T21	1013
all_values[19]	auto[0]	auto[1]	auto[0]	201198	1			T38	16		T20	28		T21	74
all_values[19]	auto[0]	auto[1]	auto[1]	1775564	1			T38	89		T20	12		T21	735
all_values[19]	auto[1]	auto[0]	auto[1]	28767	1			T20	2		T22	24		T39	5
all_values[19]	auto[1]	auto[1]	auto[1]	28566	1			T20	3		T22	9		T39	1
all_values[20]	auto[0]	auto[0]	auto[0]	2621428	1			T33	503		T34	364		T35	394
all_values[20]	auto[0]	auto[0]	auto[1]	1800216	1			T38	77		T20	8		T21	1099
all_values[20]	auto[0]	auto[1]	auto[0]	199135	1			T38	6		T20	29		T21	33
all_values[20]	auto[0]	auto[1]	auto[1]	1769388	1			T38	88		T21	643		T22	412
all_values[20]	auto[1]	auto[0]	auto[1]	29038	1			T20	3		T22	12		T39	9
all_values[20]	auto[1]	auto[1]	auto[1]	28428	1			T22	15		T39	1		T1	13
all_values[21]	auto[0]	auto[0]	auto[0]	2619008	1			T33	503		T34	364		T35	394
all_values[21]	auto[0]	auto[0]	auto[1]	1793035	1			T38	88		T20	13		T21	940
all_values[21]	auto[0]	auto[1]	auto[0]	199641	1			T38	22		T20	12		T21	76
all_values[21]	auto[0]	auto[1]	auto[1]	1778425	1			T38	26		T20	16		T21	840
all_values[21]	auto[1]	auto[0]	auto[1]	28911	1			T20	3		T22	29		T39	5
all_values[21]	auto[1]	auto[1]	auto[1]	28613	1			T20	3		T22	12		T39	4
all_values[22]	auto[0]	auto[0]	auto[0]	2621606	1			T33	503		T34	364		T35	394
all_values[22]	auto[0]	auto[0]	auto[1]	1795155	1			T38	61		T20	2		T21	896
all_values[22]	auto[0]	auto[1]	auto[0]	203099	1			T38	35		T20	22		T21	91
all_values[22]	auto[0]	auto[1]	auto[1]	1770366	1			T38	58		T20	8		T21	840
all_values[22]	auto[1]	auto[0]	auto[1]	29123	1			T22	12		T39	4		T1	28
all_values[22]	auto[1]	auto[1]	auto[1]	28284	1			T22	26		T39	1		T1	14
all_values[23]	auto[0]	auto[0]	auto[0]	2622399	1			T33	503		T34	364		T35	394
all_values[23]	auto[0]	auto[0]	auto[1]	1781148	1			T38	44		T20	7		T21	1129
all_values[23]	auto[0]	auto[1]	auto[0]	205816	1			T38	5		T20	13		T21	88
all_values[23]	auto[0]	auto[1]	auto[1]	1780983	1			T38	119		T20	22		T21	586
all_values[23]	auto[1]	auto[0]	auto[1]	28736	1			T20	4		T22	16		T39	9
all_values[23]	auto[1]	auto[1]	auto[1]	28551	1			T20	1		T22	18		T39	1
all_values[24]	auto[0]	auto[0]	auto[0]	2619660	1			T33	503		T34	364		T35	394
all_values[24]	auto[0]	auto[0]	auto[1]	1796842	1			T38	77		T20	21		T21	1087
all_values[24]	auto[0]	auto[1]	auto[0]	203806	1			T38	12		T20	7		T21	58
all_values[24]	auto[0]	auto[1]	auto[1]	1769718	1			T38	89		T20	5		T21	651
all_values[24]	auto[1]	auto[0]	auto[1]	29012	1			T20	3		T22	15		T39	4
all_values[24]	auto[1]	auto[1]	auto[1]	28595	1			T22	20		T39	3		T1	16
all_values[25]	auto[0]	auto[0]	auto[0]	2621963	1			T33	503		T34	364		T35	394
all_values[25]	auto[0]	auto[0]	auto[1]	1784729	1			T38	53		T20	17		T21	695
all_values[25]	auto[0]	auto[1]	auto[0]	198639	1			T38	9		T20	23		T21	89
all_values[25]	auto[0]	auto[1]	auto[1]	1784904	1			T38	109		T20	4		T21	1062
all_values[25]	auto[1]	auto[0]	auto[1]	28974	1			T20	2		T22	17		T39	7
all_values[25]	auto[1]	auto[1]	auto[1]	28424	1			T20	2		T22	25		T39	3
all_values[26]	auto[0]	auto[0]	auto[0]	2620977	1			T33	503		T34	364		T35	394
all_values[26]	auto[0]	auto[0]	auto[1]	1783759	1			T38	102		T20	7		T21	1115
all_values[26]	auto[0]	auto[1]	auto[0]	201825	1			T38	11		T20	16		T21	30
all_values[26]	auto[0]	auto[1]	auto[1]	1783731	1			T38	60		T20	10		T21	646
all_values[26]	auto[1]	auto[0]	auto[1]	29109	1			T20	4		T22	17		T39	12
all_values[26]	auto[1]	auto[1]	auto[1]	28232	1			T22	15		T1	14		T14	1
all_values[27]	auto[0]	auto[0]	auto[0]	2619577	1			T33	503		T34	364		T35	394
all_values[27]	auto[0]	auto[0]	auto[1]	1789238	1			T38	102		T20	5		T21	850
all_values[27]	auto[0]	auto[1]	auto[0]	202263	1			T38	1		T20	26		T21	145
all_values[27]	auto[0]	auto[1]	auto[1]	1779001	1			T38	58		T20	18		T21	765
all_values[27]	auto[1]	auto[0]	auto[1]	28674	1			T20	1		T22	20		T39	2
all_values[27]	auto[1]	auto[1]	auto[1]	28880	1			T20	3		T22	18		T39	5
all_values[28]	auto[0]	auto[0]	auto[0]	2618521	1			T33	503		T34	364		T35	394
all_values[28]	auto[0]	auto[0]	auto[1]	1795008	1			T38	53		T20	13		T21	840
all_values[28]	auto[0]	auto[1]	auto[0]	199173	1			T38	5		T21	129		T22	22
all_values[28]	auto[0]	auto[1]	auto[1]	1777574	1			T38	113		T20	10		T21	724
all_values[28]	auto[1]	auto[0]	auto[1]	28694	1			T20	2		T22	23		T39	4
all_values[28]	auto[1]	auto[1]	auto[1]	28663	1			T20	1		T22	14		T39	3
all_values[29]	auto[0]	auto[0]	auto[0]	2618623	1			T33	503		T34	364		T35	394
all_values[29]	auto[0]	auto[0]	auto[1]	1786833	1			T38	77		T20	11		T21	733
all_values[29]	auto[0]	auto[1]	auto[0]	201433	1			T38	11		T20	25		T21	97
all_values[29]	auto[0]	auto[1]	auto[1]	1783243	1			T38	62		T20	9		T21	1027
all_values[29]	auto[1]	auto[0]	auto[1]	28914	1			T20	2		T22	17		T39	6
all_values[29]	auto[1]	auto[1]	auto[1]	28587	1			T22	18		T39	4		T1	20
all_values[30]	auto[0]	auto[0]	auto[0]	2621261	1			T33	503		T34	364		T35	394
all_values[30]	auto[0]	auto[0]	auto[1]	1787277	1			T38	65		T20	10		T21	1047
all_values[30]	auto[0]	auto[1]	auto[0]	199527	1			T38	3		T20	12		T21	66
all_values[30]	auto[0]	auto[1]	auto[1]	1782141	1			T38	97		T20	23		T21	704
all_values[30]	auto[1]	auto[0]	auto[1]	28715	1			T20	2		T22	19		T39	5
all_values[30]	auto[1]	auto[1]	auto[1]	28712	1			T20	4		T22	16		T39	2
all_values[31]	auto[0]	auto[0]	auto[0]	2619487	1			T33	503		T34	364		T35	394
all_values[31]	auto[0]	auto[0]	auto[1]	1778029	1			T38	94		T20	28		T21	852
all_values[31]	auto[0]	auto[1]	auto[0]	203863	1			T38	14		T20	9		T21	103
all_values[31]	auto[0]	auto[1]	auto[1]	1788816	1			T38	58		T21	913		T22	525
all_values[31]	auto[1]	auto[0]	auto[1]	28718	1			T20	3		T22	13		T39	5
all_values[31]	auto[1]	auto[1]	auto[1]	28720	1			T22	19		T39	3		T1	23

User Defined Cross Bins for intr_test_cg_cc

Excluded/Illegal bins

NAME	COUNT	STATUS
test_1_state_0	0	Illegal