| | | | | | | | | | | | | | | |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[0] |
49453 |
1 |
|
|
T48 |
625 |
|
T36 |
1724 |
|
T127 |
1265 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42050 |
1 |
|
|
T48 |
1524 |
|
T36 |
1276 |
|
T127 |
227 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[0] |
60216 |
1 |
|
|
T48 |
830 |
|
T36 |
3092 |
|
T127 |
257 |
all_gpio_pins[0] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45219 |
1 |
|
|
T48 |
710 |
|
T36 |
1180 |
|
T127 |
195 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T48 |
9 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T48 |
29 |
|
T36 |
51 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T48 |
11 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1559 |
1 |
|
|
T48 |
27 |
|
T36 |
55 |
|
T127 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
685 |
1 |
|
|
T48 |
9 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T48 |
28 |
|
T36 |
45 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T48 |
11 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T48 |
27 |
|
T36 |
53 |
|
T127 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T48 |
9 |
|
T36 |
23 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1512 |
1 |
|
|
T48 |
27 |
|
T36 |
46 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T48 |
11 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T48 |
27 |
|
T36 |
52 |
|
T127 |
9 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T48 |
9 |
|
T36 |
23 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T48 |
27 |
|
T36 |
43 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T48 |
11 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T48 |
26 |
|
T36 |
52 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T48 |
9 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T48 |
26 |
|
T36 |
43 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T48 |
10 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T48 |
26 |
|
T36 |
52 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T48 |
9 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T48 |
23 |
|
T36 |
43 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T48 |
10 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T48 |
25 |
|
T36 |
51 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T48 |
9 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T48 |
23 |
|
T36 |
40 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T48 |
10 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T48 |
25 |
|
T36 |
50 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T48 |
9 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T48 |
22 |
|
T36 |
40 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T48 |
10 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T48 |
24 |
|
T36 |
49 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T48 |
9 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1321 |
1 |
|
|
T48 |
21 |
|
T36 |
38 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T48 |
10 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T48 |
23 |
|
T36 |
48 |
|
T127 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T48 |
9 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1286 |
1 |
|
|
T48 |
20 |
|
T36 |
37 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T48 |
10 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1305 |
1 |
|
|
T48 |
23 |
|
T36 |
47 |
|
T127 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T48 |
9 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1246 |
1 |
|
|
T48 |
19 |
|
T36 |
36 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T48 |
10 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T48 |
22 |
|
T36 |
47 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T48 |
9 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T48 |
17 |
|
T36 |
35 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T48 |
10 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T48 |
22 |
|
T36 |
45 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T48 |
9 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T48 |
17 |
|
T36 |
35 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T48 |
10 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T48 |
22 |
|
T36 |
44 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T48 |
9 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1135 |
1 |
|
|
T48 |
17 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T48 |
10 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T48 |
22 |
|
T36 |
43 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
671 |
1 |
|
|
T48 |
9 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1104 |
1 |
|
|
T48 |
17 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T48 |
10 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[0] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1170 |
1 |
|
|
T48 |
22 |
|
T36 |
40 |
|
T127 |
6 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53815 |
1 |
|
|
T48 |
587 |
|
T36 |
1824 |
|
T127 |
380 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42827 |
1 |
|
|
T48 |
686 |
|
T36 |
802 |
|
T127 |
293 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58217 |
1 |
|
|
T48 |
1791 |
|
T36 |
3133 |
|
T127 |
276 |
all_gpio_pins[1] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42067 |
1 |
|
|
T48 |
447 |
|
T36 |
1268 |
|
T127 |
1016 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T48 |
10 |
|
T36 |
35 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1573 |
1 |
|
|
T48 |
32 |
|
T36 |
44 |
|
T127 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1596 |
1 |
|
|
T48 |
30 |
|
T36 |
46 |
|
T127 |
9 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T48 |
10 |
|
T36 |
35 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T48 |
32 |
|
T36 |
43 |
|
T127 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T48 |
30 |
|
T36 |
46 |
|
T127 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T48 |
10 |
|
T36 |
35 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T48 |
32 |
|
T36 |
42 |
|
T127 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1533 |
1 |
|
|
T48 |
30 |
|
T36 |
44 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
690 |
1 |
|
|
T48 |
10 |
|
T36 |
35 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1489 |
1 |
|
|
T48 |
32 |
|
T36 |
40 |
|
T127 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1504 |
1 |
|
|
T48 |
28 |
|
T36 |
44 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T48 |
10 |
|
T36 |
35 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T48 |
32 |
|
T36 |
39 |
|
T127 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T48 |
27 |
|
T36 |
43 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
688 |
1 |
|
|
T48 |
10 |
|
T36 |
35 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1440 |
1 |
|
|
T48 |
32 |
|
T36 |
39 |
|
T127 |
8 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
668 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1427 |
1 |
|
|
T48 |
26 |
|
T36 |
43 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T48 |
10 |
|
T36 |
35 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1410 |
1 |
|
|
T48 |
31 |
|
T36 |
39 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T48 |
25 |
|
T36 |
42 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T48 |
10 |
|
T36 |
35 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T48 |
30 |
|
T36 |
39 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T48 |
25 |
|
T36 |
42 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T48 |
10 |
|
T36 |
35 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1347 |
1 |
|
|
T48 |
29 |
|
T36 |
38 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T48 |
12 |
|
T36 |
33 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T48 |
24 |
|
T36 |
41 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T48 |
10 |
|
T36 |
35 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1315 |
1 |
|
|
T48 |
28 |
|
T36 |
38 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
659 |
1 |
|
|
T48 |
12 |
|
T36 |
33 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T48 |
23 |
|
T36 |
41 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T48 |
10 |
|
T36 |
35 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1287 |
1 |
|
|
T48 |
28 |
|
T36 |
38 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T48 |
12 |
|
T36 |
33 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1262 |
1 |
|
|
T48 |
23 |
|
T36 |
41 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T48 |
10 |
|
T36 |
35 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1239 |
1 |
|
|
T48 |
28 |
|
T36 |
35 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T48 |
12 |
|
T36 |
33 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T48 |
21 |
|
T36 |
40 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T48 |
10 |
|
T36 |
35 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T48 |
28 |
|
T36 |
34 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T48 |
12 |
|
T36 |
33 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T48 |
21 |
|
T36 |
39 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T48 |
10 |
|
T36 |
35 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T48 |
28 |
|
T36 |
33 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T48 |
12 |
|
T36 |
33 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1180 |
1 |
|
|
T48 |
21 |
|
T36 |
37 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T48 |
10 |
|
T36 |
35 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T48 |
28 |
|
T36 |
31 |
|
T127 |
7 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
654 |
1 |
|
|
T48 |
12 |
|
T36 |
33 |
|
T127 |
6 |
all_gpio_pins[1] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1149 |
1 |
|
|
T48 |
21 |
|
T36 |
37 |
|
T127 |
6 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50934 |
1 |
|
|
T48 |
1588 |
|
T36 |
1612 |
|
T127 |
364 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48038 |
1 |
|
|
T48 |
591 |
|
T36 |
2530 |
|
T127 |
310 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55049 |
1 |
|
|
T48 |
627 |
|
T36 |
1398 |
|
T127 |
192 |
all_gpio_pins[2] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42974 |
1 |
|
|
T48 |
833 |
|
T36 |
1247 |
|
T127 |
1002 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T48 |
8 |
|
T36 |
25 |
|
T127 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T48 |
30 |
|
T36 |
68 |
|
T127 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
9 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T48 |
29 |
|
T36 |
65 |
|
T127 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T48 |
8 |
|
T36 |
25 |
|
T127 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1513 |
1 |
|
|
T48 |
29 |
|
T36 |
67 |
|
T127 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
9 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T48 |
29 |
|
T36 |
64 |
|
T127 |
14 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T48 |
29 |
|
T36 |
67 |
|
T127 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T48 |
9 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1503 |
1 |
|
|
T48 |
29 |
|
T36 |
63 |
|
T127 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T48 |
29 |
|
T36 |
66 |
|
T127 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T48 |
9 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1477 |
1 |
|
|
T48 |
29 |
|
T36 |
62 |
|
T127 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T48 |
28 |
|
T36 |
61 |
|
T127 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1445 |
1 |
|
|
T48 |
30 |
|
T36 |
58 |
|
T127 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
706 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T48 |
28 |
|
T36 |
60 |
|
T127 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T48 |
29 |
|
T36 |
58 |
|
T127 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T48 |
28 |
|
T36 |
59 |
|
T127 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T48 |
28 |
|
T36 |
58 |
|
T127 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1351 |
1 |
|
|
T48 |
26 |
|
T36 |
57 |
|
T127 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T48 |
26 |
|
T36 |
54 |
|
T127 |
13 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T48 |
25 |
|
T36 |
56 |
|
T127 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T48 |
25 |
|
T36 |
53 |
|
T127 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T48 |
25 |
|
T36 |
54 |
|
T127 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T48 |
24 |
|
T36 |
52 |
|
T127 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T48 |
25 |
|
T36 |
53 |
|
T127 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1250 |
1 |
|
|
T48 |
24 |
|
T36 |
51 |
|
T127 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1237 |
1 |
|
|
T48 |
25 |
|
T36 |
53 |
|
T127 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T48 |
24 |
|
T36 |
46 |
|
T127 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T48 |
24 |
|
T36 |
53 |
|
T127 |
10 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T48 |
23 |
|
T36 |
44 |
|
T127 |
12 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1181 |
1 |
|
|
T48 |
24 |
|
T36 |
53 |
|
T127 |
9 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1164 |
1 |
|
|
T48 |
22 |
|
T36 |
43 |
|
T127 |
11 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
7 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1144 |
1 |
|
|
T48 |
23 |
|
T36 |
53 |
|
T127 |
8 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[2] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1135 |
1 |
|
|
T48 |
22 |
|
T36 |
40 |
|
T127 |
10 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57829 |
1 |
|
|
T48 |
744 |
|
T36 |
2208 |
|
T127 |
412 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43807 |
1 |
|
|
T48 |
1655 |
|
T36 |
916 |
|
T127 |
102 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[0] |
54135 |
1 |
|
|
T48 |
586 |
|
T36 |
2680 |
|
T127 |
1218 |
all_gpio_pins[3] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42685 |
1 |
|
|
T48 |
616 |
|
T36 |
1170 |
|
T127 |
230 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T48 |
31 |
|
T36 |
58 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T48 |
11 |
|
T36 |
31 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1475 |
1 |
|
|
T48 |
28 |
|
T36 |
54 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T48 |
31 |
|
T36 |
55 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
716 |
1 |
|
|
T48 |
11 |
|
T36 |
31 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T48 |
27 |
|
T36 |
53 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T48 |
31 |
|
T36 |
52 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T48 |
11 |
|
T36 |
31 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T48 |
27 |
|
T36 |
53 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
732 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1367 |
1 |
|
|
T48 |
31 |
|
T36 |
49 |
|
T127 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T48 |
11 |
|
T36 |
31 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1383 |
1 |
|
|
T48 |
27 |
|
T36 |
52 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1337 |
1 |
|
|
T48 |
29 |
|
T36 |
45 |
|
T127 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T48 |
28 |
|
T36 |
51 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
728 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1317 |
1 |
|
|
T48 |
28 |
|
T36 |
45 |
|
T127 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T48 |
27 |
|
T36 |
51 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1295 |
1 |
|
|
T48 |
28 |
|
T36 |
44 |
|
T127 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1323 |
1 |
|
|
T48 |
27 |
|
T36 |
50 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
724 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1254 |
1 |
|
|
T48 |
26 |
|
T36 |
42 |
|
T127 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T48 |
27 |
|
T36 |
49 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T48 |
25 |
|
T36 |
42 |
|
T127 |
8 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T48 |
27 |
|
T36 |
49 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T48 |
25 |
|
T36 |
41 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T48 |
27 |
|
T36 |
49 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T48 |
25 |
|
T36 |
38 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1219 |
1 |
|
|
T48 |
25 |
|
T36 |
49 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1138 |
1 |
|
|
T48 |
25 |
|
T36 |
37 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T48 |
25 |
|
T36 |
47 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1109 |
1 |
|
|
T48 |
25 |
|
T36 |
36 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T48 |
24 |
|
T36 |
47 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1081 |
1 |
|
|
T48 |
24 |
|
T36 |
35 |
|
T127 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1141 |
1 |
|
|
T48 |
24 |
|
T36 |
47 |
|
T127 |
9 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
721 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
5 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1050 |
1 |
|
|
T48 |
22 |
|
T36 |
34 |
|
T127 |
4 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
6 |
all_gpio_pins[3] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1121 |
1 |
|
|
T48 |
23 |
|
T36 |
47 |
|
T127 |
9 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55298 |
1 |
|
|
T48 |
579 |
|
T36 |
2641 |
|
T127 |
244 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42680 |
1 |
|
|
T48 |
579 |
|
T36 |
1279 |
|
T127 |
977 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53152 |
1 |
|
|
T48 |
736 |
|
T36 |
1737 |
|
T127 |
312 |
all_gpio_pins[4] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45642 |
1 |
|
|
T48 |
1752 |
|
T36 |
1144 |
|
T127 |
330 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T48 |
11 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1618 |
1 |
|
|
T48 |
25 |
|
T36 |
63 |
|
T127 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
14 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T48 |
23 |
|
T36 |
55 |
|
T127 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
651 |
1 |
|
|
T48 |
11 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1589 |
1 |
|
|
T48 |
24 |
|
T36 |
62 |
|
T127 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
14 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T48 |
23 |
|
T36 |
54 |
|
T127 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T48 |
11 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T48 |
24 |
|
T36 |
62 |
|
T127 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
14 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T48 |
23 |
|
T36 |
54 |
|
T127 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T48 |
11 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T48 |
23 |
|
T36 |
62 |
|
T127 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
14 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T48 |
23 |
|
T36 |
53 |
|
T127 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T48 |
11 |
|
T36 |
26 |
|
T127 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T48 |
22 |
|
T36 |
62 |
|
T127 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T48 |
24 |
|
T36 |
51 |
|
T127 |
10 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T48 |
11 |
|
T36 |
26 |
|
T127 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T48 |
22 |
|
T36 |
61 |
|
T127 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T48 |
24 |
|
T36 |
49 |
|
T127 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1425 |
1 |
|
|
T48 |
22 |
|
T36 |
60 |
|
T127 |
13 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T48 |
23 |
|
T36 |
47 |
|
T127 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
644 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T48 |
22 |
|
T36 |
59 |
|
T127 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T48 |
23 |
|
T36 |
46 |
|
T127 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T48 |
22 |
|
T36 |
58 |
|
T127 |
12 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1356 |
1 |
|
|
T48 |
23 |
|
T36 |
45 |
|
T127 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
641 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1323 |
1 |
|
|
T48 |
22 |
|
T36 |
57 |
|
T127 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T48 |
22 |
|
T36 |
44 |
|
T127 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T48 |
22 |
|
T36 |
55 |
|
T127 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T48 |
22 |
|
T36 |
43 |
|
T127 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1268 |
1 |
|
|
T48 |
22 |
|
T36 |
55 |
|
T127 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1254 |
1 |
|
|
T48 |
20 |
|
T36 |
40 |
|
T127 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1235 |
1 |
|
|
T48 |
21 |
|
T36 |
53 |
|
T127 |
11 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T48 |
20 |
|
T36 |
39 |
|
T127 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T48 |
21 |
|
T36 |
52 |
|
T127 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1197 |
1 |
|
|
T48 |
18 |
|
T36 |
39 |
|
T127 |
7 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
5 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1175 |
1 |
|
|
T48 |
21 |
|
T36 |
50 |
|
T127 |
9 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T48 |
13 |
|
T36 |
33 |
|
T127 |
8 |
all_gpio_pins[4] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1171 |
1 |
|
|
T48 |
18 |
|
T36 |
38 |
|
T127 |
7 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54910 |
1 |
|
|
T48 |
745 |
|
T36 |
1951 |
|
T127 |
1101 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46782 |
1 |
|
|
T48 |
1643 |
|
T36 |
1175 |
|
T127 |
191 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56147 |
1 |
|
|
T48 |
595 |
|
T36 |
1541 |
|
T127 |
316 |
all_gpio_pins[5] |
filter_cycles_or_more |
auto[1] |
auto[1] |
39255 |
1 |
|
|
T48 |
565 |
|
T36 |
2187 |
|
T127 |
303 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T48 |
13 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T48 |
28 |
|
T36 |
63 |
|
T127 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T48 |
13 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T48 |
28 |
|
T36 |
66 |
|
T127 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T48 |
13 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T48 |
28 |
|
T36 |
62 |
|
T127 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T48 |
13 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1523 |
1 |
|
|
T48 |
28 |
|
T36 |
61 |
|
T127 |
13 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T48 |
13 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1475 |
1 |
|
|
T48 |
28 |
|
T36 |
59 |
|
T127 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T48 |
13 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T48 |
25 |
|
T36 |
59 |
|
T127 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T48 |
13 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T48 |
28 |
|
T36 |
56 |
|
T127 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T48 |
13 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T48 |
25 |
|
T36 |
57 |
|
T127 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T48 |
13 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1415 |
1 |
|
|
T48 |
28 |
|
T36 |
56 |
|
T127 |
10 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
13 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1439 |
1 |
|
|
T48 |
25 |
|
T36 |
57 |
|
T127 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T48 |
13 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1382 |
1 |
|
|
T48 |
28 |
|
T36 |
53 |
|
T127 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
13 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T48 |
25 |
|
T36 |
57 |
|
T127 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T48 |
13 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T48 |
28 |
|
T36 |
53 |
|
T127 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
13 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T48 |
25 |
|
T36 |
54 |
|
T127 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
703 |
1 |
|
|
T48 |
13 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T48 |
28 |
|
T36 |
52 |
|
T127 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
13 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T48 |
25 |
|
T36 |
54 |
|
T127 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T48 |
13 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1303 |
1 |
|
|
T48 |
26 |
|
T36 |
52 |
|
T127 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T48 |
12 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1328 |
1 |
|
|
T48 |
24 |
|
T36 |
54 |
|
T127 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T48 |
13 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1274 |
1 |
|
|
T48 |
23 |
|
T36 |
52 |
|
T127 |
9 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
684 |
1 |
|
|
T48 |
12 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T48 |
24 |
|
T36 |
50 |
|
T127 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T48 |
13 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T48 |
23 |
|
T36 |
52 |
|
T127 |
8 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
12 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T48 |
23 |
|
T36 |
50 |
|
T127 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T48 |
13 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1222 |
1 |
|
|
T48 |
23 |
|
T36 |
50 |
|
T127 |
7 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
12 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1232 |
1 |
|
|
T48 |
22 |
|
T36 |
47 |
|
T127 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T48 |
13 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1197 |
1 |
|
|
T48 |
23 |
|
T36 |
50 |
|
T127 |
7 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
12 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T48 |
21 |
|
T36 |
44 |
|
T127 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T48 |
13 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1164 |
1 |
|
|
T48 |
22 |
|
T36 |
48 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
12 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1159 |
1 |
|
|
T48 |
19 |
|
T36 |
42 |
|
T127 |
12 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T48 |
13 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1133 |
1 |
|
|
T48 |
21 |
|
T36 |
46 |
|
T127 |
6 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
12 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[5] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1129 |
1 |
|
|
T48 |
19 |
|
T36 |
40 |
|
T127 |
12 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50436 |
1 |
|
|
T48 |
418 |
|
T36 |
1601 |
|
T127 |
158 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44685 |
1 |
|
|
T48 |
1818 |
|
T36 |
1216 |
|
T127 |
444 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55008 |
1 |
|
|
T48 |
460 |
|
T36 |
2138 |
|
T127 |
1041 |
all_gpio_pins[6] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45142 |
1 |
|
|
T48 |
771 |
|
T36 |
2235 |
|
T127 |
188 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1669 |
1 |
|
|
T48 |
38 |
|
T36 |
49 |
|
T127 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1677 |
1 |
|
|
T48 |
38 |
|
T36 |
56 |
|
T127 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1640 |
1 |
|
|
T48 |
38 |
|
T36 |
47 |
|
T127 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1651 |
1 |
|
|
T48 |
37 |
|
T36 |
55 |
|
T127 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1605 |
1 |
|
|
T48 |
36 |
|
T36 |
45 |
|
T127 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1620 |
1 |
|
|
T48 |
37 |
|
T36 |
55 |
|
T127 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T48 |
36 |
|
T36 |
43 |
|
T127 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1589 |
1 |
|
|
T48 |
35 |
|
T36 |
55 |
|
T127 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1509 |
1 |
|
|
T48 |
35 |
|
T36 |
42 |
|
T127 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T48 |
7 |
|
T36 |
20 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1552 |
1 |
|
|
T48 |
34 |
|
T36 |
51 |
|
T127 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T48 |
8 |
|
T36 |
27 |
|
T127 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T48 |
33 |
|
T36 |
42 |
|
T127 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T48 |
7 |
|
T36 |
20 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T48 |
33 |
|
T36 |
51 |
|
T127 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T48 |
8 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1451 |
1 |
|
|
T48 |
33 |
|
T36 |
42 |
|
T127 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T48 |
7 |
|
T36 |
20 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1488 |
1 |
|
|
T48 |
31 |
|
T36 |
51 |
|
T127 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T48 |
8 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1403 |
1 |
|
|
T48 |
33 |
|
T36 |
42 |
|
T127 |
16 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
653 |
1 |
|
|
T48 |
7 |
|
T36 |
20 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T48 |
31 |
|
T36 |
49 |
|
T127 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T48 |
8 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T48 |
33 |
|
T36 |
41 |
|
T127 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T48 |
7 |
|
T36 |
20 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1443 |
1 |
|
|
T48 |
30 |
|
T36 |
49 |
|
T127 |
14 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T48 |
8 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T48 |
33 |
|
T36 |
41 |
|
T127 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T48 |
7 |
|
T36 |
20 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1413 |
1 |
|
|
T48 |
30 |
|
T36 |
48 |
|
T127 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T48 |
8 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1320 |
1 |
|
|
T48 |
32 |
|
T36 |
39 |
|
T127 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T48 |
7 |
|
T36 |
20 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T48 |
30 |
|
T36 |
45 |
|
T127 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T48 |
8 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T48 |
30 |
|
T36 |
38 |
|
T127 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
645 |
1 |
|
|
T48 |
7 |
|
T36 |
20 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1342 |
1 |
|
|
T48 |
29 |
|
T36 |
45 |
|
T127 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T48 |
8 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1245 |
1 |
|
|
T48 |
29 |
|
T36 |
37 |
|
T127 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T48 |
7 |
|
T36 |
20 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1310 |
1 |
|
|
T48 |
29 |
|
T36 |
43 |
|
T127 |
12 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T48 |
8 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T48 |
29 |
|
T36 |
37 |
|
T127 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T48 |
7 |
|
T36 |
20 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T48 |
29 |
|
T36 |
43 |
|
T127 |
11 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T48 |
8 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1169 |
1 |
|
|
T48 |
29 |
|
T36 |
37 |
|
T127 |
15 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
644 |
1 |
|
|
T48 |
7 |
|
T36 |
20 |
|
T127 |
4 |
all_gpio_pins[6] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T48 |
28 |
|
T36 |
41 |
|
T127 |
8 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54332 |
1 |
|
|
T48 |
931 |
|
T36 |
1165 |
|
T127 |
1011 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[0] |
auto[1] |
39710 |
1 |
|
|
T48 |
381 |
|
T36 |
2713 |
|
T127 |
273 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59988 |
1 |
|
|
T48 |
866 |
|
T36 |
1660 |
|
T127 |
133 |
all_gpio_pins[7] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42254 |
1 |
|
|
T48 |
1506 |
|
T36 |
1186 |
|
T127 |
367 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T48 |
15 |
|
T36 |
22 |
|
T127 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1575 |
1 |
|
|
T48 |
20 |
|
T36 |
75 |
|
T127 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T48 |
17 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T48 |
19 |
|
T36 |
74 |
|
T127 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T48 |
15 |
|
T36 |
22 |
|
T127 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1542 |
1 |
|
|
T48 |
20 |
|
T36 |
73 |
|
T127 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
712 |
1 |
|
|
T48 |
17 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T48 |
19 |
|
T36 |
70 |
|
T127 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T48 |
15 |
|
T36 |
22 |
|
T127 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T48 |
20 |
|
T36 |
71 |
|
T127 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T48 |
17 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T48 |
19 |
|
T36 |
68 |
|
T127 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T48 |
15 |
|
T36 |
22 |
|
T127 |
5 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1462 |
1 |
|
|
T48 |
19 |
|
T36 |
71 |
|
T127 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T48 |
17 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1484 |
1 |
|
|
T48 |
19 |
|
T36 |
66 |
|
T127 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T48 |
15 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1435 |
1 |
|
|
T48 |
18 |
|
T36 |
70 |
|
T127 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T48 |
17 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T48 |
19 |
|
T36 |
63 |
|
T127 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
708 |
1 |
|
|
T48 |
15 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T48 |
18 |
|
T36 |
69 |
|
T127 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T48 |
17 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T48 |
19 |
|
T36 |
63 |
|
T127 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T48 |
15 |
|
T36 |
21 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1376 |
1 |
|
|
T48 |
17 |
|
T36 |
66 |
|
T127 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T48 |
17 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T48 |
18 |
|
T36 |
60 |
|
T127 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T48 |
15 |
|
T36 |
21 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1342 |
1 |
|
|
T48 |
17 |
|
T36 |
65 |
|
T127 |
17 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T48 |
17 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1365 |
1 |
|
|
T48 |
17 |
|
T36 |
58 |
|
T127 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T48 |
15 |
|
T36 |
21 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1316 |
1 |
|
|
T48 |
17 |
|
T36 |
65 |
|
T127 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T48 |
16 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1336 |
1 |
|
|
T48 |
16 |
|
T36 |
57 |
|
T127 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
702 |
1 |
|
|
T48 |
15 |
|
T36 |
21 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1290 |
1 |
|
|
T48 |
16 |
|
T36 |
65 |
|
T127 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T48 |
16 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1306 |
1 |
|
|
T48 |
16 |
|
T36 |
54 |
|
T127 |
16 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T48 |
15 |
|
T36 |
21 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T48 |
16 |
|
T36 |
64 |
|
T127 |
15 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T48 |
16 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1269 |
1 |
|
|
T48 |
16 |
|
T36 |
48 |
|
T127 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T48 |
15 |
|
T36 |
21 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T48 |
15 |
|
T36 |
63 |
|
T127 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T48 |
16 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1243 |
1 |
|
|
T48 |
16 |
|
T36 |
48 |
|
T127 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T48 |
15 |
|
T36 |
21 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1209 |
1 |
|
|
T48 |
15 |
|
T36 |
62 |
|
T127 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
16 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1218 |
1 |
|
|
T48 |
16 |
|
T36 |
48 |
|
T127 |
14 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T48 |
15 |
|
T36 |
21 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T48 |
15 |
|
T36 |
61 |
|
T127 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
16 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T48 |
16 |
|
T36 |
48 |
|
T127 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T48 |
15 |
|
T36 |
21 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1136 |
1 |
|
|
T48 |
13 |
|
T36 |
59 |
|
T127 |
13 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
16 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[7] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1166 |
1 |
|
|
T48 |
16 |
|
T36 |
46 |
|
T127 |
13 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[0] |
56523 |
1 |
|
|
T48 |
498 |
|
T36 |
2076 |
|
T127 |
1195 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42329 |
1 |
|
|
T48 |
565 |
|
T36 |
1076 |
|
T127 |
205 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50915 |
1 |
|
|
T48 |
914 |
|
T36 |
2640 |
|
T127 |
278 |
all_gpio_pins[8] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47058 |
1 |
|
|
T48 |
1688 |
|
T36 |
1127 |
|
T127 |
211 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T48 |
13 |
|
T36 |
27 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1593 |
1 |
|
|
T48 |
24 |
|
T36 |
60 |
|
T127 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1574 |
1 |
|
|
T48 |
24 |
|
T36 |
63 |
|
T127 |
12 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T48 |
13 |
|
T36 |
27 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1563 |
1 |
|
|
T48 |
22 |
|
T36 |
59 |
|
T127 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1537 |
1 |
|
|
T48 |
23 |
|
T36 |
61 |
|
T127 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T48 |
13 |
|
T36 |
26 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1531 |
1 |
|
|
T48 |
21 |
|
T36 |
59 |
|
T127 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T48 |
23 |
|
T36 |
61 |
|
T127 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T48 |
13 |
|
T36 |
26 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T48 |
21 |
|
T36 |
58 |
|
T127 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1458 |
1 |
|
|
T48 |
23 |
|
T36 |
60 |
|
T127 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T48 |
13 |
|
T36 |
26 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T48 |
21 |
|
T36 |
56 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1433 |
1 |
|
|
T48 |
23 |
|
T36 |
59 |
|
T127 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T48 |
13 |
|
T36 |
26 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1426 |
1 |
|
|
T48 |
20 |
|
T36 |
54 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T48 |
23 |
|
T36 |
59 |
|
T127 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T48 |
13 |
|
T36 |
26 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T48 |
20 |
|
T36 |
52 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T48 |
23 |
|
T36 |
56 |
|
T127 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T48 |
13 |
|
T36 |
26 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1370 |
1 |
|
|
T48 |
19 |
|
T36 |
47 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1343 |
1 |
|
|
T48 |
22 |
|
T36 |
55 |
|
T127 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T48 |
13 |
|
T36 |
26 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T48 |
18 |
|
T36 |
46 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T48 |
21 |
|
T36 |
54 |
|
T127 |
11 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T48 |
13 |
|
T36 |
26 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1311 |
1 |
|
|
T48 |
17 |
|
T36 |
46 |
|
T127 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T48 |
20 |
|
T36 |
52 |
|
T127 |
10 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T48 |
13 |
|
T36 |
26 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T48 |
17 |
|
T36 |
46 |
|
T127 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1263 |
1 |
|
|
T48 |
20 |
|
T36 |
51 |
|
T127 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T48 |
13 |
|
T36 |
26 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1250 |
1 |
|
|
T48 |
16 |
|
T36 |
45 |
|
T127 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T48 |
19 |
|
T36 |
50 |
|
T127 |
9 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T48 |
13 |
|
T36 |
26 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1223 |
1 |
|
|
T48 |
16 |
|
T36 |
44 |
|
T127 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T48 |
19 |
|
T36 |
48 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T48 |
13 |
|
T36 |
26 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T48 |
16 |
|
T36 |
42 |
|
T127 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1157 |
1 |
|
|
T48 |
19 |
|
T36 |
47 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T48 |
13 |
|
T36 |
26 |
|
T127 |
8 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1164 |
1 |
|
|
T48 |
15 |
|
T36 |
42 |
|
T127 |
7 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[8] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1124 |
1 |
|
|
T48 |
19 |
|
T36 |
42 |
|
T127 |
8 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52775 |
1 |
|
|
T48 |
784 |
|
T36 |
2597 |
|
T127 |
288 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44591 |
1 |
|
|
T48 |
530 |
|
T36 |
1414 |
|
T127 |
368 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57495 |
1 |
|
|
T48 |
452 |
|
T36 |
1458 |
|
T127 |
102 |
all_gpio_pins[9] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42119 |
1 |
|
|
T48 |
1821 |
|
T36 |
1305 |
|
T127 |
1053 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T48 |
10 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T48 |
30 |
|
T36 |
69 |
|
T127 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T48 |
7 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T48 |
34 |
|
T36 |
64 |
|
T127 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T48 |
10 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T48 |
29 |
|
T36 |
68 |
|
T127 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T48 |
7 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1534 |
1 |
|
|
T48 |
34 |
|
T36 |
62 |
|
T127 |
18 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T48 |
10 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1499 |
1 |
|
|
T48 |
28 |
|
T36 |
68 |
|
T127 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T48 |
7 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1498 |
1 |
|
|
T48 |
34 |
|
T36 |
60 |
|
T127 |
17 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T48 |
10 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1472 |
1 |
|
|
T48 |
28 |
|
T36 |
66 |
|
T127 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T48 |
7 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1469 |
1 |
|
|
T48 |
34 |
|
T36 |
58 |
|
T127 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T48 |
10 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1439 |
1 |
|
|
T48 |
27 |
|
T36 |
64 |
|
T127 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T48 |
7 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1434 |
1 |
|
|
T48 |
32 |
|
T36 |
57 |
|
T127 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
705 |
1 |
|
|
T48 |
10 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T48 |
27 |
|
T36 |
63 |
|
T127 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T48 |
7 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T48 |
32 |
|
T36 |
57 |
|
T127 |
16 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T48 |
10 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T48 |
26 |
|
T36 |
63 |
|
T127 |
15 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T48 |
7 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1367 |
1 |
|
|
T48 |
32 |
|
T36 |
56 |
|
T127 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T48 |
10 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T48 |
26 |
|
T36 |
63 |
|
T127 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T48 |
7 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1340 |
1 |
|
|
T48 |
32 |
|
T36 |
55 |
|
T127 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T48 |
10 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T48 |
25 |
|
T36 |
60 |
|
T127 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T48 |
30 |
|
T36 |
54 |
|
T127 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T48 |
10 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1272 |
1 |
|
|
T48 |
25 |
|
T36 |
58 |
|
T127 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1275 |
1 |
|
|
T48 |
30 |
|
T36 |
52 |
|
T127 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T48 |
10 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1243 |
1 |
|
|
T48 |
25 |
|
T36 |
57 |
|
T127 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1235 |
1 |
|
|
T48 |
27 |
|
T36 |
50 |
|
T127 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T48 |
10 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T48 |
23 |
|
T36 |
56 |
|
T127 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1205 |
1 |
|
|
T48 |
26 |
|
T36 |
47 |
|
T127 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T48 |
10 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1196 |
1 |
|
|
T48 |
23 |
|
T36 |
55 |
|
T127 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1166 |
1 |
|
|
T48 |
25 |
|
T36 |
45 |
|
T127 |
14 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T48 |
10 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1170 |
1 |
|
|
T48 |
23 |
|
T36 |
54 |
|
T127 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1137 |
1 |
|
|
T48 |
25 |
|
T36 |
44 |
|
T127 |
13 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T48 |
10 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1152 |
1 |
|
|
T48 |
22 |
|
T36 |
53 |
|
T127 |
11 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[9] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1098 |
1 |
|
|
T48 |
25 |
|
T36 |
43 |
|
T127 |
12 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[0] |
60697 |
1 |
|
|
T48 |
1513 |
|
T36 |
2696 |
|
T127 |
1189 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[0] |
auto[1] |
36972 |
1 |
|
|
T48 |
736 |
|
T36 |
1098 |
|
T127 |
222 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50754 |
1 |
|
|
T48 |
465 |
|
T36 |
1675 |
|
T127 |
348 |
all_gpio_pins[10] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47416 |
1 |
|
|
T48 |
721 |
|
T36 |
1447 |
|
T127 |
175 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1611 |
1 |
|
|
T48 |
39 |
|
T36 |
66 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T48 |
9 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1627 |
1 |
|
|
T48 |
38 |
|
T36 |
66 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1585 |
1 |
|
|
T48 |
39 |
|
T36 |
63 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
675 |
1 |
|
|
T48 |
9 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1592 |
1 |
|
|
T48 |
38 |
|
T36 |
66 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1551 |
1 |
|
|
T48 |
38 |
|
T36 |
62 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T48 |
9 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1562 |
1 |
|
|
T48 |
36 |
|
T36 |
65 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T48 |
37 |
|
T36 |
61 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
674 |
1 |
|
|
T48 |
9 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1532 |
1 |
|
|
T48 |
36 |
|
T36 |
65 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1491 |
1 |
|
|
T48 |
35 |
|
T36 |
58 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T48 |
35 |
|
T36 |
64 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1446 |
1 |
|
|
T48 |
33 |
|
T36 |
57 |
|
T127 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1489 |
1 |
|
|
T48 |
35 |
|
T36 |
63 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T48 |
32 |
|
T36 |
55 |
|
T127 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1462 |
1 |
|
|
T48 |
35 |
|
T36 |
62 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T48 |
32 |
|
T36 |
54 |
|
T127 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1424 |
1 |
|
|
T48 |
35 |
|
T36 |
62 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T48 |
31 |
|
T36 |
51 |
|
T127 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1388 |
1 |
|
|
T48 |
35 |
|
T36 |
62 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T48 |
31 |
|
T36 |
50 |
|
T127 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1357 |
1 |
|
|
T48 |
33 |
|
T36 |
61 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T48 |
29 |
|
T36 |
49 |
|
T127 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T48 |
33 |
|
T36 |
59 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T48 |
29 |
|
T36 |
47 |
|
T127 |
8 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T48 |
33 |
|
T36 |
59 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T48 |
28 |
|
T36 |
43 |
|
T127 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T48 |
31 |
|
T36 |
58 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T48 |
26 |
|
T36 |
42 |
|
T127 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1220 |
1 |
|
|
T48 |
29 |
|
T36 |
57 |
|
T127 |
9 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1200 |
1 |
|
|
T48 |
25 |
|
T36 |
41 |
|
T127 |
7 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T48 |
8 |
|
T36 |
20 |
|
T127 |
6 |
all_gpio_pins[10] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T48 |
29 |
|
T36 |
55 |
|
T127 |
8 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51062 |
1 |
|
|
T48 |
849 |
|
T36 |
1330 |
|
T127 |
207 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42278 |
1 |
|
|
T48 |
526 |
|
T36 |
2215 |
|
T127 |
1087 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[0] |
59346 |
1 |
|
|
T48 |
1644 |
|
T36 |
1588 |
|
T127 |
223 |
all_gpio_pins[11] |
filter_cycles_or_more |
auto[1] |
auto[1] |
43934 |
1 |
|
|
T48 |
547 |
|
T36 |
1676 |
|
T127 |
403 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1588 |
1 |
|
|
T48 |
30 |
|
T36 |
69 |
|
T127 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T48 |
16 |
|
T36 |
20 |
|
T127 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T48 |
26 |
|
T36 |
70 |
|
T127 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1559 |
1 |
|
|
T48 |
29 |
|
T36 |
68 |
|
T127 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T48 |
16 |
|
T36 |
20 |
|
T127 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T48 |
26 |
|
T36 |
68 |
|
T127 |
14 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T48 |
29 |
|
T36 |
68 |
|
T127 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
16 |
|
T36 |
20 |
|
T127 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T48 |
26 |
|
T36 |
68 |
|
T127 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1507 |
1 |
|
|
T48 |
29 |
|
T36 |
67 |
|
T127 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
16 |
|
T36 |
20 |
|
T127 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T48 |
25 |
|
T36 |
68 |
|
T127 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1470 |
1 |
|
|
T48 |
27 |
|
T36 |
64 |
|
T127 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T48 |
16 |
|
T36 |
20 |
|
T127 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T48 |
25 |
|
T36 |
67 |
|
T127 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
672 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T48 |
27 |
|
T36 |
59 |
|
T127 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T48 |
16 |
|
T36 |
20 |
|
T127 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T48 |
24 |
|
T36 |
67 |
|
T127 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1416 |
1 |
|
|
T48 |
26 |
|
T36 |
59 |
|
T127 |
13 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
16 |
|
T36 |
20 |
|
T127 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1390 |
1 |
|
|
T48 |
22 |
|
T36 |
64 |
|
T127 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T48 |
25 |
|
T36 |
55 |
|
T127 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
16 |
|
T36 |
20 |
|
T127 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T48 |
21 |
|
T36 |
61 |
|
T127 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1350 |
1 |
|
|
T48 |
25 |
|
T36 |
54 |
|
T127 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
15 |
|
T36 |
20 |
|
T127 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T48 |
21 |
|
T36 |
61 |
|
T127 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T48 |
23 |
|
T36 |
53 |
|
T127 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
15 |
|
T36 |
20 |
|
T127 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T48 |
21 |
|
T36 |
61 |
|
T127 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T48 |
22 |
|
T36 |
52 |
|
T127 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T48 |
15 |
|
T36 |
20 |
|
T127 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1274 |
1 |
|
|
T48 |
20 |
|
T36 |
61 |
|
T127 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T48 |
21 |
|
T36 |
49 |
|
T127 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T48 |
15 |
|
T36 |
20 |
|
T127 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1241 |
1 |
|
|
T48 |
20 |
|
T36 |
61 |
|
T127 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T48 |
21 |
|
T36 |
46 |
|
T127 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T48 |
15 |
|
T36 |
20 |
|
T127 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T48 |
20 |
|
T36 |
60 |
|
T127 |
11 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1205 |
1 |
|
|
T48 |
21 |
|
T36 |
45 |
|
T127 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T48 |
15 |
|
T36 |
20 |
|
T127 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1161 |
1 |
|
|
T48 |
19 |
|
T36 |
60 |
|
T127 |
9 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
4 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T48 |
21 |
|
T36 |
44 |
|
T127 |
12 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T48 |
15 |
|
T36 |
20 |
|
T127 |
2 |
all_gpio_pins[11] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1123 |
1 |
|
|
T48 |
18 |
|
T36 |
57 |
|
T127 |
9 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[0] |
62224 |
1 |
|
|
T48 |
744 |
|
T36 |
1740 |
|
T127 |
386 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41675 |
1 |
|
|
T48 |
431 |
|
T36 |
1246 |
|
T127 |
921 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51389 |
1 |
|
|
T48 |
694 |
|
T36 |
1773 |
|
T127 |
432 |
all_gpio_pins[12] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41369 |
1 |
|
|
T48 |
1620 |
|
T36 |
2099 |
|
T127 |
191 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T48 |
13 |
|
T36 |
31 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1541 |
1 |
|
|
T48 |
30 |
|
T36 |
57 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T48 |
12 |
|
T36 |
32 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1565 |
1 |
|
|
T48 |
32 |
|
T36 |
56 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
734 |
1 |
|
|
T48 |
13 |
|
T36 |
31 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T48 |
30 |
|
T36 |
56 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
706 |
1 |
|
|
T48 |
12 |
|
T36 |
32 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T48 |
32 |
|
T36 |
55 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T48 |
13 |
|
T36 |
30 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1468 |
1 |
|
|
T48 |
29 |
|
T36 |
56 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
12 |
|
T36 |
32 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1502 |
1 |
|
|
T48 |
32 |
|
T36 |
52 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
733 |
1 |
|
|
T48 |
13 |
|
T36 |
30 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T48 |
29 |
|
T36 |
56 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
12 |
|
T36 |
32 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1474 |
1 |
|
|
T48 |
32 |
|
T36 |
48 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T48 |
13 |
|
T36 |
30 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T48 |
27 |
|
T36 |
56 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T48 |
12 |
|
T36 |
32 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1448 |
1 |
|
|
T48 |
31 |
|
T36 |
48 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
731 |
1 |
|
|
T48 |
13 |
|
T36 |
30 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1379 |
1 |
|
|
T48 |
27 |
|
T36 |
53 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
702 |
1 |
|
|
T48 |
12 |
|
T36 |
32 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T48 |
31 |
|
T36 |
47 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T48 |
13 |
|
T36 |
30 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1339 |
1 |
|
|
T48 |
27 |
|
T36 |
52 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T48 |
12 |
|
T36 |
32 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1393 |
1 |
|
|
T48 |
29 |
|
T36 |
44 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
727 |
1 |
|
|
T48 |
13 |
|
T36 |
30 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T48 |
27 |
|
T36 |
52 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T48 |
12 |
|
T36 |
32 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1369 |
1 |
|
|
T48 |
28 |
|
T36 |
44 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T48 |
13 |
|
T36 |
30 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T48 |
27 |
|
T36 |
50 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
12 |
|
T36 |
32 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T48 |
28 |
|
T36 |
43 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T48 |
13 |
|
T36 |
30 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1241 |
1 |
|
|
T48 |
25 |
|
T36 |
50 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
12 |
|
T36 |
32 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T48 |
27 |
|
T36 |
42 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T48 |
13 |
|
T36 |
30 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1206 |
1 |
|
|
T48 |
24 |
|
T36 |
49 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T48 |
12 |
|
T36 |
32 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T48 |
27 |
|
T36 |
42 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T48 |
13 |
|
T36 |
30 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1179 |
1 |
|
|
T48 |
23 |
|
T36 |
49 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T48 |
12 |
|
T36 |
32 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T48 |
25 |
|
T36 |
42 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T48 |
13 |
|
T36 |
30 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1144 |
1 |
|
|
T48 |
21 |
|
T36 |
45 |
|
T127 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T48 |
12 |
|
T36 |
32 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1238 |
1 |
|
|
T48 |
25 |
|
T36 |
42 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T48 |
13 |
|
T36 |
30 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1119 |
1 |
|
|
T48 |
19 |
|
T36 |
44 |
|
T127 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T48 |
12 |
|
T36 |
32 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1208 |
1 |
|
|
T48 |
25 |
|
T36 |
41 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T48 |
13 |
|
T36 |
30 |
|
T127 |
7 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1082 |
1 |
|
|
T48 |
17 |
|
T36 |
43 |
|
T127 |
6 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T48 |
12 |
|
T36 |
32 |
|
T127 |
8 |
all_gpio_pins[12] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1181 |
1 |
|
|
T48 |
24 |
|
T36 |
41 |
|
T127 |
7 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54266 |
1 |
|
|
T48 |
897 |
|
T36 |
1913 |
|
T127 |
490 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42327 |
1 |
|
|
T48 |
1771 |
|
T36 |
1155 |
|
T127 |
257 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52601 |
1 |
|
|
T48 |
502 |
|
T36 |
1817 |
|
T127 |
232 |
all_gpio_pins[13] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47510 |
1 |
|
|
T48 |
527 |
|
T36 |
2324 |
|
T127 |
977 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T48 |
6 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T48 |
29 |
|
T36 |
52 |
|
T127 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
9 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1568 |
1 |
|
|
T48 |
26 |
|
T36 |
55 |
|
T127 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T48 |
6 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T48 |
29 |
|
T36 |
51 |
|
T127 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
9 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1535 |
1 |
|
|
T48 |
26 |
|
T36 |
55 |
|
T127 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T48 |
6 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1494 |
1 |
|
|
T48 |
29 |
|
T36 |
51 |
|
T127 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
9 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1505 |
1 |
|
|
T48 |
26 |
|
T36 |
54 |
|
T127 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T48 |
6 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T48 |
28 |
|
T36 |
50 |
|
T127 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
9 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1470 |
1 |
|
|
T48 |
26 |
|
T36 |
54 |
|
T127 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T48 |
6 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1429 |
1 |
|
|
T48 |
28 |
|
T36 |
48 |
|
T127 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T48 |
27 |
|
T36 |
52 |
|
T127 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
707 |
1 |
|
|
T48 |
6 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1407 |
1 |
|
|
T48 |
26 |
|
T36 |
48 |
|
T127 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1407 |
1 |
|
|
T48 |
26 |
|
T36 |
50 |
|
T127 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T48 |
6 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1383 |
1 |
|
|
T48 |
26 |
|
T36 |
47 |
|
T127 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1385 |
1 |
|
|
T48 |
26 |
|
T36 |
50 |
|
T127 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T48 |
6 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1358 |
1 |
|
|
T48 |
26 |
|
T36 |
47 |
|
T127 |
10 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1353 |
1 |
|
|
T48 |
25 |
|
T36 |
46 |
|
T127 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T48 |
6 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1324 |
1 |
|
|
T48 |
26 |
|
T36 |
44 |
|
T127 |
9 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T48 |
25 |
|
T36 |
45 |
|
T127 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
701 |
1 |
|
|
T48 |
6 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T48 |
25 |
|
T36 |
41 |
|
T127 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T48 |
25 |
|
T36 |
45 |
|
T127 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T48 |
6 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T48 |
25 |
|
T36 |
39 |
|
T127 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T48 |
25 |
|
T36 |
44 |
|
T127 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T48 |
6 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1231 |
1 |
|
|
T48 |
25 |
|
T36 |
38 |
|
T127 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1230 |
1 |
|
|
T48 |
25 |
|
T36 |
43 |
|
T127 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T48 |
6 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1189 |
1 |
|
|
T48 |
24 |
|
T36 |
35 |
|
T127 |
8 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T48 |
22 |
|
T36 |
42 |
|
T127 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T48 |
6 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1158 |
1 |
|
|
T48 |
22 |
|
T36 |
34 |
|
T127 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T48 |
22 |
|
T36 |
40 |
|
T127 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T48 |
6 |
|
T36 |
23 |
|
T127 |
5 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1126 |
1 |
|
|
T48 |
21 |
|
T36 |
34 |
|
T127 |
7 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
6 |
all_gpio_pins[13] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1150 |
1 |
|
|
T48 |
22 |
|
T36 |
40 |
|
T127 |
7 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52915 |
1 |
|
|
T48 |
680 |
|
T36 |
1824 |
|
T127 |
185 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[0] |
auto[1] |
48174 |
1 |
|
|
T48 |
609 |
|
T36 |
1278 |
|
T127 |
1108 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[0] |
51655 |
1 |
|
|
T48 |
1880 |
|
T36 |
1484 |
|
T127 |
162 |
all_gpio_pins[14] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44103 |
1 |
|
|
T48 |
517 |
|
T36 |
2264 |
|
T127 |
448 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T48 |
7 |
|
T36 |
29 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1576 |
1 |
|
|
T48 |
29 |
|
T36 |
60 |
|
T127 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1557 |
1 |
|
|
T48 |
26 |
|
T36 |
64 |
|
T127 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
682 |
1 |
|
|
T48 |
7 |
|
T36 |
29 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1546 |
1 |
|
|
T48 |
29 |
|
T36 |
59 |
|
T127 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T48 |
25 |
|
T36 |
62 |
|
T127 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T48 |
7 |
|
T36 |
28 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T48 |
28 |
|
T36 |
60 |
|
T127 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T48 |
24 |
|
T36 |
61 |
|
T127 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T48 |
7 |
|
T36 |
28 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1500 |
1 |
|
|
T48 |
28 |
|
T36 |
59 |
|
T127 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1473 |
1 |
|
|
T48 |
24 |
|
T36 |
58 |
|
T127 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T48 |
7 |
|
T36 |
28 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1467 |
1 |
|
|
T48 |
27 |
|
T36 |
59 |
|
T127 |
15 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1438 |
1 |
|
|
T48 |
23 |
|
T36 |
55 |
|
T127 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
677 |
1 |
|
|
T48 |
7 |
|
T36 |
28 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1437 |
1 |
|
|
T48 |
26 |
|
T36 |
59 |
|
T127 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
695 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T48 |
23 |
|
T36 |
54 |
|
T127 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T48 |
7 |
|
T36 |
28 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1411 |
1 |
|
|
T48 |
26 |
|
T36 |
56 |
|
T127 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1379 |
1 |
|
|
T48 |
23 |
|
T36 |
54 |
|
T127 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T48 |
7 |
|
T36 |
28 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T48 |
26 |
|
T36 |
53 |
|
T127 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T48 |
23 |
|
T36 |
52 |
|
T127 |
12 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
7 |
|
T36 |
28 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1354 |
1 |
|
|
T48 |
25 |
|
T36 |
53 |
|
T127 |
14 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T48 |
23 |
|
T36 |
51 |
|
T127 |
11 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
7 |
|
T36 |
28 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1319 |
1 |
|
|
T48 |
25 |
|
T36 |
52 |
|
T127 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1296 |
1 |
|
|
T48 |
22 |
|
T36 |
51 |
|
T127 |
10 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T48 |
7 |
|
T36 |
28 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1288 |
1 |
|
|
T48 |
24 |
|
T36 |
49 |
|
T127 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1273 |
1 |
|
|
T48 |
21 |
|
T36 |
50 |
|
T127 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T48 |
7 |
|
T36 |
28 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T48 |
21 |
|
T36 |
47 |
|
T127 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1240 |
1 |
|
|
T48 |
21 |
|
T36 |
49 |
|
T127 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T48 |
7 |
|
T36 |
28 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1217 |
1 |
|
|
T48 |
21 |
|
T36 |
46 |
|
T127 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T48 |
21 |
|
T36 |
48 |
|
T127 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T48 |
7 |
|
T36 |
28 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T48 |
21 |
|
T36 |
44 |
|
T127 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1180 |
1 |
|
|
T48 |
21 |
|
T36 |
46 |
|
T127 |
9 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T48 |
7 |
|
T36 |
28 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1149 |
1 |
|
|
T48 |
21 |
|
T36 |
43 |
|
T127 |
13 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
3 |
all_gpio_pins[14] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1146 |
1 |
|
|
T48 |
21 |
|
T36 |
44 |
|
T127 |
9 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53691 |
1 |
|
|
T48 |
967 |
|
T36 |
1738 |
|
T127 |
542 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43892 |
1 |
|
|
T48 |
440 |
|
T36 |
1141 |
|
T127 |
203 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57392 |
1 |
|
|
T48 |
494 |
|
T36 |
2684 |
|
T127 |
288 |
all_gpio_pins[15] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42251 |
1 |
|
|
T48 |
1597 |
|
T36 |
1256 |
|
T127 |
963 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T48 |
14 |
|
T36 |
28 |
|
T127 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T48 |
29 |
|
T36 |
61 |
|
T127 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T48 |
13 |
|
T36 |
31 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1566 |
1 |
|
|
T48 |
31 |
|
T36 |
58 |
|
T127 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
717 |
1 |
|
|
T48 |
14 |
|
T36 |
28 |
|
T127 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1497 |
1 |
|
|
T48 |
28 |
|
T36 |
61 |
|
T127 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T48 |
13 |
|
T36 |
31 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1540 |
1 |
|
|
T48 |
31 |
|
T36 |
57 |
|
T127 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T48 |
14 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1471 |
1 |
|
|
T48 |
27 |
|
T36 |
61 |
|
T127 |
6 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
13 |
|
T36 |
31 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T48 |
30 |
|
T36 |
56 |
|
T127 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
716 |
1 |
|
|
T48 |
14 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1445 |
1 |
|
|
T48 |
27 |
|
T36 |
61 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
13 |
|
T36 |
31 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1481 |
1 |
|
|
T48 |
30 |
|
T36 |
55 |
|
T127 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T48 |
14 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1408 |
1 |
|
|
T48 |
26 |
|
T36 |
60 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T48 |
12 |
|
T36 |
31 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T48 |
31 |
|
T36 |
54 |
|
T127 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T48 |
14 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1373 |
1 |
|
|
T48 |
25 |
|
T36 |
59 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T48 |
12 |
|
T36 |
31 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T48 |
31 |
|
T36 |
52 |
|
T127 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T48 |
14 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1338 |
1 |
|
|
T48 |
25 |
|
T36 |
56 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T48 |
12 |
|
T36 |
31 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1404 |
1 |
|
|
T48 |
30 |
|
T36 |
49 |
|
T127 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
713 |
1 |
|
|
T48 |
14 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T48 |
24 |
|
T36 |
55 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T48 |
12 |
|
T36 |
31 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1370 |
1 |
|
|
T48 |
30 |
|
T36 |
49 |
|
T127 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T48 |
14 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T48 |
24 |
|
T36 |
52 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T48 |
12 |
|
T36 |
31 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1348 |
1 |
|
|
T48 |
29 |
|
T36 |
49 |
|
T127 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T48 |
14 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T48 |
22 |
|
T36 |
50 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T48 |
12 |
|
T36 |
31 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1318 |
1 |
|
|
T48 |
28 |
|
T36 |
49 |
|
T127 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T48 |
14 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1215 |
1 |
|
|
T48 |
21 |
|
T36 |
48 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T48 |
12 |
|
T36 |
31 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1288 |
1 |
|
|
T48 |
27 |
|
T36 |
47 |
|
T127 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T48 |
14 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T48 |
20 |
|
T36 |
48 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T48 |
12 |
|
T36 |
31 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1259 |
1 |
|
|
T48 |
26 |
|
T36 |
45 |
|
T127 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T48 |
14 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1147 |
1 |
|
|
T48 |
19 |
|
T36 |
46 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T48 |
12 |
|
T36 |
31 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1223 |
1 |
|
|
T48 |
25 |
|
T36 |
43 |
|
T127 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T48 |
14 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1122 |
1 |
|
|
T48 |
18 |
|
T36 |
45 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T48 |
12 |
|
T36 |
31 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1186 |
1 |
|
|
T48 |
25 |
|
T36 |
42 |
|
T127 |
8 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
710 |
1 |
|
|
T48 |
14 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1093 |
1 |
|
|
T48 |
18 |
|
T36 |
44 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
664 |
1 |
|
|
T48 |
12 |
|
T36 |
31 |
|
T127 |
5 |
all_gpio_pins[15] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1157 |
1 |
|
|
T48 |
25 |
|
T36 |
42 |
|
T127 |
8 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51505 |
1 |
|
|
T48 |
914 |
|
T36 |
1469 |
|
T127 |
971 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[0] |
auto[1] |
50617 |
1 |
|
|
T48 |
810 |
|
T36 |
2360 |
|
T127 |
198 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[0] |
48820 |
1 |
|
|
T48 |
273 |
|
T36 |
1608 |
|
T127 |
336 |
all_gpio_pins[16] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44203 |
1 |
|
|
T48 |
1628 |
|
T36 |
1343 |
|
T127 |
358 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T48 |
9 |
|
T36 |
30 |
|
T127 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1696 |
1 |
|
|
T48 |
30 |
|
T36 |
60 |
|
T127 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T48 |
8 |
|
T36 |
31 |
|
T127 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1699 |
1 |
|
|
T48 |
32 |
|
T36 |
58 |
|
T127 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T48 |
9 |
|
T36 |
30 |
|
T127 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1654 |
1 |
|
|
T48 |
28 |
|
T36 |
57 |
|
T127 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T48 |
8 |
|
T36 |
31 |
|
T127 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1663 |
1 |
|
|
T48 |
32 |
|
T36 |
56 |
|
T127 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T48 |
9 |
|
T36 |
30 |
|
T127 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1630 |
1 |
|
|
T48 |
28 |
|
T36 |
57 |
|
T127 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T48 |
8 |
|
T36 |
31 |
|
T127 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1631 |
1 |
|
|
T48 |
32 |
|
T36 |
55 |
|
T127 |
15 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
649 |
1 |
|
|
T48 |
9 |
|
T36 |
30 |
|
T127 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1601 |
1 |
|
|
T48 |
28 |
|
T36 |
57 |
|
T127 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
647 |
1 |
|
|
T48 |
8 |
|
T36 |
31 |
|
T127 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1591 |
1 |
|
|
T48 |
31 |
|
T36 |
55 |
|
T127 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T48 |
9 |
|
T36 |
30 |
|
T127 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T48 |
27 |
|
T36 |
54 |
|
T127 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T48 |
7 |
|
T36 |
31 |
|
T127 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T48 |
32 |
|
T36 |
54 |
|
T127 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
647 |
1 |
|
|
T48 |
9 |
|
T36 |
30 |
|
T127 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1530 |
1 |
|
|
T48 |
27 |
|
T36 |
53 |
|
T127 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T48 |
7 |
|
T36 |
31 |
|
T127 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1524 |
1 |
|
|
T48 |
31 |
|
T36 |
54 |
|
T127 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T48 |
9 |
|
T36 |
30 |
|
T127 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1492 |
1 |
|
|
T48 |
26 |
|
T36 |
51 |
|
T127 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T48 |
7 |
|
T36 |
31 |
|
T127 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1499 |
1 |
|
|
T48 |
30 |
|
T36 |
54 |
|
T127 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
642 |
1 |
|
|
T48 |
9 |
|
T36 |
30 |
|
T127 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T48 |
25 |
|
T36 |
51 |
|
T127 |
11 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
638 |
1 |
|
|
T48 |
7 |
|
T36 |
31 |
|
T127 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T48 |
30 |
|
T36 |
53 |
|
T127 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T48 |
9 |
|
T36 |
30 |
|
T127 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T48 |
24 |
|
T36 |
49 |
|
T127 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T48 |
7 |
|
T36 |
31 |
|
T127 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1426 |
1 |
|
|
T48 |
27 |
|
T36 |
51 |
|
T127 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T48 |
9 |
|
T36 |
30 |
|
T127 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1385 |
1 |
|
|
T48 |
24 |
|
T36 |
47 |
|
T127 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T48 |
7 |
|
T36 |
31 |
|
T127 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1394 |
1 |
|
|
T48 |
26 |
|
T36 |
51 |
|
T127 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T48 |
9 |
|
T36 |
30 |
|
T127 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1357 |
1 |
|
|
T48 |
24 |
|
T36 |
47 |
|
T127 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T48 |
7 |
|
T36 |
31 |
|
T127 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1359 |
1 |
|
|
T48 |
25 |
|
T36 |
51 |
|
T127 |
14 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T48 |
9 |
|
T36 |
30 |
|
T127 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1332 |
1 |
|
|
T48 |
24 |
|
T36 |
47 |
|
T127 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T48 |
7 |
|
T36 |
31 |
|
T127 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1331 |
1 |
|
|
T48 |
24 |
|
T36 |
51 |
|
T127 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T48 |
9 |
|
T36 |
30 |
|
T127 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1299 |
1 |
|
|
T48 |
24 |
|
T36 |
45 |
|
T127 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T48 |
7 |
|
T36 |
31 |
|
T127 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1295 |
1 |
|
|
T48 |
23 |
|
T36 |
50 |
|
T127 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T48 |
9 |
|
T36 |
30 |
|
T127 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1265 |
1 |
|
|
T48 |
24 |
|
T36 |
42 |
|
T127 |
10 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T48 |
7 |
|
T36 |
31 |
|
T127 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T48 |
22 |
|
T36 |
50 |
|
T127 |
13 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
638 |
1 |
|
|
T48 |
9 |
|
T36 |
30 |
|
T127 |
6 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T48 |
23 |
|
T36 |
42 |
|
T127 |
8 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
632 |
1 |
|
|
T48 |
7 |
|
T36 |
31 |
|
T127 |
3 |
all_gpio_pins[16] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1224 |
1 |
|
|
T48 |
22 |
|
T36 |
48 |
|
T127 |
12 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50222 |
1 |
|
|
T48 |
670 |
|
T36 |
1741 |
|
T127 |
560 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45659 |
1 |
|
|
T48 |
429 |
|
T36 |
1229 |
|
T127 |
289 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57385 |
1 |
|
|
T48 |
1102 |
|
T36 |
1564 |
|
T127 |
829 |
all_gpio_pins[17] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44368 |
1 |
|
|
T48 |
1475 |
|
T36 |
2335 |
|
T127 |
261 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1583 |
1 |
|
|
T48 |
25 |
|
T36 |
65 |
|
T127 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T48 |
26 |
|
T36 |
65 |
|
T127 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1560 |
1 |
|
|
T48 |
25 |
|
T36 |
65 |
|
T127 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1531 |
1 |
|
|
T48 |
25 |
|
T36 |
65 |
|
T127 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1526 |
1 |
|
|
T48 |
23 |
|
T36 |
64 |
|
T127 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1495 |
1 |
|
|
T48 |
24 |
|
T36 |
63 |
|
T127 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1502 |
1 |
|
|
T48 |
21 |
|
T36 |
64 |
|
T127 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T48 |
24 |
|
T36 |
61 |
|
T127 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T48 |
21 |
|
T36 |
62 |
|
T127 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T48 |
23 |
|
T36 |
57 |
|
T127 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T48 |
21 |
|
T36 |
60 |
|
T127 |
11 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1410 |
1 |
|
|
T48 |
23 |
|
T36 |
57 |
|
T127 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T48 |
12 |
|
T36 |
22 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1413 |
1 |
|
|
T48 |
20 |
|
T36 |
60 |
|
T127 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1378 |
1 |
|
|
T48 |
23 |
|
T36 |
56 |
|
T127 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T48 |
12 |
|
T36 |
22 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T48 |
20 |
|
T36 |
58 |
|
T127 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1350 |
1 |
|
|
T48 |
23 |
|
T36 |
55 |
|
T127 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T48 |
12 |
|
T36 |
22 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1334 |
1 |
|
|
T48 |
19 |
|
T36 |
57 |
|
T127 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1322 |
1 |
|
|
T48 |
23 |
|
T36 |
53 |
|
T127 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T48 |
12 |
|
T36 |
22 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1307 |
1 |
|
|
T48 |
19 |
|
T36 |
56 |
|
T127 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
666 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1291 |
1 |
|
|
T48 |
22 |
|
T36 |
52 |
|
T127 |
13 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T48 |
12 |
|
T36 |
22 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T48 |
18 |
|
T36 |
53 |
|
T127 |
10 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1244 |
1 |
|
|
T48 |
22 |
|
T36 |
51 |
|
T127 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T48 |
12 |
|
T36 |
22 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T48 |
18 |
|
T36 |
51 |
|
T127 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1221 |
1 |
|
|
T48 |
22 |
|
T36 |
51 |
|
T127 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T48 |
12 |
|
T36 |
22 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1221 |
1 |
|
|
T48 |
18 |
|
T36 |
51 |
|
T127 |
9 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T48 |
22 |
|
T36 |
50 |
|
T127 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T48 |
12 |
|
T36 |
22 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T48 |
17 |
|
T36 |
47 |
|
T127 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1163 |
1 |
|
|
T48 |
22 |
|
T36 |
50 |
|
T127 |
12 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
639 |
1 |
|
|
T48 |
12 |
|
T36 |
22 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T48 |
15 |
|
T36 |
46 |
|
T127 |
7 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
3 |
all_gpio_pins[17] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1140 |
1 |
|
|
T48 |
21 |
|
T36 |
50 |
|
T127 |
12 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55566 |
1 |
|
|
T48 |
1134 |
|
T36 |
1482 |
|
T127 |
112 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47224 |
1 |
|
|
T48 |
1454 |
|
T36 |
1140 |
|
T127 |
328 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52851 |
1 |
|
|
T48 |
816 |
|
T36 |
2774 |
|
T127 |
1148 |
all_gpio_pins[18] |
filter_cycles_or_more |
auto[1] |
auto[1] |
41131 |
1 |
|
|
T48 |
371 |
|
T36 |
1606 |
|
T127 |
292 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T48 |
11 |
|
T36 |
26 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T48 |
22 |
|
T36 |
58 |
|
T127 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T48 |
12 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1581 |
1 |
|
|
T48 |
21 |
|
T36 |
60 |
|
T127 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T48 |
11 |
|
T36 |
26 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T48 |
22 |
|
T36 |
57 |
|
T127 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T48 |
12 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1551 |
1 |
|
|
T48 |
20 |
|
T36 |
60 |
|
T127 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T48 |
11 |
|
T36 |
26 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1519 |
1 |
|
|
T48 |
21 |
|
T36 |
56 |
|
T127 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T48 |
12 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T48 |
19 |
|
T36 |
59 |
|
T127 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T48 |
11 |
|
T36 |
26 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T48 |
21 |
|
T36 |
54 |
|
T127 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T48 |
12 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1485 |
1 |
|
|
T48 |
19 |
|
T36 |
57 |
|
T127 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T48 |
11 |
|
T36 |
26 |
|
T127 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1456 |
1 |
|
|
T48 |
21 |
|
T36 |
54 |
|
T127 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T48 |
12 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T48 |
19 |
|
T36 |
57 |
|
T127 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
676 |
1 |
|
|
T48 |
11 |
|
T36 |
26 |
|
T127 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1427 |
1 |
|
|
T48 |
20 |
|
T36 |
52 |
|
T127 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T48 |
12 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1435 |
1 |
|
|
T48 |
18 |
|
T36 |
55 |
|
T127 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T48 |
20 |
|
T36 |
52 |
|
T127 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T48 |
12 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1408 |
1 |
|
|
T48 |
17 |
|
T36 |
54 |
|
T127 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1372 |
1 |
|
|
T48 |
20 |
|
T36 |
52 |
|
T127 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
680 |
1 |
|
|
T48 |
12 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1380 |
1 |
|
|
T48 |
16 |
|
T36 |
51 |
|
T127 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1346 |
1 |
|
|
T48 |
20 |
|
T36 |
48 |
|
T127 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T48 |
12 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T48 |
16 |
|
T36 |
49 |
|
T127 |
12 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T48 |
20 |
|
T36 |
46 |
|
T127 |
13 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T48 |
12 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1316 |
1 |
|
|
T48 |
16 |
|
T36 |
47 |
|
T127 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T48 |
19 |
|
T36 |
45 |
|
T127 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T48 |
12 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1279 |
1 |
|
|
T48 |
16 |
|
T36 |
47 |
|
T127 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1252 |
1 |
|
|
T48 |
19 |
|
T36 |
44 |
|
T127 |
11 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T48 |
12 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1247 |
1 |
|
|
T48 |
16 |
|
T36 |
46 |
|
T127 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1210 |
1 |
|
|
T48 |
17 |
|
T36 |
39 |
|
T127 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T48 |
12 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1213 |
1 |
|
|
T48 |
16 |
|
T36 |
44 |
|
T127 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1181 |
1 |
|
|
T48 |
17 |
|
T36 |
37 |
|
T127 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T48 |
12 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1182 |
1 |
|
|
T48 |
16 |
|
T36 |
43 |
|
T127 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1163 |
1 |
|
|
T48 |
16 |
|
T36 |
37 |
|
T127 |
10 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T48 |
12 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[18] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T48 |
14 |
|
T36 |
42 |
|
T127 |
10 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[0] |
48491 |
1 |
|
|
T48 |
908 |
|
T36 |
1382 |
|
T127 |
462 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[0] |
auto[1] |
47673 |
1 |
|
|
T48 |
1518 |
|
T36 |
1705 |
|
T127 |
967 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52450 |
1 |
|
|
T48 |
879 |
|
T36 |
1312 |
|
T127 |
182 |
all_gpio_pins[19] |
filter_cycles_or_more |
auto[1] |
auto[1] |
47175 |
1 |
|
|
T48 |
487 |
|
T36 |
2384 |
|
T127 |
238 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T48 |
14 |
|
T36 |
21 |
|
T127 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1642 |
1 |
|
|
T48 |
18 |
|
T36 |
68 |
|
T127 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T48 |
13 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T48 |
19 |
|
T36 |
62 |
|
T127 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T48 |
14 |
|
T36 |
21 |
|
T127 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1617 |
1 |
|
|
T48 |
17 |
|
T36 |
68 |
|
T127 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
670 |
1 |
|
|
T48 |
13 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T48 |
18 |
|
T36 |
59 |
|
T127 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T48 |
14 |
|
T36 |
20 |
|
T127 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1591 |
1 |
|
|
T48 |
17 |
|
T36 |
68 |
|
T127 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T48 |
13 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1578 |
1 |
|
|
T48 |
18 |
|
T36 |
58 |
|
T127 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T48 |
14 |
|
T36 |
20 |
|
T127 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T48 |
16 |
|
T36 |
67 |
|
T127 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T48 |
13 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T48 |
18 |
|
T36 |
57 |
|
T127 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T48 |
14 |
|
T36 |
20 |
|
T127 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1527 |
1 |
|
|
T48 |
16 |
|
T36 |
67 |
|
T127 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T48 |
19 |
|
T36 |
55 |
|
T127 |
15 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
658 |
1 |
|
|
T48 |
14 |
|
T36 |
20 |
|
T127 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T48 |
16 |
|
T36 |
66 |
|
T127 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
665 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T48 |
19 |
|
T36 |
55 |
|
T127 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T48 |
14 |
|
T36 |
20 |
|
T127 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1452 |
1 |
|
|
T48 |
15 |
|
T36 |
66 |
|
T127 |
11 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T48 |
19 |
|
T36 |
54 |
|
T127 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T48 |
14 |
|
T36 |
20 |
|
T127 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1417 |
1 |
|
|
T48 |
15 |
|
T36 |
64 |
|
T127 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T48 |
18 |
|
T36 |
54 |
|
T127 |
14 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T48 |
14 |
|
T36 |
20 |
|
T127 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1387 |
1 |
|
|
T48 |
14 |
|
T36 |
62 |
|
T127 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1395 |
1 |
|
|
T48 |
17 |
|
T36 |
54 |
|
T127 |
13 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
653 |
1 |
|
|
T48 |
14 |
|
T36 |
20 |
|
T127 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1349 |
1 |
|
|
T48 |
14 |
|
T36 |
62 |
|
T127 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
657 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1361 |
1 |
|
|
T48 |
17 |
|
T36 |
53 |
|
T127 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T48 |
14 |
|
T36 |
20 |
|
T127 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1331 |
1 |
|
|
T48 |
14 |
|
T36 |
61 |
|
T127 |
10 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1332 |
1 |
|
|
T48 |
17 |
|
T36 |
51 |
|
T127 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T48 |
14 |
|
T36 |
20 |
|
T127 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1297 |
1 |
|
|
T48 |
13 |
|
T36 |
59 |
|
T127 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
652 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1299 |
1 |
|
|
T48 |
17 |
|
T36 |
49 |
|
T127 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T48 |
14 |
|
T36 |
20 |
|
T127 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T48 |
13 |
|
T36 |
59 |
|
T127 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T48 |
16 |
|
T36 |
48 |
|
T127 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T48 |
14 |
|
T36 |
20 |
|
T127 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1230 |
1 |
|
|
T48 |
13 |
|
T36 |
58 |
|
T127 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T48 |
16 |
|
T36 |
48 |
|
T127 |
12 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T48 |
14 |
|
T36 |
20 |
|
T127 |
7 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1192 |
1 |
|
|
T48 |
13 |
|
T36 |
58 |
|
T127 |
9 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
651 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[19] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T48 |
16 |
|
T36 |
45 |
|
T127 |
10 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[0] |
58967 |
1 |
|
|
T48 |
816 |
|
T36 |
2910 |
|
T127 |
1174 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43692 |
1 |
|
|
T48 |
572 |
|
T36 |
1070 |
|
T127 |
220 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[0] |
48519 |
1 |
|
|
T48 |
1735 |
|
T36 |
1748 |
|
T127 |
393 |
all_gpio_pins[20] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44034 |
1 |
|
|
T48 |
517 |
|
T36 |
1237 |
|
T127 |
160 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
12 |
|
T36 |
28 |
|
T127 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1665 |
1 |
|
|
T48 |
27 |
|
T36 |
55 |
|
T127 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T48 |
12 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1638 |
1 |
|
|
T48 |
28 |
|
T36 |
56 |
|
T127 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
12 |
|
T36 |
28 |
|
T127 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1633 |
1 |
|
|
T48 |
26 |
|
T36 |
54 |
|
T127 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T48 |
12 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1607 |
1 |
|
|
T48 |
28 |
|
T36 |
56 |
|
T127 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1610 |
1 |
|
|
T48 |
25 |
|
T36 |
54 |
|
T127 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
12 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1579 |
1 |
|
|
T48 |
25 |
|
T36 |
55 |
|
T127 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
668 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1568 |
1 |
|
|
T48 |
25 |
|
T36 |
54 |
|
T127 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
12 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1547 |
1 |
|
|
T48 |
25 |
|
T36 |
54 |
|
T127 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1534 |
1 |
|
|
T48 |
23 |
|
T36 |
54 |
|
T127 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
12 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T48 |
25 |
|
T36 |
54 |
|
T127 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
666 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1493 |
1 |
|
|
T48 |
23 |
|
T36 |
50 |
|
T127 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
12 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T48 |
24 |
|
T36 |
51 |
|
T127 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1458 |
1 |
|
|
T48 |
23 |
|
T36 |
49 |
|
T127 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T48 |
12 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1454 |
1 |
|
|
T48 |
24 |
|
T36 |
50 |
|
T127 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T48 |
23 |
|
T36 |
48 |
|
T127 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T48 |
12 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1421 |
1 |
|
|
T48 |
23 |
|
T36 |
50 |
|
T127 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1398 |
1 |
|
|
T48 |
23 |
|
T36 |
47 |
|
T127 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
12 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1391 |
1 |
|
|
T48 |
21 |
|
T36 |
50 |
|
T127 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
659 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1359 |
1 |
|
|
T48 |
22 |
|
T36 |
47 |
|
T127 |
9 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
682 |
1 |
|
|
T48 |
12 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1358 |
1 |
|
|
T48 |
21 |
|
T36 |
50 |
|
T127 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1325 |
1 |
|
|
T48 |
22 |
|
T36 |
44 |
|
T127 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T48 |
12 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1326 |
1 |
|
|
T48 |
18 |
|
T36 |
49 |
|
T127 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T48 |
21 |
|
T36 |
42 |
|
T127 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
679 |
1 |
|
|
T48 |
12 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1297 |
1 |
|
|
T48 |
18 |
|
T36 |
49 |
|
T127 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1260 |
1 |
|
|
T48 |
21 |
|
T36 |
41 |
|
T127 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T48 |
12 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T48 |
18 |
|
T36 |
48 |
|
T127 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1233 |
1 |
|
|
T48 |
19 |
|
T36 |
40 |
|
T127 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T48 |
12 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1229 |
1 |
|
|
T48 |
18 |
|
T36 |
47 |
|
T127 |
5 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T48 |
12 |
|
T36 |
27 |
|
T127 |
7 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1202 |
1 |
|
|
T48 |
18 |
|
T36 |
39 |
|
T127 |
8 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
678 |
1 |
|
|
T48 |
12 |
|
T36 |
26 |
|
T127 |
6 |
all_gpio_pins[20] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1196 |
1 |
|
|
T48 |
17 |
|
T36 |
46 |
|
T127 |
5 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55549 |
1 |
|
|
T48 |
1075 |
|
T36 |
2904 |
|
T127 |
366 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41369 |
1 |
|
|
T48 |
397 |
|
T36 |
1071 |
|
T127 |
975 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[0] |
52185 |
1 |
|
|
T48 |
956 |
|
T36 |
1828 |
|
T127 |
376 |
all_gpio_pins[21] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46122 |
1 |
|
|
T48 |
1452 |
|
T36 |
1324 |
|
T127 |
143 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1624 |
1 |
|
|
T48 |
19 |
|
T36 |
54 |
|
T127 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1613 |
1 |
|
|
T48 |
20 |
|
T36 |
55 |
|
T127 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1581 |
1 |
|
|
T48 |
18 |
|
T36 |
51 |
|
T127 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1588 |
1 |
|
|
T48 |
20 |
|
T36 |
55 |
|
T127 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T48 |
18 |
|
T36 |
49 |
|
T127 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T48 |
17 |
|
T36 |
54 |
|
T127 |
12 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
697 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1523 |
1 |
|
|
T48 |
18 |
|
T36 |
47 |
|
T127 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1528 |
1 |
|
|
T48 |
16 |
|
T36 |
54 |
|
T127 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1490 |
1 |
|
|
T48 |
18 |
|
T36 |
47 |
|
T127 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1510 |
1 |
|
|
T48 |
15 |
|
T36 |
54 |
|
T127 |
11 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
694 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T48 |
17 |
|
T36 |
45 |
|
T127 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1478 |
1 |
|
|
T48 |
15 |
|
T36 |
52 |
|
T127 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T48 |
17 |
|
T36 |
45 |
|
T127 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1446 |
1 |
|
|
T48 |
14 |
|
T36 |
50 |
|
T127 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1391 |
1 |
|
|
T48 |
17 |
|
T36 |
42 |
|
T127 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1422 |
1 |
|
|
T48 |
13 |
|
T36 |
50 |
|
T127 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1360 |
1 |
|
|
T48 |
16 |
|
T36 |
42 |
|
T127 |
10 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T48 |
13 |
|
T36 |
48 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1335 |
1 |
|
|
T48 |
16 |
|
T36 |
42 |
|
T127 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1354 |
1 |
|
|
T48 |
12 |
|
T36 |
46 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1294 |
1 |
|
|
T48 |
15 |
|
T36 |
39 |
|
T127 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T48 |
12 |
|
T36 |
45 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T48 |
15 |
|
T36 |
38 |
|
T127 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
694 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T48 |
12 |
|
T36 |
45 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T48 |
15 |
|
T36 |
38 |
|
T127 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1258 |
1 |
|
|
T48 |
12 |
|
T36 |
45 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1208 |
1 |
|
|
T48 |
15 |
|
T36 |
38 |
|
T127 |
9 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T48 |
12 |
|
T36 |
45 |
|
T127 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
687 |
1 |
|
|
T48 |
11 |
|
T36 |
25 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1176 |
1 |
|
|
T48 |
15 |
|
T36 |
38 |
|
T127 |
8 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T48 |
11 |
|
T36 |
23 |
|
T127 |
7 |
all_gpio_pins[21] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1193 |
1 |
|
|
T48 |
12 |
|
T36 |
45 |
|
T127 |
7 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55443 |
1 |
|
|
T48 |
673 |
|
T36 |
1126 |
|
T127 |
382 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40985 |
1 |
|
|
T48 |
425 |
|
T36 |
2645 |
|
T127 |
895 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50723 |
1 |
|
|
T48 |
927 |
|
T36 |
1203 |
|
T127 |
546 |
all_gpio_pins[22] |
filter_cycles_or_more |
auto[1] |
auto[1] |
49713 |
1 |
|
|
T48 |
1664 |
|
T36 |
1793 |
|
T127 |
173 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T48 |
10 |
|
T36 |
19 |
|
T127 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1604 |
1 |
|
|
T48 |
27 |
|
T36 |
74 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T48 |
10 |
|
T36 |
17 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1622 |
1 |
|
|
T48 |
28 |
|
T36 |
75 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
655 |
1 |
|
|
T48 |
10 |
|
T36 |
19 |
|
T127 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1571 |
1 |
|
|
T48 |
26 |
|
T36 |
72 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T48 |
10 |
|
T36 |
17 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1600 |
1 |
|
|
T48 |
27 |
|
T36 |
73 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T48 |
10 |
|
T36 |
18 |
|
T127 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1544 |
1 |
|
|
T48 |
26 |
|
T36 |
71 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T48 |
10 |
|
T36 |
17 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1572 |
1 |
|
|
T48 |
26 |
|
T36 |
72 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T48 |
10 |
|
T36 |
18 |
|
T127 |
8 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1511 |
1 |
|
|
T48 |
24 |
|
T36 |
70 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T48 |
10 |
|
T36 |
17 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1538 |
1 |
|
|
T48 |
25 |
|
T36 |
71 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T48 |
10 |
|
T36 |
18 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1480 |
1 |
|
|
T48 |
23 |
|
T36 |
69 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T48 |
9 |
|
T36 |
17 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1515 |
1 |
|
|
T48 |
26 |
|
T36 |
70 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
650 |
1 |
|
|
T48 |
10 |
|
T36 |
18 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1459 |
1 |
|
|
T48 |
23 |
|
T36 |
68 |
|
T127 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
634 |
1 |
|
|
T48 |
9 |
|
T36 |
17 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T48 |
26 |
|
T36 |
69 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T48 |
10 |
|
T36 |
18 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1422 |
1 |
|
|
T48 |
20 |
|
T36 |
67 |
|
T127 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T48 |
9 |
|
T36 |
17 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1452 |
1 |
|
|
T48 |
26 |
|
T36 |
68 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
646 |
1 |
|
|
T48 |
10 |
|
T36 |
18 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1400 |
1 |
|
|
T48 |
20 |
|
T36 |
64 |
|
T127 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
631 |
1 |
|
|
T48 |
9 |
|
T36 |
17 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T48 |
26 |
|
T36 |
68 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T48 |
10 |
|
T36 |
18 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1368 |
1 |
|
|
T48 |
19 |
|
T36 |
61 |
|
T127 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T48 |
9 |
|
T36 |
17 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T48 |
26 |
|
T36 |
65 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
643 |
1 |
|
|
T48 |
10 |
|
T36 |
18 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1327 |
1 |
|
|
T48 |
18 |
|
T36 |
60 |
|
T127 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
626 |
1 |
|
|
T48 |
9 |
|
T36 |
17 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1371 |
1 |
|
|
T48 |
26 |
|
T36 |
63 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T48 |
10 |
|
T36 |
18 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1289 |
1 |
|
|
T48 |
17 |
|
T36 |
57 |
|
T127 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T48 |
9 |
|
T36 |
17 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1339 |
1 |
|
|
T48 |
26 |
|
T36 |
63 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T48 |
10 |
|
T36 |
18 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1261 |
1 |
|
|
T48 |
16 |
|
T36 |
56 |
|
T127 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T48 |
9 |
|
T36 |
17 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1312 |
1 |
|
|
T48 |
26 |
|
T36 |
62 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T48 |
10 |
|
T36 |
18 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T48 |
15 |
|
T36 |
56 |
|
T127 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T48 |
9 |
|
T36 |
17 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1283 |
1 |
|
|
T48 |
26 |
|
T36 |
61 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T48 |
10 |
|
T36 |
18 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T48 |
15 |
|
T36 |
54 |
|
T127 |
5 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T48 |
9 |
|
T36 |
17 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1246 |
1 |
|
|
T48 |
26 |
|
T36 |
61 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
640 |
1 |
|
|
T48 |
10 |
|
T36 |
18 |
|
T127 |
7 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1145 |
1 |
|
|
T48 |
15 |
|
T36 |
53 |
|
T127 |
4 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
624 |
1 |
|
|
T48 |
9 |
|
T36 |
17 |
|
T127 |
6 |
all_gpio_pins[22] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1216 |
1 |
|
|
T48 |
26 |
|
T36 |
58 |
|
T127 |
6 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[0] |
50490 |
1 |
|
|
T48 |
878 |
|
T36 |
1654 |
|
T127 |
317 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44649 |
1 |
|
|
T48 |
415 |
|
T36 |
2202 |
|
T127 |
1084 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53710 |
1 |
|
|
T48 |
864 |
|
T36 |
1586 |
|
T127 |
287 |
all_gpio_pins[23] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46022 |
1 |
|
|
T48 |
1516 |
|
T36 |
1421 |
|
T127 |
175 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T48 |
16 |
|
T36 |
25 |
|
T127 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1625 |
1 |
|
|
T48 |
19 |
|
T36 |
63 |
|
T127 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T48 |
15 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1636 |
1 |
|
|
T48 |
21 |
|
T36 |
63 |
|
T127 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
714 |
1 |
|
|
T48 |
16 |
|
T36 |
25 |
|
T127 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1594 |
1 |
|
|
T48 |
19 |
|
T36 |
63 |
|
T127 |
13 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
709 |
1 |
|
|
T48 |
15 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1601 |
1 |
|
|
T48 |
21 |
|
T36 |
61 |
|
T127 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T48 |
16 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1566 |
1 |
|
|
T48 |
19 |
|
T36 |
61 |
|
T127 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T48 |
15 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T48 |
20 |
|
T36 |
61 |
|
T127 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T48 |
16 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T48 |
18 |
|
T36 |
61 |
|
T127 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
708 |
1 |
|
|
T48 |
15 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1539 |
1 |
|
|
T48 |
20 |
|
T36 |
58 |
|
T127 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T48 |
16 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1501 |
1 |
|
|
T48 |
18 |
|
T36 |
60 |
|
T127 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1518 |
1 |
|
|
T48 |
21 |
|
T36 |
58 |
|
T127 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T48 |
16 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1466 |
1 |
|
|
T48 |
16 |
|
T36 |
60 |
|
T127 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1492 |
1 |
|
|
T48 |
21 |
|
T36 |
57 |
|
T127 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T48 |
16 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1438 |
1 |
|
|
T48 |
16 |
|
T36 |
59 |
|
T127 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1457 |
1 |
|
|
T48 |
21 |
|
T36 |
56 |
|
T127 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T48 |
16 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T48 |
16 |
|
T36 |
56 |
|
T127 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1416 |
1 |
|
|
T48 |
21 |
|
T36 |
54 |
|
T127 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T48 |
16 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T48 |
16 |
|
T36 |
56 |
|
T127 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1382 |
1 |
|
|
T48 |
20 |
|
T36 |
54 |
|
T127 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
704 |
1 |
|
|
T48 |
16 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T48 |
16 |
|
T36 |
56 |
|
T127 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
693 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1334 |
1 |
|
|
T48 |
19 |
|
T36 |
52 |
|
T127 |
9 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T48 |
16 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1314 |
1 |
|
|
T48 |
16 |
|
T36 |
55 |
|
T127 |
12 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T48 |
19 |
|
T36 |
52 |
|
T127 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T48 |
16 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T48 |
16 |
|
T36 |
52 |
|
T127 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1256 |
1 |
|
|
T48 |
19 |
|
T36 |
50 |
|
T127 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T48 |
16 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T48 |
15 |
|
T36 |
48 |
|
T127 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1226 |
1 |
|
|
T48 |
19 |
|
T36 |
49 |
|
T127 |
7 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T48 |
16 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T48 |
15 |
|
T36 |
47 |
|
T127 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1196 |
1 |
|
|
T48 |
18 |
|
T36 |
48 |
|
T127 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
700 |
1 |
|
|
T48 |
16 |
|
T36 |
24 |
|
T127 |
6 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1191 |
1 |
|
|
T48 |
14 |
|
T36 |
44 |
|
T127 |
10 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T48 |
14 |
|
T36 |
24 |
|
T127 |
8 |
all_gpio_pins[23] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1167 |
1 |
|
|
T48 |
18 |
|
T36 |
46 |
|
T127 |
6 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[0] |
55028 |
1 |
|
|
T48 |
596 |
|
T36 |
3124 |
|
T127 |
913 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44483 |
1 |
|
|
T48 |
1620 |
|
T36 |
1117 |
|
T127 |
243 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53593 |
1 |
|
|
T48 |
532 |
|
T36 |
1327 |
|
T127 |
256 |
all_gpio_pins[24] |
filter_cycles_or_more |
auto[1] |
auto[1] |
44533 |
1 |
|
|
T48 |
776 |
|
T36 |
1342 |
|
T127 |
418 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T48 |
9 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1558 |
1 |
|
|
T48 |
34 |
|
T36 |
59 |
|
T127 |
17 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T48 |
7 |
|
T36 |
23 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1564 |
1 |
|
|
T48 |
36 |
|
T36 |
62 |
|
T127 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
679 |
1 |
|
|
T48 |
9 |
|
T36 |
27 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1521 |
1 |
|
|
T48 |
33 |
|
T36 |
57 |
|
T127 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
677 |
1 |
|
|
T48 |
7 |
|
T36 |
23 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1521 |
1 |
|
|
T48 |
35 |
|
T36 |
61 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T48 |
9 |
|
T36 |
26 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1488 |
1 |
|
|
T48 |
33 |
|
T36 |
55 |
|
T127 |
16 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T48 |
7 |
|
T36 |
23 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1490 |
1 |
|
|
T48 |
35 |
|
T36 |
61 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T48 |
9 |
|
T36 |
26 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1463 |
1 |
|
|
T48 |
33 |
|
T36 |
55 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
676 |
1 |
|
|
T48 |
7 |
|
T36 |
23 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1463 |
1 |
|
|
T48 |
35 |
|
T36 |
59 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T48 |
9 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T48 |
33 |
|
T36 |
55 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T48 |
7 |
|
T36 |
23 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1436 |
1 |
|
|
T48 |
33 |
|
T36 |
59 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
673 |
1 |
|
|
T48 |
9 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T48 |
33 |
|
T36 |
55 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T48 |
7 |
|
T36 |
23 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1409 |
1 |
|
|
T48 |
32 |
|
T36 |
58 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
9 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1381 |
1 |
|
|
T48 |
32 |
|
T36 |
54 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T48 |
7 |
|
T36 |
23 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1384 |
1 |
|
|
T48 |
32 |
|
T36 |
58 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
9 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1352 |
1 |
|
|
T48 |
32 |
|
T36 |
53 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
667 |
1 |
|
|
T48 |
7 |
|
T36 |
23 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T48 |
32 |
|
T36 |
54 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T48 |
9 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1322 |
1 |
|
|
T48 |
32 |
|
T36 |
53 |
|
T127 |
14 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T48 |
7 |
|
T36 |
23 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1329 |
1 |
|
|
T48 |
32 |
|
T36 |
54 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T48 |
9 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1292 |
1 |
|
|
T48 |
31 |
|
T36 |
50 |
|
T127 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
662 |
1 |
|
|
T48 |
7 |
|
T36 |
23 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1292 |
1 |
|
|
T48 |
29 |
|
T36 |
52 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T48 |
9 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T48 |
28 |
|
T36 |
48 |
|
T127 |
13 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T48 |
7 |
|
T36 |
23 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T48 |
27 |
|
T36 |
51 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T48 |
9 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1234 |
1 |
|
|
T48 |
26 |
|
T36 |
48 |
|
T127 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T48 |
7 |
|
T36 |
23 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T48 |
26 |
|
T36 |
49 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T48 |
9 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1198 |
1 |
|
|
T48 |
26 |
|
T36 |
47 |
|
T127 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T48 |
7 |
|
T36 |
23 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1209 |
1 |
|
|
T48 |
25 |
|
T36 |
49 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T48 |
9 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1172 |
1 |
|
|
T48 |
26 |
|
T36 |
43 |
|
T127 |
12 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T48 |
7 |
|
T36 |
23 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1166 |
1 |
|
|
T48 |
22 |
|
T36 |
49 |
|
T127 |
15 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
665 |
1 |
|
|
T48 |
9 |
|
T36 |
26 |
|
T127 |
3 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1140 |
1 |
|
|
T48 |
25 |
|
T36 |
42 |
|
T127 |
10 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
661 |
1 |
|
|
T48 |
7 |
|
T36 |
23 |
|
T127 |
4 |
all_gpio_pins[24] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1139 |
1 |
|
|
T48 |
22 |
|
T36 |
48 |
|
T127 |
14 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[0] |
54862 |
1 |
|
|
T48 |
659 |
|
T36 |
2022 |
|
T127 |
645 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[0] |
auto[1] |
43439 |
1 |
|
|
T48 |
1678 |
|
T36 |
1249 |
|
T127 |
966 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[0] |
57964 |
1 |
|
|
T48 |
848 |
|
T36 |
1796 |
|
T127 |
148 |
all_gpio_pins[25] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40970 |
1 |
|
|
T48 |
448 |
|
T36 |
2128 |
|
T127 |
199 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T48 |
32 |
|
T36 |
51 |
|
T127 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T48 |
10 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1587 |
1 |
|
|
T48 |
30 |
|
T36 |
50 |
|
T127 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
663 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1554 |
1 |
|
|
T48 |
30 |
|
T36 |
50 |
|
T127 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
672 |
1 |
|
|
T48 |
10 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1553 |
1 |
|
|
T48 |
30 |
|
T36 |
49 |
|
T127 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T48 |
29 |
|
T36 |
48 |
|
T127 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T48 |
10 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1522 |
1 |
|
|
T48 |
29 |
|
T36 |
48 |
|
T127 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
662 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T48 |
29 |
|
T36 |
46 |
|
T127 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
671 |
1 |
|
|
T48 |
10 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T48 |
28 |
|
T36 |
48 |
|
T127 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1455 |
1 |
|
|
T48 |
29 |
|
T36 |
45 |
|
T127 |
12 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T48 |
9 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1460 |
1 |
|
|
T48 |
29 |
|
T36 |
48 |
|
T127 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
660 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1424 |
1 |
|
|
T48 |
28 |
|
T36 |
44 |
|
T127 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
669 |
1 |
|
|
T48 |
9 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1429 |
1 |
|
|
T48 |
26 |
|
T36 |
47 |
|
T127 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1394 |
1 |
|
|
T48 |
28 |
|
T36 |
44 |
|
T127 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T48 |
9 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1403 |
1 |
|
|
T48 |
26 |
|
T36 |
45 |
|
T127 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
656 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1369 |
1 |
|
|
T48 |
28 |
|
T36 |
42 |
|
T127 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
663 |
1 |
|
|
T48 |
9 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T48 |
26 |
|
T36 |
45 |
|
T127 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T48 |
27 |
|
T36 |
42 |
|
T127 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T48 |
9 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1349 |
1 |
|
|
T48 |
24 |
|
T36 |
43 |
|
T127 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
654 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T48 |
27 |
|
T36 |
41 |
|
T127 |
10 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
658 |
1 |
|
|
T48 |
9 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T48 |
23 |
|
T36 |
43 |
|
T127 |
8 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1271 |
1 |
|
|
T48 |
27 |
|
T36 |
40 |
|
T127 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T48 |
9 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1287 |
1 |
|
|
T48 |
22 |
|
T36 |
43 |
|
T127 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1244 |
1 |
|
|
T48 |
26 |
|
T36 |
39 |
|
T127 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
656 |
1 |
|
|
T48 |
9 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1264 |
1 |
|
|
T48 |
20 |
|
T36 |
42 |
|
T127 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1216 |
1 |
|
|
T48 |
26 |
|
T36 |
38 |
|
T127 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T48 |
9 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1227 |
1 |
|
|
T48 |
18 |
|
T36 |
42 |
|
T127 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1187 |
1 |
|
|
T48 |
25 |
|
T36 |
34 |
|
T127 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T48 |
9 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1204 |
1 |
|
|
T48 |
18 |
|
T36 |
42 |
|
T127 |
7 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
652 |
1 |
|
|
T48 |
8 |
|
T36 |
24 |
|
T127 |
5 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1151 |
1 |
|
|
T48 |
24 |
|
T36 |
34 |
|
T127 |
9 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T48 |
9 |
|
T36 |
25 |
|
T127 |
4 |
all_gpio_pins[25] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1173 |
1 |
|
|
T48 |
18 |
|
T36 |
42 |
|
T127 |
7 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[0] |
57235 |
1 |
|
|
T48 |
850 |
|
T36 |
2381 |
|
T127 |
539 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[0] |
auto[1] |
41985 |
1 |
|
|
T48 |
502 |
|
T36 |
973 |
|
T127 |
932 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[0] |
56469 |
1 |
|
|
T48 |
1659 |
|
T36 |
1521 |
|
T127 |
319 |
all_gpio_pins[26] |
filter_cycles_or_more |
auto[1] |
auto[1] |
40830 |
1 |
|
|
T48 |
602 |
|
T36 |
2061 |
|
T127 |
119 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T48 |
12 |
|
T36 |
35 |
|
T127 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1570 |
1 |
|
|
T48 |
26 |
|
T36 |
49 |
|
T127 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T48 |
12 |
|
T36 |
29 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1567 |
1 |
|
|
T48 |
27 |
|
T36 |
55 |
|
T127 |
9 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T48 |
12 |
|
T36 |
35 |
|
T127 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1543 |
1 |
|
|
T48 |
25 |
|
T36 |
49 |
|
T127 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T48 |
12 |
|
T36 |
29 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1545 |
1 |
|
|
T48 |
27 |
|
T36 |
54 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T48 |
12 |
|
T36 |
35 |
|
T127 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1514 |
1 |
|
|
T48 |
24 |
|
T36 |
48 |
|
T127 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T48 |
12 |
|
T36 |
29 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T48 |
27 |
|
T36 |
53 |
|
T127 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T48 |
12 |
|
T36 |
35 |
|
T127 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1482 |
1 |
|
|
T48 |
24 |
|
T36 |
47 |
|
T127 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T48 |
12 |
|
T36 |
29 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T48 |
27 |
|
T36 |
52 |
|
T127 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T48 |
12 |
|
T36 |
35 |
|
T127 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1461 |
1 |
|
|
T48 |
24 |
|
T36 |
45 |
|
T127 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T48 |
26 |
|
T36 |
50 |
|
T127 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T48 |
12 |
|
T36 |
35 |
|
T127 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1443 |
1 |
|
|
T48 |
24 |
|
T36 |
45 |
|
T127 |
12 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
698 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T48 |
26 |
|
T36 |
49 |
|
T127 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T48 |
12 |
|
T36 |
34 |
|
T127 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T48 |
24 |
|
T36 |
44 |
|
T127 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1405 |
1 |
|
|
T48 |
25 |
|
T36 |
48 |
|
T127 |
7 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
691 |
1 |
|
|
T48 |
12 |
|
T36 |
34 |
|
T127 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1366 |
1 |
|
|
T48 |
24 |
|
T36 |
43 |
|
T127 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
692 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1373 |
1 |
|
|
T48 |
24 |
|
T36 |
48 |
|
T127 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T48 |
12 |
|
T36 |
34 |
|
T127 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1330 |
1 |
|
|
T48 |
24 |
|
T36 |
42 |
|
T127 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1335 |
1 |
|
|
T48 |
23 |
|
T36 |
47 |
|
T127 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T48 |
12 |
|
T36 |
34 |
|
T127 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1304 |
1 |
|
|
T48 |
23 |
|
T36 |
42 |
|
T127 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1301 |
1 |
|
|
T48 |
23 |
|
T36 |
45 |
|
T127 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T48 |
12 |
|
T36 |
34 |
|
T127 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1276 |
1 |
|
|
T48 |
23 |
|
T36 |
41 |
|
T127 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1268 |
1 |
|
|
T48 |
23 |
|
T36 |
43 |
|
T127 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T48 |
12 |
|
T36 |
34 |
|
T127 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1248 |
1 |
|
|
T48 |
23 |
|
T36 |
41 |
|
T127 |
11 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1233 |
1 |
|
|
T48 |
23 |
|
T36 |
43 |
|
T127 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T48 |
12 |
|
T36 |
34 |
|
T127 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1203 |
1 |
|
|
T48 |
20 |
|
T36 |
39 |
|
T127 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T48 |
23 |
|
T36 |
42 |
|
T127 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T48 |
12 |
|
T36 |
34 |
|
T127 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1177 |
1 |
|
|
T48 |
20 |
|
T36 |
39 |
|
T127 |
10 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1171 |
1 |
|
|
T48 |
21 |
|
T36 |
39 |
|
T127 |
6 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T48 |
12 |
|
T36 |
34 |
|
T127 |
5 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1143 |
1 |
|
|
T48 |
18 |
|
T36 |
38 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
686 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
8 |
all_gpio_pins[26] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1145 |
1 |
|
|
T48 |
21 |
|
T36 |
38 |
|
T127 |
6 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53341 |
1 |
|
|
T48 |
1861 |
|
T36 |
1689 |
|
T127 |
1086 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[0] |
auto[1] |
42467 |
1 |
|
|
T48 |
473 |
|
T36 |
1156 |
|
T127 |
299 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[0] |
58463 |
1 |
|
|
T48 |
684 |
|
T36 |
2096 |
|
T127 |
379 |
all_gpio_pins[27] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42579 |
1 |
|
|
T48 |
592 |
|
T36 |
2097 |
|
T127 |
152 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1578 |
1 |
|
|
T48 |
29 |
|
T36 |
51 |
|
T127 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
10 |
|
T36 |
34 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1558 |
1 |
|
|
T48 |
30 |
|
T36 |
46 |
|
T127 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
681 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1550 |
1 |
|
|
T48 |
29 |
|
T36 |
48 |
|
T127 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
10 |
|
T36 |
34 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1530 |
1 |
|
|
T48 |
30 |
|
T36 |
45 |
|
T127 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1529 |
1 |
|
|
T48 |
28 |
|
T36 |
47 |
|
T127 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
10 |
|
T36 |
34 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1497 |
1 |
|
|
T48 |
30 |
|
T36 |
45 |
|
T127 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
680 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
5 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1506 |
1 |
|
|
T48 |
26 |
|
T36 |
45 |
|
T127 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
10 |
|
T36 |
34 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1465 |
1 |
|
|
T48 |
29 |
|
T36 |
45 |
|
T127 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1485 |
1 |
|
|
T48 |
26 |
|
T36 |
45 |
|
T127 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T48 |
10 |
|
T36 |
34 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1441 |
1 |
|
|
T48 |
28 |
|
T36 |
45 |
|
T127 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
675 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T48 |
22 |
|
T36 |
44 |
|
T127 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
701 |
1 |
|
|
T48 |
10 |
|
T36 |
34 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1411 |
1 |
|
|
T48 |
27 |
|
T36 |
45 |
|
T127 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
11 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1421 |
1 |
|
|
T48 |
22 |
|
T36 |
42 |
|
T127 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T48 |
10 |
|
T36 |
34 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1389 |
1 |
|
|
T48 |
27 |
|
T36 |
44 |
|
T127 |
11 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
670 |
1 |
|
|
T48 |
11 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1388 |
1 |
|
|
T48 |
21 |
|
T36 |
42 |
|
T127 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
696 |
1 |
|
|
T48 |
10 |
|
T36 |
34 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1347 |
1 |
|
|
T48 |
27 |
|
T36 |
43 |
|
T127 |
10 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T48 |
11 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1356 |
1 |
|
|
T48 |
21 |
|
T36 |
42 |
|
T127 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T48 |
10 |
|
T36 |
34 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1315 |
1 |
|
|
T48 |
27 |
|
T36 |
42 |
|
T127 |
9 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
667 |
1 |
|
|
T48 |
11 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T48 |
21 |
|
T36 |
42 |
|
T127 |
13 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
688 |
1 |
|
|
T48 |
10 |
|
T36 |
34 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1276 |
1 |
|
|
T48 |
26 |
|
T36 |
42 |
|
T127 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T48 |
11 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1291 |
1 |
|
|
T48 |
21 |
|
T36 |
42 |
|
T127 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T48 |
10 |
|
T36 |
34 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1234 |
1 |
|
|
T48 |
25 |
|
T36 |
40 |
|
T127 |
8 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T48 |
11 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1264 |
1 |
|
|
T48 |
21 |
|
T36 |
41 |
|
T127 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
685 |
1 |
|
|
T48 |
10 |
|
T36 |
34 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1195 |
1 |
|
|
T48 |
24 |
|
T36 |
38 |
|
T127 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T48 |
11 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1240 |
1 |
|
|
T48 |
21 |
|
T36 |
38 |
|
T127 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T48 |
10 |
|
T36 |
34 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1169 |
1 |
|
|
T48 |
24 |
|
T36 |
38 |
|
T127 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T48 |
11 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1213 |
1 |
|
|
T48 |
21 |
|
T36 |
37 |
|
T127 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T48 |
10 |
|
T36 |
34 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1141 |
1 |
|
|
T48 |
23 |
|
T36 |
37 |
|
T127 |
7 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
664 |
1 |
|
|
T48 |
11 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1185 |
1 |
|
|
T48 |
20 |
|
T36 |
36 |
|
T127 |
12 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
683 |
1 |
|
|
T48 |
10 |
|
T36 |
34 |
|
T127 |
4 |
all_gpio_pins[27] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1119 |
1 |
|
|
T48 |
23 |
|
T36 |
34 |
|
T127 |
7 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53807 |
1 |
|
|
T48 |
559 |
|
T36 |
1651 |
|
T127 |
244 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[0] |
auto[1] |
40887 |
1 |
|
|
T48 |
610 |
|
T36 |
1330 |
|
T127 |
1175 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[0] |
50517 |
1 |
|
|
T48 |
600 |
|
T36 |
1352 |
|
T127 |
214 |
all_gpio_pins[28] |
filter_cycles_or_more |
auto[1] |
auto[1] |
51880 |
1 |
|
|
T48 |
1717 |
|
T36 |
2542 |
|
T127 |
281 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T48 |
8 |
|
T36 |
22 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1616 |
1 |
|
|
T48 |
35 |
|
T36 |
67 |
|
T127 |
16 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T48 |
10 |
|
T36 |
19 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1598 |
1 |
|
|
T48 |
34 |
|
T36 |
70 |
|
T127 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
631 |
1 |
|
|
T48 |
8 |
|
T36 |
22 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T48 |
35 |
|
T36 |
67 |
|
T127 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T48 |
10 |
|
T36 |
19 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T48 |
33 |
|
T36 |
68 |
|
T127 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1564 |
1 |
|
|
T48 |
35 |
|
T36 |
67 |
|
T127 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T48 |
10 |
|
T36 |
19 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1542 |
1 |
|
|
T48 |
33 |
|
T36 |
67 |
|
T127 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
630 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1525 |
1 |
|
|
T48 |
35 |
|
T36 |
63 |
|
T127 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
655 |
1 |
|
|
T48 |
10 |
|
T36 |
19 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1519 |
1 |
|
|
T48 |
32 |
|
T36 |
65 |
|
T127 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1481 |
1 |
|
|
T48 |
34 |
|
T36 |
61 |
|
T127 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T48 |
9 |
|
T36 |
19 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1493 |
1 |
|
|
T48 |
33 |
|
T36 |
63 |
|
T127 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
628 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1448 |
1 |
|
|
T48 |
32 |
|
T36 |
60 |
|
T127 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
649 |
1 |
|
|
T48 |
9 |
|
T36 |
19 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1467 |
1 |
|
|
T48 |
33 |
|
T36 |
61 |
|
T127 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1423 |
1 |
|
|
T48 |
32 |
|
T36 |
58 |
|
T127 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T48 |
9 |
|
T36 |
19 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1442 |
1 |
|
|
T48 |
32 |
|
T36 |
61 |
|
T127 |
15 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
625 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1395 |
1 |
|
|
T48 |
31 |
|
T36 |
57 |
|
T127 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
643 |
1 |
|
|
T48 |
9 |
|
T36 |
19 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1414 |
1 |
|
|
T48 |
32 |
|
T36 |
61 |
|
T127 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1362 |
1 |
|
|
T48 |
30 |
|
T36 |
57 |
|
T127 |
14 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T48 |
9 |
|
T36 |
19 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1381 |
1 |
|
|
T48 |
31 |
|
T36 |
59 |
|
T127 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
622 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1336 |
1 |
|
|
T48 |
29 |
|
T36 |
56 |
|
T127 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
640 |
1 |
|
|
T48 |
9 |
|
T36 |
19 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1352 |
1 |
|
|
T48 |
31 |
|
T36 |
58 |
|
T127 |
11 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1310 |
1 |
|
|
T48 |
29 |
|
T36 |
55 |
|
T127 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T48 |
9 |
|
T36 |
19 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1313 |
1 |
|
|
T48 |
29 |
|
T36 |
56 |
|
T127 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1284 |
1 |
|
|
T48 |
29 |
|
T36 |
55 |
|
T127 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
636 |
1 |
|
|
T48 |
9 |
|
T36 |
19 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1293 |
1 |
|
|
T48 |
28 |
|
T36 |
56 |
|
T127 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1249 |
1 |
|
|
T48 |
28 |
|
T36 |
50 |
|
T127 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T48 |
9 |
|
T36 |
19 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1267 |
1 |
|
|
T48 |
28 |
|
T36 |
55 |
|
T127 |
10 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1218 |
1 |
|
|
T48 |
26 |
|
T36 |
48 |
|
T127 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T48 |
9 |
|
T36 |
19 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T48 |
28 |
|
T36 |
50 |
|
T127 |
9 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
620 |
1 |
|
|
T48 |
8 |
|
T36 |
21 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1188 |
1 |
|
|
T48 |
24 |
|
T36 |
47 |
|
T127 |
13 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
633 |
1 |
|
|
T48 |
9 |
|
T36 |
19 |
|
T127 |
2 |
all_gpio_pins[28] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1198 |
1 |
|
|
T48 |
28 |
|
T36 |
50 |
|
T127 |
9 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[0] |
51786 |
1 |
|
|
T48 |
836 |
|
T36 |
2570 |
|
T127 |
229 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[0] |
auto[1] |
45550 |
1 |
|
|
T48 |
577 |
|
T36 |
1247 |
|
T127 |
253 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53997 |
1 |
|
|
T48 |
1598 |
|
T36 |
1861 |
|
T127 |
1103 |
all_gpio_pins[29] |
filter_cycles_or_more |
auto[1] |
auto[1] |
45435 |
1 |
|
|
T48 |
511 |
|
T36 |
1333 |
|
T127 |
250 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1553 |
1 |
|
|
T48 |
30 |
|
T36 |
60 |
|
T127 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1555 |
1 |
|
|
T48 |
32 |
|
T36 |
60 |
|
T127 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
723 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1518 |
1 |
|
|
T48 |
30 |
|
T36 |
59 |
|
T127 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
724 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1527 |
1 |
|
|
T48 |
32 |
|
T36 |
60 |
|
T127 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1487 |
1 |
|
|
T48 |
29 |
|
T36 |
57 |
|
T127 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1491 |
1 |
|
|
T48 |
31 |
|
T36 |
59 |
|
T127 |
14 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
722 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1453 |
1 |
|
|
T48 |
29 |
|
T36 |
57 |
|
T127 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
723 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1451 |
1 |
|
|
T48 |
31 |
|
T36 |
55 |
|
T127 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1431 |
1 |
|
|
T48 |
28 |
|
T36 |
56 |
|
T127 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1419 |
1 |
|
|
T48 |
30 |
|
T36 |
55 |
|
T127 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
719 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1405 |
1 |
|
|
T48 |
28 |
|
T36 |
55 |
|
T127 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
719 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1387 |
1 |
|
|
T48 |
30 |
|
T36 |
54 |
|
T127 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1380 |
1 |
|
|
T48 |
28 |
|
T36 |
54 |
|
T127 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1345 |
1 |
|
|
T48 |
28 |
|
T36 |
52 |
|
T127 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
715 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1344 |
1 |
|
|
T48 |
27 |
|
T36 |
54 |
|
T127 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T48 |
11 |
|
T36 |
22 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1308 |
1 |
|
|
T48 |
27 |
|
T36 |
50 |
|
T127 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1309 |
1 |
|
|
T48 |
27 |
|
T36 |
54 |
|
T127 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T48 |
10 |
|
T36 |
22 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1280 |
1 |
|
|
T48 |
27 |
|
T36 |
49 |
|
T127 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
712 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1283 |
1 |
|
|
T48 |
26 |
|
T36 |
54 |
|
T127 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
711 |
1 |
|
|
T48 |
10 |
|
T36 |
22 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1248 |
1 |
|
|
T48 |
27 |
|
T36 |
48 |
|
T127 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1262 |
1 |
|
|
T48 |
25 |
|
T36 |
51 |
|
T127 |
10 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
10 |
|
T36 |
22 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1215 |
1 |
|
|
T48 |
26 |
|
T36 |
46 |
|
T127 |
13 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1236 |
1 |
|
|
T48 |
24 |
|
T36 |
50 |
|
T127 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
705 |
1 |
|
|
T48 |
10 |
|
T36 |
22 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1187 |
1 |
|
|
T48 |
26 |
|
T36 |
46 |
|
T127 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1211 |
1 |
|
|
T48 |
24 |
|
T36 |
47 |
|
T127 |
9 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T48 |
10 |
|
T36 |
22 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1151 |
1 |
|
|
T48 |
23 |
|
T36 |
44 |
|
T127 |
12 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1184 |
1 |
|
|
T48 |
24 |
|
T36 |
46 |
|
T127 |
8 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T48 |
10 |
|
T36 |
22 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1114 |
1 |
|
|
T48 |
22 |
|
T36 |
42 |
|
T127 |
11 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
709 |
1 |
|
|
T48 |
12 |
|
T36 |
23 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1152 |
1 |
|
|
T48 |
22 |
|
T36 |
43 |
|
T127 |
7 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
704 |
1 |
|
|
T48 |
10 |
|
T36 |
22 |
|
T127 |
6 |
all_gpio_pins[29] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1095 |
1 |
|
|
T48 |
21 |
|
T36 |
42 |
|
T127 |
11 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[0] |
52101 |
1 |
|
|
T48 |
760 |
|
T36 |
2035 |
|
T127 |
462 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[0] |
auto[1] |
44273 |
1 |
|
|
T48 |
583 |
|
T36 |
1126 |
|
T127 |
194 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[0] |
55753 |
1 |
|
|
T48 |
620 |
|
T36 |
2913 |
|
T127 |
387 |
all_gpio_pins[30] |
filter_cycles_or_more |
auto[1] |
auto[1] |
46093 |
1 |
|
|
T48 |
1698 |
|
T36 |
1021 |
|
T127 |
920 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1498 |
1 |
|
|
T48 |
27 |
|
T36 |
47 |
|
T127 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1501 |
1 |
|
|
T48 |
27 |
|
T36 |
49 |
|
T127 |
9 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1474 |
1 |
|
|
T48 |
25 |
|
T36 |
46 |
|
T127 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1464 |
1 |
|
|
T48 |
27 |
|
T36 |
47 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1450 |
1 |
|
|
T48 |
25 |
|
T36 |
46 |
|
T127 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1430 |
1 |
|
|
T48 |
27 |
|
T36 |
45 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
699 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1432 |
1 |
|
|
T48 |
23 |
|
T36 |
45 |
|
T127 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
700 |
1 |
|
|
T48 |
11 |
|
T36 |
29 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1398 |
1 |
|
|
T48 |
26 |
|
T36 |
44 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1404 |
1 |
|
|
T48 |
22 |
|
T36 |
44 |
|
T127 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T48 |
10 |
|
T36 |
29 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1376 |
1 |
|
|
T48 |
26 |
|
T36 |
44 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
698 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1377 |
1 |
|
|
T48 |
22 |
|
T36 |
43 |
|
T127 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
697 |
1 |
|
|
T48 |
10 |
|
T36 |
29 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1351 |
1 |
|
|
T48 |
26 |
|
T36 |
44 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1353 |
1 |
|
|
T48 |
22 |
|
T36 |
43 |
|
T127 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T48 |
10 |
|
T36 |
29 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1317 |
1 |
|
|
T48 |
25 |
|
T36 |
41 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
696 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1326 |
1 |
|
|
T48 |
22 |
|
T36 |
41 |
|
T127 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
691 |
1 |
|
|
T48 |
10 |
|
T36 |
29 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1294 |
1 |
|
|
T48 |
25 |
|
T36 |
41 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1298 |
1 |
|
|
T48 |
22 |
|
T36 |
41 |
|
T127 |
8 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
10 |
|
T36 |
29 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1266 |
1 |
|
|
T48 |
25 |
|
T36 |
41 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
695 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1258 |
1 |
|
|
T48 |
21 |
|
T36 |
40 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
690 |
1 |
|
|
T48 |
10 |
|
T36 |
29 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1236 |
1 |
|
|
T48 |
24 |
|
T36 |
40 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1224 |
1 |
|
|
T48 |
21 |
|
T36 |
40 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T48 |
10 |
|
T36 |
29 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1207 |
1 |
|
|
T48 |
24 |
|
T36 |
40 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T48 |
21 |
|
T36 |
38 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
689 |
1 |
|
|
T48 |
10 |
|
T36 |
29 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T48 |
23 |
|
T36 |
40 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1156 |
1 |
|
|
T48 |
21 |
|
T36 |
37 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T48 |
10 |
|
T36 |
29 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1168 |
1 |
|
|
T48 |
23 |
|
T36 |
39 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1133 |
1 |
|
|
T48 |
21 |
|
T36 |
34 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T48 |
10 |
|
T36 |
29 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1140 |
1 |
|
|
T48 |
23 |
|
T36 |
38 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T48 |
10 |
|
T36 |
31 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1107 |
1 |
|
|
T48 |
20 |
|
T36 |
34 |
|
T127 |
7 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
687 |
1 |
|
|
T48 |
10 |
|
T36 |
29 |
|
T127 |
6 |
all_gpio_pins[30] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1116 |
1 |
|
|
T48 |
23 |
|
T36 |
38 |
|
T127 |
6 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[0] |
53493 |
1 |
|
|
T48 |
405 |
|
T36 |
3097 |
|
T127 |
352 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[0] |
auto[1] |
46394 |
1 |
|
|
T48 |
859 |
|
T36 |
1320 |
|
T127 |
241 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[0] |
53657 |
1 |
|
|
T48 |
1429 |
|
T36 |
1459 |
|
T127 |
931 |
all_gpio_pins[31] |
filter_cycles_or_more |
auto[1] |
auto[1] |
42717 |
1 |
|
|
T48 |
711 |
|
T36 |
1143 |
|
T127 |
310 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T48 |
6 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[0] |
auto[1] |
1592 |
1 |
|
|
T48 |
42 |
|
T36 |
56 |
|
T127 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T48 |
9 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[1] |
auto[1] |
auto[1] |
1570 |
1 |
|
|
T48 |
40 |
|
T36 |
55 |
|
T127 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[0] |
692 |
1 |
|
|
T48 |
6 |
|
T36 |
28 |
|
T127 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[0] |
auto[1] |
1557 |
1 |
|
|
T48 |
42 |
|
T36 |
55 |
|
T127 |
13 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T48 |
9 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[2] |
auto[1] |
auto[1] |
1544 |
1 |
|
|
T48 |
38 |
|
T36 |
53 |
|
T127 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[0] |
auto[1] |
1535 |
1 |
|
|
T48 |
42 |
|
T36 |
56 |
|
T127 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T48 |
9 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[3] |
auto[1] |
auto[1] |
1516 |
1 |
|
|
T48 |
35 |
|
T36 |
52 |
|
T127 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[0] |
689 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[0] |
auto[1] |
1504 |
1 |
|
|
T48 |
42 |
|
T36 |
56 |
|
T127 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[0] |
717 |
1 |
|
|
T48 |
9 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[4] |
auto[1] |
auto[1] |
1483 |
1 |
|
|
T48 |
34 |
|
T36 |
48 |
|
T127 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[0] |
auto[1] |
1477 |
1 |
|
|
T48 |
42 |
|
T36 |
50 |
|
T127 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T48 |
9 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[5] |
auto[1] |
auto[1] |
1456 |
1 |
|
|
T48 |
34 |
|
T36 |
46 |
|
T127 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[0] |
686 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[0] |
auto[1] |
1442 |
1 |
|
|
T48 |
41 |
|
T36 |
48 |
|
T127 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[0] |
715 |
1 |
|
|
T48 |
9 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[6] |
auto[1] |
auto[1] |
1432 |
1 |
|
|
T48 |
34 |
|
T36 |
46 |
|
T127 |
16 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[0] |
auto[1] |
1409 |
1 |
|
|
T48 |
40 |
|
T36 |
46 |
|
T127 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T48 |
9 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[7] |
auto[1] |
auto[1] |
1399 |
1 |
|
|
T48 |
32 |
|
T36 |
45 |
|
T127 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[0] |
684 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[0] |
auto[1] |
1378 |
1 |
|
|
T48 |
40 |
|
T36 |
46 |
|
T127 |
12 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[0] |
713 |
1 |
|
|
T48 |
9 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[8] |
auto[1] |
auto[1] |
1364 |
1 |
|
|
T48 |
32 |
|
T36 |
45 |
|
T127 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[0] |
auto[1] |
1341 |
1 |
|
|
T48 |
36 |
|
T36 |
46 |
|
T127 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T48 |
9 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[9] |
auto[1] |
auto[1] |
1325 |
1 |
|
|
T48 |
32 |
|
T36 |
45 |
|
T127 |
15 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[0] |
683 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[0] |
auto[1] |
1305 |
1 |
|
|
T48 |
32 |
|
T36 |
45 |
|
T127 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[0] |
703 |
1 |
|
|
T48 |
9 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[10] |
auto[1] |
auto[1] |
1290 |
1 |
|
|
T48 |
31 |
|
T36 |
44 |
|
T127 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[0] |
auto[1] |
1280 |
1 |
|
|
T48 |
32 |
|
T36 |
44 |
|
T127 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T48 |
9 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[11] |
auto[1] |
auto[1] |
1257 |
1 |
|
|
T48 |
31 |
|
T36 |
42 |
|
T127 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[0] |
auto[1] |
1263 |
1 |
|
|
T48 |
32 |
|
T36 |
43 |
|
T127 |
10 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T48 |
9 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[12] |
auto[1] |
auto[1] |
1228 |
1 |
|
|
T48 |
31 |
|
T36 |
40 |
|
T127 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[0] |
auto[1] |
1232 |
1 |
|
|
T48 |
31 |
|
T36 |
43 |
|
T127 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T48 |
9 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[13] |
auto[1] |
auto[1] |
1190 |
1 |
|
|
T48 |
30 |
|
T36 |
40 |
|
T127 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[0] |
auto[1] |
1214 |
1 |
|
|
T48 |
31 |
|
T36 |
42 |
|
T127 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T48 |
9 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[14] |
auto[1] |
auto[1] |
1155 |
1 |
|
|
T48 |
28 |
|
T36 |
40 |
|
T127 |
14 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[0] |
678 |
1 |
|
|
T48 |
6 |
|
T36 |
27 |
|
T127 |
6 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[0] |
auto[1] |
1193 |
1 |
|
|
T48 |
31 |
|
T36 |
42 |
|
T127 |
9 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[0] |
699 |
1 |
|
|
T48 |
9 |
|
T36 |
28 |
|
T127 |
4 |
all_gpio_pins[31] |
one_to_filter_cycles_minus_1[15] |
auto[1] |
auto[1] |
1111 |
1 |
|
|
T48 |
27 |
|
T36 |
40 |
|
T127 |
13 |