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Group Instance : masked_oe_upper_mask_data_cov_obj_pin15
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin15

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin15
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin15
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_oe_upper_mask_data_cov_obj_pin2
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin2

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin2
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin2
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_oe_upper_mask_data_cov_obj_pin3
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin3

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin3
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin3
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_oe_upper_mask_data_cov_obj_pin4
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin4

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin4
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin4
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_oe_upper_mask_data_cov_obj_pin5
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin5

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin5
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin5
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_oe_upper_mask_data_cov_obj_pin6
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin6

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin6
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin6
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_oe_upper_mask_data_cov_obj_pin7
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin7

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin7
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin7
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_oe_upper_mask_data_cov_obj_pin8
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin8

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin8
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin8
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_oe_upper_mask_data_cov_obj_pin9
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_oe_upper_mask_data_cov_obj_pin9

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_oe_upper_mask_data_cov_obj_pin9
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_oe_upper_mask_data_cov_obj_pin9
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_lower_mask_data_cov_obj_pin0
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin0

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin0
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin0
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_lower_mask_data_cov_obj_pin1
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin1

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin1
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin1
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_lower_mask_data_cov_obj_pin10
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin10

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin10
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin10
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_lower_mask_data_cov_obj_pin11
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin11

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin11
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin11
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_lower_mask_data_cov_obj_pin12
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin12

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin12
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin12
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_lower_mask_data_cov_obj_pin13
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin13

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin13
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin13
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_lower_mask_data_cov_obj_pin14
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin14

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin14
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin14
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0


Group Instance : masked_out_lower_mask_data_cov_obj_pin15
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64



Summary for Group Instance masked_out_lower_mask_data_cov_obj_pin15

CATEGORY   EXPECTED   UNCOVERED   COVERED   PERCENT   
Variables 4 0 4 100.00
Crosses 4 0 4 100.00


Variables for Group Instance masked_out_lower_mask_data_cov_obj_pin15
VARIABLE   EXPECTED   UNCOVERED   COVERED   PERCENT   GOAL   WEIGHT   AT LEAST   AUTO BIN MAX   COMMENT   
cp_var1 2 0 2 100.00 100 1 1 2
cp_var2 2 0 2 100.00 100 1 1 2


Crosses for Group Instance masked_out_lower_mask_data_cov_obj_pin15
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cp_var1_var2_cross 4 0 4 100.00 100 1 1 0

Go back
Group Instances:
masked_oe_upper_mask_data_cov_obj_pin15
masked_oe_upper_mask_data_cov_obj_pin2
masked_oe_upper_mask_data_cov_obj_pin3
masked_oe_upper_mask_data_cov_obj_pin4
masked_oe_upper_mask_data_cov_obj_pin5
masked_oe_upper_mask_data_cov_obj_pin6
masked_oe_upper_mask_data_cov_obj_pin7
masked_oe_upper_mask_data_cov_obj_pin8
masked_oe_upper_mask_data_cov_obj_pin9
masked_out_lower_mask_data_cov_obj_pin0
masked_out_lower_mask_data_cov_obj_pin1
masked_out_lower_mask_data_cov_obj_pin10
masked_out_lower_mask_data_cov_obj_pin11
masked_out_lower_mask_data_cov_obj_pin12
masked_out_lower_mask_data_cov_obj_pin13
masked_out_lower_mask_data_cov_obj_pin14
masked_out_lower_mask_data_cov_obj_pin15

Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163377 1 T43 2 T44 4 T45 7
auto[1] 163581 1 T43 4 T44 5 T45 6


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163742 1 T43 4 T44 4 T45 5
auto[1] 163216 1 T43 2 T44 5 T45 8


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 81693 1 T43 1 T44 2 T45 3
auto[0] auto[1] 81684 1 T43 1 T44 2 T45 4
auto[1] auto[0] 82049 1 T43 3 T44 2 T45 2
auto[1] auto[1] 81532 1 T43 1 T44 3 T45 4


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 162863 1 T43 4 T44 5 T45 10
auto[1] 164095 1 T43 2 T44 4 T45 3


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163689 1 T43 3 T44 6 T45 4
auto[1] 163269 1 T43 3 T44 3 T45 9


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 81618 1 T43 2 T44 4 T45 4
auto[0] auto[1] 81245 1 T43 2 T44 1 T45 6
auto[1] auto[0] 82071 1 T43 1 T44 2 T46 4
auto[1] auto[1] 82024 1 T43 1 T44 2 T45 3


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163624 1 T43 4 T44 5 T45 10
auto[1] 163334 1 T43 2 T44 4 T45 3


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163422 1 T43 2 T44 8 T45 8
auto[1] 163536 1 T43 4 T44 1 T45 5


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 82009 1 T43 2 T44 5 T45 6
auto[0] auto[1] 81615 1 T43 2 T45 4 T46 3
auto[1] auto[0] 81413 1 T44 3 T45 2 T46 10
auto[1] auto[1] 81921 1 T43 2 T44 1 T45 1


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 164006 1 T43 3 T44 4 T45 6
auto[1] 162952 1 T43 3 T44 5 T45 7


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163421 1 T43 2 T44 5 T45 8
auto[1] 163537 1 T43 4 T44 4 T45 5


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 81894 1 T44 3 T45 4 T46 7
auto[0] auto[1] 82112 1 T43 3 T44 1 T45 2
auto[1] auto[0] 81527 1 T43 2 T44 2 T45 4
auto[1] auto[1] 81425 1 T43 1 T44 3 T45 3


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163755 1 T43 4 T44 3 T45 5
auto[1] 163203 1 T43 2 T44 6 T45 8


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 162962 1 T43 4 T44 3 T45 9
auto[1] 163996 1 T43 2 T44 6 T45 4


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 81683 1 T43 2 T44 1 T45 3
auto[0] auto[1] 82072 1 T43 2 T44 2 T45 2
auto[1] auto[0] 81279 1 T43 2 T44 2 T45 6
auto[1] auto[1] 81924 1 T44 4 T45 2 T46 1


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163510 1 T43 3 T44 3 T45 7
auto[1] 163448 1 T43 3 T44 6 T45 6


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163434 1 T43 3 T44 4 T45 5
auto[1] 163524 1 T43 3 T44 5 T45 8


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 81844 1 T43 2 T44 2 T45 2
auto[0] auto[1] 81666 1 T43 1 T44 1 T45 5
auto[1] auto[0] 81590 1 T43 1 T44 2 T45 3
auto[1] auto[1] 81858 1 T43 2 T44 4 T45 3


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163095 1 T43 3 T44 1 T45 8
auto[1] 163863 1 T43 3 T44 8 T45 5


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163674 1 T43 5 T44 3 T45 8
auto[1] 163284 1 T43 1 T44 6 T45 5


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 81691 1 T43 2 T44 1 T45 7
auto[0] auto[1] 81404 1 T43 1 T45 1 T46 7
auto[1] auto[0] 81983 1 T43 3 T44 2 T45 1
auto[1] auto[1] 81880 1 T44 6 T45 4 T46 1


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163182 1 T43 2 T44 4 T45 4
auto[1] 163776 1 T43 4 T44 5 T45 9


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163899 1 T43 5 T44 6 T45 5
auto[1] 163059 1 T43 1 T44 3 T45 8


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 81802 1 T43 2 T44 2 T46 10
auto[0] auto[1] 81380 1 T44 2 T45 4 T46 5
auto[1] auto[0] 82097 1 T43 3 T44 4 T45 5
auto[1] auto[1] 81679 1 T43 1 T44 1 T45 4


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163818 1 T43 4 T44 5 T45 11
auto[1] 163140 1 T43 2 T44 4 T45 2


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163523 1 T43 2 T44 5 T45 7
auto[1] 163435 1 T43 4 T44 4 T45 6


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 81749 1 T43 1 T44 2 T45 6
auto[0] auto[1] 82069 1 T43 3 T44 3 T45 5
auto[1] auto[0] 81774 1 T43 1 T44 3 T45 1
auto[1] auto[1] 81366 1 T43 1 T44 1 T45 1


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163884 1 T43 2 T44 1 T45 7
auto[1] 163577 1 T43 5 T45 11 T46 11


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163571 1 T43 4 T44 1 T45 11
auto[1] 163890 1 T43 3 T45 7 T46 12


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 81614 1 T43 1 T44 1 T45 4
auto[0] auto[1] 82270 1 T43 1 T45 3 T46 6
auto[1] auto[0] 81957 1 T43 3 T45 7 T46 5
auto[1] auto[1] 81620 1 T43 2 T45 4 T46 6


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 164005 1 T43 3 T45 9 T46 9
auto[1] 163456 1 T43 4 T44 1 T45 9


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163785 1 T43 6 T44 1 T45 9
auto[1] 163676 1 T43 1 T45 9 T46 10


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 82065 1 T43 2 T45 6 T46 5
auto[0] auto[1] 81940 1 T43 1 T45 3 T46 4
auto[1] auto[0] 81720 1 T43 4 T44 1 T45 3
auto[1] auto[1] 81736 1 T45 6 T46 6 T50 3


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163758 1 T43 1 T45 7 T46 9
auto[1] 163703 1 T43 6 T44 1 T45 11


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163447 1 T43 4 T45 11 T46 10
auto[1] 164014 1 T43 3 T44 1 T45 7


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 81657 1 T43 1 T45 4 T46 4
auto[0] auto[1] 82101 1 T45 3 T46 5 T50 3
auto[1] auto[0] 81790 1 T43 3 T45 7 T46 6
auto[1] auto[1] 81913 1 T43 3 T44 1 T45 4


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163961 1 T43 3 T44 1 T45 10
auto[1] 163500 1 T43 4 T45 8 T46 13


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163369 1 T43 5 T45 6 T46 10
auto[1] 164092 1 T43 2 T44 1 T45 12


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 81948 1 T43 1 T45 4 T46 4
auto[0] auto[1] 82013 1 T43 2 T44 1 T45 6
auto[1] auto[0] 81421 1 T43 4 T45 2 T46 6
auto[1] auto[1] 82079 1 T45 6 T46 7 T50 6


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163637 1 T43 3 T44 1 T45 7
auto[1] 163824 1 T43 4 T45 11 T46 10


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163401 1 T43 5 T45 10 T46 8
auto[1] 164060 1 T43 2 T44 1 T45 8


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 81472 1 T43 2 T45 3 T46 5
auto[0] auto[1] 82165 1 T43 1 T44 1 T45 4
auto[1] auto[0] 81929 1 T43 3 T45 7 T46 3
auto[1] auto[1] 81895 1 T43 1 T45 4 T46 7


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163639 1 T43 2 T44 1 T45 9
auto[1] 163822 1 T43 5 T45 9 T46 9


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163828 1 T43 3 T44 1 T45 11
auto[1] 163633 1 T43 4 T45 7 T46 8


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 81771 1 T43 1 T44 1 T45 7
auto[0] auto[1] 81868 1 T43 1 T45 2 T46 3
auto[1] auto[0] 82057 1 T43 2 T45 4 T46 4
auto[1] auto[1] 81765 1 T43 3 T45 5 T46 5


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163603 1 T43 2 T44 1 T45 5
auto[1] 163858 1 T43 5 T45 13 T46 16


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163553 1 T43 3 T44 1 T45 10
auto[1] 163908 1 T43 4 T45 8 T46 10


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 81652 1 T43 1 T44 1 T45 3
auto[0] auto[1] 81951 1 T43 1 T45 2 T46 2
auto[1] auto[0] 81901 1 T43 2 T45 7 T46 8
auto[1] auto[1] 81957 1 T43 3 T45 6 T46 8


Summary for Variable cp_var1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var1

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163666 1 T43 4 T45 10 T46 11
auto[1] 163795 1 T43 3 T44 1 T45 8


Summary for Variable cp_var2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_var2

Bins
NAME   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] 163441 1 T43 4 T44 1 T45 4
auto[1] 164020 1 T43 3 T45 14 T46 8


Summary for Cross cp_var1_var2_cross

Samples crossed: cp_var1 cp_var2
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for cp_var1_var2_cross

Bins
cp_var1   cp_var2   COUNT   AT LEAST   STATUS   TEST   COUNT   TEST   COUNT   TEST   COUNT   
auto[0] auto[0] 81737 1 T43 3 T45 3 T46 7
auto[0] auto[1] 81929 1 T43 1 T45 7 T46 4
auto[1] auto[0] 81704 1 T43 1 T44 1 T45 1
auto[1] auto[1] 82091 1 T43 2 T45 7 T46 4