Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	36437801	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

36441745

1

T1

17763

T2

27260

T3

8252

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	29353357	1			T1	25261		T2	15552		T3	7398
values[0x0]	20337300	1			T1	8095		T2	11822		T3	4903
values[0x1]	23188889	1			T1	8016		T2	11629		T3	6063

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	27252663	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

45626883

1

T1

28995

T2

31745

T3

11044

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	225576	1			T1	144		T2	167		T3	69
valid_sources[0x01]	234421	1			T1	166		T2	188		T3	80
valid_sources[0x02]	232117	1			T1	136		T2	156		T3	101
valid_sources[0x03]	233641	1			T1	132		T2	136		T3	80
valid_sources[0x04]	608364	1			T1	169		T2	155		T3	80
valid_sources[0x05]	234894	1			T1	184		T2	169		T3	88
valid_sources[0x06]	221946	1			T1	195		T2	174		T3	76
valid_sources[0x07]	234923	1			T1	153		T2	168		T3	68
valid_sources[0x08]	224407	1			T1	161		T2	132		T3	93
valid_sources[0x09]	223832	1			T1	146		T2	157		T3	88
valid_sources[0x0a]	227381	1			T1	163		T2	152		T3	44
valid_sources[0x0b]	228999	1			T1	141		T2	124		T3	56
valid_sources[0x0c]	227050	1			T1	131		T2	140		T3	107
valid_sources[0x0d]	265085	1			T1	147		T2	141		T3	67
valid_sources[0x0e]	230024	1			T1	145		T2	149		T3	119
valid_sources[0x0f]	229754	1			T1	153		T2	154		T3	38
valid_sources[0x10]	229618	1			T1	189		T2	132		T3	78
valid_sources[0x11]	277948	1			T1	142		T2	150		T3	89
valid_sources[0x12]	233003	1			T1	86		T2	166		T3	106
valid_sources[0x13]	239302	1			T1	140		T2	127		T3	71
valid_sources[0x14]	235975	1			T1	185		T2	175		T3	74
valid_sources[0x15]	256402	1			T1	204		T2	172		T3	97
valid_sources[0x16]	235844	1			T1	167		T2	149		T3	78
valid_sources[0x17]	229615	1			T1	119		T2	180		T3	87
valid_sources[0x18]	256727	1			T1	210		T2	151		T3	77
valid_sources[0x19]	256591	1			T1	160		T2	128		T3	79
valid_sources[0x1a]	246075	1			T1	156		T2	196		T3	73
valid_sources[0x1b]	261616	1			T1	136		T2	122		T3	50
valid_sources[0x1c]	218888	1			T1	211		T2	143		T3	60
valid_sources[0x1d]	225007	1			T1	128		T2	143		T3	65
valid_sources[0x1e]	240421	1			T1	122		T2	167		T3	55
valid_sources[0x1f]	228112	1			T1	167		T2	177		T3	100
valid_sources[0x20]	620700	1			T1	235		T2	110		T3	40
valid_sources[0x21]	261046	1			T1	144		T2	160		T3	104
valid_sources[0x22]	220507	1			T1	209		T2	152		T3	64
valid_sources[0x23]	623307	1			T1	124		T2	167		T3	83
valid_sources[0x24]	239204	1			T1	178		T2	158		T3	43
valid_sources[0x25]	241877	1			T1	170		T2	133		T3	88
valid_sources[0x26]	267080	1			T1	201		T2	203		T3	72
valid_sources[0x27]	222836	1			T1	119		T2	135		T3	69
valid_sources[0x28]	256265	1			T1	170		T2	163		T3	62
valid_sources[0x29]	252861	1			T1	140		T2	139		T3	84
valid_sources[0x2a]	245012	1			T1	185		T2	149		T3	67
valid_sources[0x2b]	238897	1			T1	175		T2	154		T3	81
valid_sources[0x2c]	221764	1			T1	162		T2	165		T3	41
valid_sources[0x2d]	284649	1			T1	169		T2	158		T3	90
valid_sources[0x2e]	237894	1			T1	158		T2	145		T3	59
valid_sources[0x2f]	298061	1			T1	175		T2	157		T3	64
valid_sources[0x30]	241537	1			T1	191		T2	150		T3	70
valid_sources[0x31]	231181	1			T1	162		T2	156		T3	51
valid_sources[0x32]	283365	1			T1	173		T2	153		T3	89
valid_sources[0x33]	229048	1			T1	119		T2	124		T3	67
valid_sources[0x34]	233701	1			T1	131		T2	178		T3	46
valid_sources[0x35]	218738	1			T1	110		T2	156		T3	86
valid_sources[0x36]	225791	1			T1	168		T2	150		T3	106
valid_sources[0x37]	266971	1			T1	143		T2	133		T3	64
valid_sources[0x38]	247380	1			T1	144		T2	167		T3	74
valid_sources[0x39]	217128	1			T1	210		T2	162		T3	61
valid_sources[0x3a]	252704	1			T1	163		T2	181		T3	60
valid_sources[0x3b]	262871	1			T1	83		T2	184		T3	55
valid_sources[0x3c]	238175	1			T1	156		T2	130		T3	49
valid_sources[0x3d]	236425	1			T1	165		T2	121		T3	111
valid_sources[0x3e]	226080	1			T1	137		T2	148		T3	62
valid_sources[0x3f]	236675	1			T1	203		T2	127		T3	90
valid_sources[0x40]	220747	1			T1	150		T2	157		T3	109
valid_sources[0x41]	271752	1			T1	174		T2	141		T3	75
valid_sources[0x42]	226002	1			T1	135		T2	160		T3	55
valid_sources[0x43]	234473	1			T1	181		T2	150		T3	83
valid_sources[0x44]	224474	1			T1	176		T2	134		T3	80
valid_sources[0x45]	252920	1			T1	137		T2	125		T3	85
valid_sources[0x46]	224417	1			T1	241		T2	157		T3	57
valid_sources[0x47]	245507	1			T1	168		T2	148		T3	63
valid_sources[0x48]	259380	1			T1	126		T2	131		T3	101
valid_sources[0x49]	263138	1			T1	161		T2	164		T3	89
valid_sources[0x4a]	243235	1			T1	132		T2	160		T3	65
valid_sources[0x4b]	292338	1			T1	196		T2	199		T3	74
valid_sources[0x4c]	239776	1			T1	179		T2	172		T3	76
valid_sources[0x4d]	228015	1			T1	171		T2	125		T3	97
valid_sources[0x4e]	231879	1			T1	167		T2	151		T3	75
valid_sources[0x4f]	238302	1			T1	187		T2	159		T3	106
valid_sources[0x50]	234057	1			T1	108		T2	172		T3	80
valid_sources[0x51]	271681	1			T1	153		T2	189		T3	104
valid_sources[0x52]	663743	1			T1	193		T2	170		T3	60
valid_sources[0x53]	941120	1			T1	173		T2	133		T3	90
valid_sources[0x54]	258728	1			T1	163		T2	143		T3	78
valid_sources[0x55]	274140	1			T1	215		T2	109		T3	67
valid_sources[0x56]	252320	1			T1	226		T2	165		T3	80
valid_sources[0x57]	225891	1			T1	152		T2	198		T3	69
valid_sources[0x58]	255289	1			T1	175		T2	132		T3	100
valid_sources[0x59]	237515	1			T1	139		T2	127		T3	73
valid_sources[0x5a]	224283	1			T1	133		T2	181		T3	36
valid_sources[0x5b]	234130	1			T1	186		T2	125		T3	64
valid_sources[0x5c]	255382	1			T1	164		T2	176		T3	69
valid_sources[0x5d]	231552	1			T1	164		T2	156		T3	61
valid_sources[0x5e]	584167	1			T1	160		T2	134		T3	94
valid_sources[0x5f]	238428	1			T1	139		T2	149		T3	87
valid_sources[0x60]	220977	1			T1	210		T2	113		T3	77
valid_sources[0x61]	244486	1			T1	134		T2	148		T3	107
valid_sources[0x62]	241454	1			T1	114		T2	160		T3	50
valid_sources[0x63]	232881	1			T1	164		T2	141		T3	57
valid_sources[0x64]	226880	1			T1	173		T2	169		T3	76
valid_sources[0x65]	613502	1			T1	134		T2	131		T3	58
valid_sources[0x66]	265498	1			T1	164		T2	156		T3	77
valid_sources[0x67]	637298	1			T1	227		T2	132		T3	72
valid_sources[0x68]	607677	1			T1	181		T2	148		T3	86
valid_sources[0x69]	240523	1			T1	187		T2	170		T3	86
valid_sources[0x6a]	239014	1			T1	149		T2	154		T3	73
valid_sources[0x6b]	228019	1			T1	118		T2	149		T3	81
valid_sources[0x6c]	234538	1			T1	114		T2	179		T3	68
valid_sources[0x6d]	219630	1			T1	204		T2	147		T3	73
valid_sources[0x6e]	234212	1			T1	142		T2	136		T3	51
valid_sources[0x6f]	1737772	1			T1	131		T2	140		T3	71
valid_sources[0x70]	222654	1			T1	147		T2	190		T3	58
valid_sources[0x71]	252851	1			T1	144		T2	132		T3	82
valid_sources[0x72]	240241	1			T1	147		T2	123		T3	117
valid_sources[0x73]	229848	1			T1	119		T2	184		T3	43
valid_sources[0x74]	236911	1			T1	139		T2	137		T3	57
valid_sources[0x75]	234569	1			T1	161		T2	178		T3	99
valid_sources[0x76]	574957	1			T1	106		T2	118		T3	65
valid_sources[0x77]	230698	1			T1	166		T2	154		T3	76
valid_sources[0x78]	239850	1			T1	174		T2	186		T3	93
valid_sources[0x79]	246175	1			T1	181		T2	158		T3	75
valid_sources[0x7a]	231205	1			T1	146		T2	128		T3	54
valid_sources[0x7b]	634089	1			T1	169		T2	120		T3	58
valid_sources[0x7c]	255783	1			T1	161		T2	161		T3	67
valid_sources[0x7d]	235885	1			T1	144		T2	181		T3	72
valid_sources[0x7e]	261314	1			T1	168		T2	152		T3	72
valid_sources[0x7f]	235150	1			T1	173		T2	166		T3	79
valid_sources[0x80]	220917	1			T1	124		T2	153		T3	82

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

14031445

1

T1

1936

T2

4141

T3

3633

values[0x0]

all_enables

biggest_size

11793017

1

T1

7967

T2

11688

T3

2516

values[0x1]

all_enables

biggest_size

10617283

1

T1

7860

T2

11431

T3

2103