Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	42266764	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

45562784

1

T1

126

T2

20709

T3

43961

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	35010662	1			T1	121		T2	17984		T3	38316
values[0x0]	24598548	1			T1	56		T2	11768		T3	23455
values[0x1]	28220338	1			T1	64		T2	14620		T3	26468

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	30997569	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

56831979

1

T1

162

T2

27098

T3

54705

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	310026	1			T1	1		T2	22		T3	344
valid_sources[0x01]	290777	1			T1	2		T2	79		T3	357
valid_sources[0x02]	291508	1			T1	1		T2	3		T3	354
valid_sources[0x03]	293429	1			T2	144		T3	358		T4	14
valid_sources[0x04]	344398	1			T2	76		T3	349		T4	7
valid_sources[0x05]	289772	1			T1	1		T2	82		T3	352
valid_sources[0x06]	309564	1			T2	44		T3	314		T4	7
valid_sources[0x07]	323956	1			T1	2		T2	157		T3	346
valid_sources[0x08]	299433	1			T1	1		T2	5		T3	322
valid_sources[0x09]	320664	1			T2	21		T3	329		T4	9
valid_sources[0x0a]	294965	1			T2	73		T3	356		T4	12
valid_sources[0x0b]	330378	1			T1	1		T2	125		T3	337
valid_sources[0x0c]	317507	1			T1	1		T2	146		T3	358
valid_sources[0x0d]	328937	1			T2	33		T3	364		T4	5
valid_sources[0x0e]	313696	1			T2	165		T3	361		T4	12
valid_sources[0x0f]	304795	1			T1	2		T2	84		T3	378
valid_sources[0x10]	302255	1			T2	76		T3	302		T4	11
valid_sources[0x11]	302319	1			T1	1		T2	29		T3	298
valid_sources[0x12]	296965	1			T2	31		T3	313		T4	6
valid_sources[0x13]	304508	1			T1	1		T2	62		T3	327
valid_sources[0x14]	295712	1			T1	1		T2	63		T3	363
valid_sources[0x15]	296117	1			T1	1		T2	87		T3	355
valid_sources[0x16]	346846	1			T1	2		T2	21		T3	313
valid_sources[0x17]	288416	1			T1	2		T2	52		T3	343
valid_sources[0x18]	296202	1			T2	76		T3	367		T4	5
valid_sources[0x19]	293829	1			T2	173		T3	348		T4	10
valid_sources[0x1a]	312746	1			T2	97		T3	364		T4	9
valid_sources[0x1b]	291829	1			T2	29		T3	349		T4	14
valid_sources[0x1c]	297424	1			T2	75		T3	327		T4	10
valid_sources[0x1d]	716787	1			T2	70		T3	324		T4	11
valid_sources[0x1e]	295126	1			T2	258		T3	319		T4	3
valid_sources[0x1f]	328365	1			T1	5		T2	84		T3	339
valid_sources[0x20]	288730	1			T2	41		T3	315		T4	11
valid_sources[0x21]	293971	1			T1	3		T2	205		T3	315
valid_sources[0x22]	295846	1			T1	2		T2	29		T3	369
valid_sources[0x23]	696443	1			T2	39		T3	327		T4	8
valid_sources[0x24]	314436	1			T2	52		T3	301		T4	12
valid_sources[0x25]	297252	1			T2	22		T3	318		T4	6
valid_sources[0x26]	293761	1			T1	2		T2	70		T3	350
valid_sources[0x27]	285157	1			T2	75		T3	344		T4	9
valid_sources[0x28]	277998	1			T1	1		T2	111		T3	359
valid_sources[0x29]	689366	1			T1	2		T2	81		T3	366
valid_sources[0x2a]	311050	1			T1	4		T2	107		T3	338
valid_sources[0x2b]	613871	1			T1	3		T2	46		T3	373
valid_sources[0x2c]	291928	1			T2	21		T3	331		T4	12
valid_sources[0x2d]	320951	1			T2	115		T3	367		T4	9
valid_sources[0x2e]	306750	1			T1	1		T2	67		T3	326
valid_sources[0x2f]	318829	1			T1	1		T2	124		T3	363
valid_sources[0x30]	290532	1			T1	1		T2	137		T3	333
valid_sources[0x31]	1132718	1			T1	1		T2	47		T3	335
valid_sources[0x32]	303458	1			T2	143		T3	350		T4	3
valid_sources[0x33]	290846	1			T2	87		T3	301		T4	14
valid_sources[0x34]	286848	1			T2	99		T3	327		T4	8
valid_sources[0x35]	297226	1			T2	33		T3	341		T4	7
valid_sources[0x36]	313500	1			T2	82		T3	334		T4	13
valid_sources[0x37]	311453	1			T2	112		T3	307		T4	8
valid_sources[0x38]	306157	1			T2	149		T3	316		T4	8
valid_sources[0x39]	640957	1			T2	172		T3	363		T4	12
valid_sources[0x3a]	298996	1			T1	2		T2	196		T3	360
valid_sources[0x3b]	303822	1			T2	127		T3	385		T4	7
valid_sources[0x3c]	318371	1			T1	1		T2	36		T3	319
valid_sources[0x3d]	295032	1			T2	53		T3	341		T4	9
valid_sources[0x3e]	293268	1			T1	1		T2	60		T3	370
valid_sources[0x3f]	308712	1			T2	61		T3	351		T4	7
valid_sources[0x40]	293431	1			T2	89		T3	356		T4	14
valid_sources[0x41]	315615	1			T1	1		T2	3542		T3	349
valid_sources[0x42]	297281	1			T1	2		T2	29		T3	376
valid_sources[0x43]	302293	1			T1	2		T2	21		T3	368
valid_sources[0x44]	682687	1			T1	1		T2	25		T3	379
valid_sources[0x45]	309441	1			T1	1		T2	45		T3	342
valid_sources[0x46]	319123	1			T1	1		T2	120		T3	348
valid_sources[0x47]	673237	1			T2	834		T3	344		T4	5
valid_sources[0x48]	287403	1			T1	1		T2	53		T3	324
valid_sources[0x49]	289568	1			T2	35		T3	327		T4	13
valid_sources[0x4a]	294218	1			T2	75		T3	354		T4	7
valid_sources[0x4b]	302915	1			T1	1		T2	130		T3	356
valid_sources[0x4c]	311661	1			T1	1		T2	55		T3	312
valid_sources[0x4d]	307017	1			T1	2		T2	62		T3	351
valid_sources[0x4e]	342785	1			T1	1		T2	36		T3	342
valid_sources[0x4f]	295610	1			T1	1		T2	37		T3	325
valid_sources[0x50]	309379	1			T1	2		T2	92		T3	335
valid_sources[0x51]	279407	1			T1	1		T2	83		T3	348
valid_sources[0x52]	289544	1			T1	2		T2	15		T3	338
valid_sources[0x53]	293618	1			T1	2		T2	111		T3	315
valid_sources[0x54]	284244	1			T2	79		T3	371		T4	4
valid_sources[0x55]	314085	1			T1	1		T2	79		T3	385
valid_sources[0x56]	285547	1			T2	90		T3	326		T4	1
valid_sources[0x57]	300211	1			T2	197		T3	342		T4	18
valid_sources[0x58]	298043	1			T1	1		T2	82		T3	331
valid_sources[0x59]	307512	1			T2	6		T3	353		T4	8
valid_sources[0x5a]	296423	1			T1	1		T2	52		T3	353
valid_sources[0x5b]	295780	1			T1	1		T2	103		T3	372
valid_sources[0x5c]	310072	1			T1	1		T2	116		T3	362
valid_sources[0x5d]	287248	1			T1	1		T2	79		T3	352
valid_sources[0x5e]	300069	1			T1	1		T2	117		T3	331
valid_sources[0x5f]	321739	1			T2	102		T3	321		T4	18
valid_sources[0x60]	320871	1			T2	63		T3	355		T4	5
valid_sources[0x61]	303925	1			T1	1		T2	111		T3	352
valid_sources[0x62]	280027	1			T2	40		T3	303		T4	13
valid_sources[0x63]	381196	1			T1	2		T2	21		T3	352
valid_sources[0x64]	301490	1			T2	112		T3	332		T4	9
valid_sources[0x65]	283054	1			T2	29		T3	343		T4	12
valid_sources[0x66]	282807	1			T1	3		T2	32		T3	353
valid_sources[0x67]	297268	1			T2	70		T3	315		T4	11
valid_sources[0x68]	302636	1			T2	56		T3	318		T4	5
valid_sources[0x69]	294552	1			T1	3		T2	173		T3	334
valid_sources[0x6a]	286847	1			T2	198		T3	335		T4	12
valid_sources[0x6b]	309986	1			T1	1		T2	48		T3	311
valid_sources[0x6c]	359064	1			T2	19		T3	352		T4	3
valid_sources[0x6d]	306398	1			T1	1		T2	36		T3	292
valid_sources[0x6e]	353400	1			T2	113		T3	325		T4	6
valid_sources[0x6f]	314074	1			T2	30		T3	318		T4	1
valid_sources[0x70]	285939	1			T2	91		T3	344		T4	10
valid_sources[0x71]	300121	1			T1	2		T2	62		T3	349
valid_sources[0x72]	341221	1			T2	31		T3	357		T4	7
valid_sources[0x73]	284630	1			T1	2		T2	226		T3	338
valid_sources[0x74]	289707	1			T1	2		T2	117		T3	369
valid_sources[0x75]	410342	1			T1	1		T2	28		T3	364
valid_sources[0x76]	303079	1			T2	83		T3	354		T4	6
valid_sources[0x77]	307048	1			T1	1		T2	130		T3	336
valid_sources[0x78]	301079	1			T2	41		T3	363		T4	14
valid_sources[0x79]	298240	1			T2	52		T3	356		T4	13
valid_sources[0x7a]	300686	1			T1	1		T2	45		T3	328
valid_sources[0x7b]	297476	1			T2	126		T3	377		T4	11
valid_sources[0x7c]	296094	1			T1	4		T2	67		T3	337
valid_sources[0x7d]	313883	1			T1	1		T2	33		T3	359
valid_sources[0x7e]	641924	1			T1	1		T2	44		T3	318
valid_sources[0x7f]	297739	1			T1	1		T2	22		T3	361
valid_sources[0x80]	661978	1			T1	2		T2	82		T3	341

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

16836399

1

T1

59

T2

8997

T3

19309

values[0x0]

all_enables

biggest_size

15104356

1

T1

38

T2

6265

T3

13148

values[0x1]

all_enables

biggest_size

13622029

1

T1

29

T2

5447

T3

11504