Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	33860907	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

36109663

1

T1

1

T2

11046

T3

90090

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	27899334	1			T1	1		T2	14182		T3	79883
values[0x0]	19608847	1			T1	2		T2	4828		T3	49900
values[0x1]	22462389	1			T2	4792		T3	58770		T4	4926

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	24928891	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

45041679

1

T1

1

T2

16928

T3

114664

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	243681	1			T2	67		T3	103		T4	37
valid_sources[0x01]	1006764	1			T2	111		T3	245		T4	54
valid_sources[0x02]	236367	1			T2	109		T3	301		T4	26
valid_sources[0x03]	255238	1			T2	106		T3	118		T4	33
valid_sources[0x04]	232402	1			T2	103		T3	1969		T4	43
valid_sources[0x05]	247164	1			T2	53		T3	146		T4	50
valid_sources[0x06]	251992	1			T2	116		T3	218		T4	37
valid_sources[0x07]	232373	1			T2	77		T3	217		T4	34
valid_sources[0x08]	248920	1			T2	98		T3	142		T4	42
valid_sources[0x09]	239748	1			T2	105		T3	210		T4	41
valid_sources[0x0a]	277733	1			T2	101		T3	153		T4	49
valid_sources[0x0b]	235260	1			T2	81		T3	139		T4	34
valid_sources[0x0c]	227124	1			T2	106		T3	220		T4	68
valid_sources[0x0d]	230276	1			T2	83		T3	165		T4	36
valid_sources[0x0e]	227036	1			T2	81		T3	191		T4	40
valid_sources[0x0f]	230783	1			T2	117		T3	881		T4	42
valid_sources[0x10]	253884	1			T2	102		T3	311		T4	23
valid_sources[0x11]	234347	1			T2	99		T3	174		T4	37
valid_sources[0x12]	225114	1			T2	75		T3	192		T4	35
valid_sources[0x13]	233442	1			T2	77		T3	185		T4	33
valid_sources[0x14]	628102	1			T2	91		T3	160		T4	51
valid_sources[0x15]	241032	1			T2	112		T3	179		T4	45
valid_sources[0x16]	230255	1			T2	96		T3	208		T4	45
valid_sources[0x17]	272770	1			T2	96		T3	133		T4	40
valid_sources[0x18]	243379	1			T2	77		T3	161		T4	46
valid_sources[0x19]	248805	1			T2	90		T3	140		T4	34
valid_sources[0x1a]	240699	1			T2	83		T3	195		T4	49
valid_sources[0x1b]	234362	1			T2	109		T3	119		T4	27
valid_sources[0x1c]	240412	1			T2	107		T3	234		T4	49
valid_sources[0x1d]	304010	1			T2	148		T3	89		T4	48
valid_sources[0x1e]	243283	1			T2	102		T3	100		T4	35
valid_sources[0x1f]	610107	1			T2	88		T3	253		T4	48
valid_sources[0x20]	603769	1			T2	84		T3	276		T4	31
valid_sources[0x21]	233653	1			T2	90		T3	250		T4	46
valid_sources[0x22]	243784	1			T2	62		T3	305		T4	12
valid_sources[0x23]	272769	1			T2	74		T3	104		T4	26
valid_sources[0x24]	234521	1			T2	86		T3	174		T4	43
valid_sources[0x25]	245426	1			T2	90		T3	150		T4	68
valid_sources[0x26]	673087	1			T2	94		T3	131		T4	37
valid_sources[0x27]	239255	1			T2	100		T3	197		T4	39
valid_sources[0x28]	252543	1			T2	79		T3	145		T4	28
valid_sources[0x29]	272304	1			T2	86		T3	292		T4	42
valid_sources[0x2a]	240979	1			T2	116		T3	79		T4	48
valid_sources[0x2b]	656428	1			T2	106		T3	80		T4	23
valid_sources[0x2c]	248874	1			T2	137		T3	245		T4	46
valid_sources[0x2d]	236726	1			T2	74		T3	140		T4	28
valid_sources[0x2e]	230845	1			T2	81		T3	180		T4	41
valid_sources[0x2f]	234251	1			T2	75		T3	205		T4	35
valid_sources[0x30]	609090	1			T2	78		T3	131		T4	45
valid_sources[0x31]	229018	1			T2	114		T3	202		T4	38
valid_sources[0x32]	232103	1			T2	98		T3	218		T4	36
valid_sources[0x33]	253437	1			T2	85		T3	71		T4	37
valid_sources[0x34]	237810	1			T2	81		T3	159		T4	28
valid_sources[0x35]	693798	1			T2	94		T3	91		T4	43
valid_sources[0x36]	232338	1			T2	76		T3	252		T4	30
valid_sources[0x37]	231628	1			T2	116		T3	106		T4	53
valid_sources[0x38]	233200	1			T2	112		T3	283		T4	37
valid_sources[0x39]	234641	1			T2	78		T3	4950		T4	30
valid_sources[0x3a]	243040	1			T2	99		T3	131		T4	39
valid_sources[0x3b]	237188	1			T2	91		T3	286		T4	63
valid_sources[0x3c]	237233	1			T2	59		T3	92		T4	44
valid_sources[0x3d]	240358	1			T2	90		T3	132		T4	36
valid_sources[0x3e]	240409	1			T2	112		T3	8496		T4	37
valid_sources[0x3f]	253678	1			T2	66		T3	312		T4	63
valid_sources[0x40]	238728	1			T2	114		T3	281		T4	27
valid_sources[0x41]	266691	1			T2	118		T3	366		T4	40
valid_sources[0x42]	227184	1			T2	83		T3	798		T4	50
valid_sources[0x43]	233031	1			T2	73		T3	213		T4	22
valid_sources[0x44]	236012	1			T2	114		T3	387		T4	34
valid_sources[0x45]	229411	1			T2	69		T3	173		T4	49
valid_sources[0x46]	230851	1			T2	78		T3	196		T4	37
valid_sources[0x47]	244912	1			T2	76		T3	143		T4	47
valid_sources[0x48]	575033	1			T2	92		T3	150		T4	29
valid_sources[0x49]	230942	1			T2	101		T3	130		T4	59
valid_sources[0x4a]	236404	1			T2	74		T3	312		T4	51
valid_sources[0x4b]	632341	1			T2	109		T3	288		T4	41
valid_sources[0x4c]	230627	1			T2	94		T3	155		T4	47
valid_sources[0x4d]	233976	1			T2	74		T3	155		T4	39
valid_sources[0x4e]	244229	1			T2	108		T3	2493		T4	33
valid_sources[0x4f]	235888	1			T2	93		T3	123		T4	49
valid_sources[0x50]	262980	1			T2	72		T3	42		T4	56
valid_sources[0x51]	248227	1			T2	103		T3	170		T4	32
valid_sources[0x52]	230973	1			T2	108		T3	149		T4	36
valid_sources[0x53]	245757	1			T2	103		T3	241		T4	47
valid_sources[0x54]	262296	1			T2	99		T3	156		T4	32
valid_sources[0x55]	247801	1			T2	96		T3	379		T4	37
valid_sources[0x56]	237055	1			T2	90		T3	182		T4	24
valid_sources[0x57]	239548	1			T2	96		T3	121		T4	24
valid_sources[0x58]	232813	1			T2	83		T3	160		T4	34
valid_sources[0x59]	237434	1			T2	107		T3	308		T4	40
valid_sources[0x5a]	231724	1			T2	70		T3	84		T4	51
valid_sources[0x5b]	227973	1			T2	79		T3	157		T4	53
valid_sources[0x5c]	237363	1			T2	72		T3	254		T4	36
valid_sources[0x5d]	241960	1			T2	91		T3	147		T4	35
valid_sources[0x5e]	556926	1			T2	78		T3	170		T4	40
valid_sources[0x5f]	261965	1			T2	118		T3	154		T4	28
valid_sources[0x60]	261851	1			T2	110		T3	137		T4	45
valid_sources[0x61]	260602	1			T2	79		T3	122		T4	33
valid_sources[0x62]	253562	1			T2	71		T3	240		T4	30
valid_sources[0x63]	239422	1			T2	92		T3	176		T4	31
valid_sources[0x64]	235285	1			T2	69		T3	276		T4	37
valid_sources[0x65]	267042	1			T2	123		T3	184		T4	40
valid_sources[0x66]	241480	1			T2	93		T3	86		T4	30
valid_sources[0x67]	281393	1			T2	96		T3	199		T4	40
valid_sources[0x68]	235183	1			T2	98		T3	577		T4	17
valid_sources[0x69]	236989	1			T2	92		T3	157		T4	43
valid_sources[0x6a]	233318	1			T2	96		T3	139		T4	38
valid_sources[0x6b]	228427	1			T2	92		T3	167		T4	33
valid_sources[0x6c]	576787	1			T2	130		T3	153		T4	55
valid_sources[0x6d]	318084	1			T2	111		T3	140		T4	61
valid_sources[0x6e]	226036	1			T2	119		T3	225		T4	45
valid_sources[0x6f]	233777	1			T2	110		T3	266		T4	52
valid_sources[0x70]	230858	1			T2	93		T3	191		T4	24
valid_sources[0x71]	247321	1			T2	116		T3	268		T4	38
valid_sources[0x72]	238679	1			T2	105		T3	281		T4	36
valid_sources[0x73]	229150	1			T2	94		T3	191		T4	55
valid_sources[0x74]	238569	1			T2	116		T3	199		T4	43
valid_sources[0x75]	241228	1			T2	101		T3	237		T4	56
valid_sources[0x76]	277017	1			T2	95		T3	138		T4	53
valid_sources[0x77]	231945	1			T2	90		T3	184		T4	49
valid_sources[0x78]	242718	1			T2	91		T3	311		T4	43
valid_sources[0x79]	228494	1			T2	107		T3	328		T4	33
valid_sources[0x7a]	235488	1			T2	94		T3	247		T4	44
valid_sources[0x7b]	232161	1			T2	83		T3	454		T4	50
valid_sources[0x7c]	234703	1			T2	88		T3	200		T4	33
valid_sources[0x7d]	243037	1			T2	106		T3	175		T4	44
valid_sources[0x7e]	243682	1			T2	86		T3	951		T4	34
valid_sources[0x7f]	226520	1			T2	105		T3	130		T4	31
valid_sources[0x80]	266594	1			T2	70		T3	175		T4	35

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

13478868

1

T2

1675

T3

40051

T4

334

values[0x0]

all_enables

biggest_size

11911967

1

T1

1

T2

4719

T3

26823

values[0x1]

all_enables

biggest_size

10718828

1

T2

4652

T3

23216

T4

4307