Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 34099598 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 36191581 1 T1 7390 T2 4 T3 15683



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 28070900 1 T1 1742 T2 1 T3 13800
values[0x0] 19726138 1 T1 3428 T2 7 T3 9150
values[0x1] 22494141 1 T1 3545 T2 5 T3 11404



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 25212219 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 45078960 1 T1 7858 T2 5 T3 20638



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 221082 1 T1 14 T3 133 T4 205
valid_sources[0x01] 231880 1 T1 23 T3 141 T4 225
valid_sources[0x02] 219321 1 T1 27 T3 137 T4 217
valid_sources[0x03] 228681 1 T1 33 T3 133 T4 224
valid_sources[0x04] 635089 1 T1 44 T3 136 T4 196
valid_sources[0x05] 642434 1 T1 19 T3 137 T4 186
valid_sources[0x06] 259045 1 T1 61 T3 115 T4 205
valid_sources[0x07] 220712 1 T1 34 T3 121 T4 229
valid_sources[0x08] 226363 1 T1 32 T3 130 T4 227
valid_sources[0x09] 219078 1 T1 28 T3 166 T4 202
valid_sources[0x0a] 228949 1 T1 39 T3 148 T4 200
valid_sources[0x0b] 213129 1 T1 30 T3 110 T4 213
valid_sources[0x0c] 267348 1 T1 34 T3 126 T4 203
valid_sources[0x0d] 213040 1 T1 60 T3 126 T4 187
valid_sources[0x0e] 223347 1 T1 27 T3 134 T4 195
valid_sources[0x0f] 219459 1 T1 39 T3 127 T4 189
valid_sources[0x10] 217470 1 T1 28 T3 130 T4 214
valid_sources[0x11] 240941 1 T1 41 T3 139 T4 187
valid_sources[0x12] 219887 1 T1 20 T3 140 T4 196
valid_sources[0x13] 282151 1 T1 32 T3 135 T4 163
valid_sources[0x14] 220086 1 T1 37 T3 140 T4 228
valid_sources[0x15] 210898 1 T1 35 T3 128 T4 190
valid_sources[0x16] 713227 1 T1 37 T3 139 T4 201
valid_sources[0x17] 976540 1 T1 43 T2 1 T3 146
valid_sources[0x18] 250572 1 T1 33 T3 132 T4 182
valid_sources[0x19] 222051 1 T1 20 T3 139 T4 182
valid_sources[0x1a] 236857 1 T1 26 T3 137 T4 193
valid_sources[0x1b] 260396 1 T1 16 T3 125 T4 213
valid_sources[0x1c] 221058 1 T1 21 T3 132 T4 206
valid_sources[0x1d] 215399 1 T1 23 T3 138 T4 189
valid_sources[0x1e] 225283 1 T1 23 T3 152 T4 198
valid_sources[0x1f] 220344 1 T1 36 T3 131 T4 220
valid_sources[0x20] 223512 1 T1 26 T3 126 T4 199
valid_sources[0x21] 249639 1 T1 17 T3 134 T4 160
valid_sources[0x22] 220985 1 T1 33 T3 136 T4 178
valid_sources[0x23] 226215 1 T1 16 T3 129 T4 200
valid_sources[0x24] 242930 1 T1 12 T3 117 T4 201
valid_sources[0x25] 626244 1 T1 56 T3 136 T4 199
valid_sources[0x26] 224166 1 T1 41 T2 1 T3 144
valid_sources[0x27] 219467 1 T1 48 T3 132 T4 193
valid_sources[0x28] 232110 1 T1 63 T3 141 T4 180
valid_sources[0x29] 223280 1 T1 68 T3 147 T4 197
valid_sources[0x2a] 221314 1 T1 34 T3 151 T4 226
valid_sources[0x2b] 235963 1 T1 20 T3 144 T4 210
valid_sources[0x2c] 210229 1 T1 38 T3 141 T4 211
valid_sources[0x2d] 578127 1 T1 19 T3 122 T4 212
valid_sources[0x2e] 215490 1 T1 27 T3 122 T4 232
valid_sources[0x2f] 221513 1 T1 63 T3 123 T4 194
valid_sources[0x30] 232319 1 T1 39 T3 115 T4 211
valid_sources[0x31] 219981 1 T1 29 T3 117 T4 197
valid_sources[0x32] 210924 1 T1 21 T3 125 T4 192
valid_sources[0x33] 239493 1 T1 27 T3 156 T4 225
valid_sources[0x34] 234501 1 T1 35 T3 137 T4 194
valid_sources[0x35] 243772 1 T1 28 T3 126 T4 197
valid_sources[0x36] 228584 1 T1 27 T3 132 T4 189
valid_sources[0x37] 231596 1 T1 44 T3 133 T4 222
valid_sources[0x38] 232339 1 T1 21 T3 122 T4 225
valid_sources[0x39] 226202 1 T1 34 T3 126 T4 191
valid_sources[0x3a] 216103 1 T1 45 T3 147 T4 207
valid_sources[0x3b] 239705 1 T1 41 T3 159 T4 212
valid_sources[0x3c] 230478 1 T1 24 T3 129 T4 213
valid_sources[0x3d] 214125 1 T1 43 T3 156 T4 190
valid_sources[0x3e] 214671 1 T1 38 T3 147 T4 194
valid_sources[0x3f] 215233 1 T1 20 T3 133 T4 204
valid_sources[0x40] 249239 1 T1 31 T3 141 T4 200
valid_sources[0x41] 234327 1 T1 42 T3 106 T4 194
valid_sources[0x42] 266001 1 T1 32 T3 144 T4 166
valid_sources[0x43] 221227 1 T1 28 T3 136 T4 199
valid_sources[0x44] 273117 1 T1 58 T3 140 T4 223
valid_sources[0x45] 220814 1 T1 36 T3 142 T4 185
valid_sources[0x46] 212305 1 T1 15 T3 137 T4 214
valid_sources[0x47] 239781 1 T1 36 T3 119 T4 210
valid_sources[0x48] 216974 1 T1 36 T3 122 T4 210
valid_sources[0x49] 266643 1 T1 26 T3 152 T4 190
valid_sources[0x4a] 212635 1 T1 28 T2 1 T3 145
valid_sources[0x4b] 237152 1 T1 57 T2 1 T3 143
valid_sources[0x4c] 625932 1 T1 23 T2 1 T3 141
valid_sources[0x4d] 269092 1 T1 30 T3 155 T4 208
valid_sources[0x4e] 228700 1 T1 28 T3 131 T4 210
valid_sources[0x4f] 221993 1 T1 73 T3 128 T4 197
valid_sources[0x50] 231058 1 T1 55 T3 115 T4 195
valid_sources[0x51] 215295 1 T1 23 T3 122 T4 213
valid_sources[0x52] 215029 1 T1 32 T3 121 T4 218
valid_sources[0x53] 220208 1 T1 47 T3 140 T4 196
valid_sources[0x54] 628921 1 T1 18 T3 158 T4 185
valid_sources[0x55] 238448 1 T1 36 T3 137 T4 203
valid_sources[0x56] 250189 1 T1 15 T3 140 T4 199
valid_sources[0x57] 244908 1 T1 18 T3 132 T4 201
valid_sources[0x58] 214112 1 T1 27 T3 117 T4 213
valid_sources[0x59] 222271 1 T1 27 T3 165 T4 218
valid_sources[0x5a] 264919 1 T1 37 T3 130 T4 220
valid_sources[0x5b] 232633 1 T1 45 T3 152 T4 168
valid_sources[0x5c] 216324 1 T1 43 T3 123 T4 194
valid_sources[0x5d] 618812 1 T1 58 T3 120 T4 222
valid_sources[0x5e] 221925 1 T1 40 T2 1 T3 118
valid_sources[0x5f] 221676 1 T1 28 T3 142 T4 198
valid_sources[0x60] 230050 1 T1 29 T3 116 T4 190
valid_sources[0x61] 221717 1 T1 14 T3 125 T4 188
valid_sources[0x62] 619598 1 T1 48 T3 126 T4 189
valid_sources[0x63] 213169 1 T1 25 T3 119 T4 208
valid_sources[0x64] 207398 1 T1 34 T3 143 T4 183
valid_sources[0x65] 220247 1 T1 18 T3 126 T4 212
valid_sources[0x66] 290230 1 T1 30 T3 132 T4 208
valid_sources[0x67] 226779 1 T1 36 T3 127 T4 215
valid_sources[0x68] 265781 1 T1 23 T3 133 T4 191
valid_sources[0x69] 215803 1 T1 16 T3 135 T4 196
valid_sources[0x6a] 610707 1 T1 37 T3 130 T4 214
valid_sources[0x6b] 266556 1 T1 51 T3 111 T4 192
valid_sources[0x6c] 222834 1 T1 27 T3 138 T4 202
valid_sources[0x6d] 212986 1 T1 18 T3 152 T4 212
valid_sources[0x6e] 229641 1 T1 32 T3 144 T4 211
valid_sources[0x6f] 256013 1 T1 20 T3 123 T4 192
valid_sources[0x70] 212518 1 T1 50 T3 151 T4 195
valid_sources[0x71] 239673 1 T1 43 T3 158 T4 181
valid_sources[0x72] 663831 1 T1 45 T3 138 T4 215
valid_sources[0x73] 219905 1 T1 50 T3 146 T4 204
valid_sources[0x74] 220105 1 T1 28 T3 124 T4 197
valid_sources[0x75] 221951 1 T1 32 T3 128 T4 198
valid_sources[0x76] 246279 1 T1 32 T3 150 T4 173
valid_sources[0x77] 231008 1 T1 48 T3 136 T4 186
valid_sources[0x78] 586110 1 T1 75 T3 143 T4 181
valid_sources[0x79] 211291 1 T1 47 T3 124 T4 215
valid_sources[0x7a] 659428 1 T1 38 T3 112 T4 195
valid_sources[0x7b] 252048 1 T1 57 T3 124 T4 213
valid_sources[0x7c] 229480 1 T1 36 T3 142 T4 177
valid_sources[0x7d] 220893 1 T1 28 T3 133 T4 210
valid_sources[0x7e] 213458 1 T1 45 T3 155 T4 189
valid_sources[0x7f] 214242 1 T1 19 T3 106 T4 221
valid_sources[0x80] 214236 1 T1 46 T3 159 T4 203



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 13604943 1 T1 599 T2 1 T3 7004
values[0x0] all_enables biggest_size 11912362 1 T1 3363 T2 1 T3 4563
values[0x1] all_enables biggest_size 10674276 1 T1 3428 T2 2 T3 4116

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%