Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	39189956	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

42056048

1

T1

7741

T2

1

T3

14410

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	32333047	1			T1	6823		T2	1		T3	15600
values[0x0]	22830576	1			T1	4410		T2	3		T3	7479
values[0x1]	26082381	1			T1	5406		T2	3		T3	8485

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	28932369	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

52313635

1

T1

10131

T2

1

T3

18369

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	276650	1			T1	40		T3	130		T4	321
valid_sources[0x01]	274661	1			T1	85		T3	103		T4	297
valid_sources[0x02]	1017096	1			T1	38		T3	119		T4	408
valid_sources[0x03]	257665	1			T1	10		T3	87		T4	238
valid_sources[0x04]	282161	1			T1	49		T3	117		T4	4476
valid_sources[0x05]	253141	1			T1	38		T3	125		T4	230
valid_sources[0x06]	968010	1			T1	74		T3	110		T4	350
valid_sources[0x07]	284817	1			T1	39		T3	135		T4	3845
valid_sources[0x08]	254875	1			T1	90		T3	131		T4	274
valid_sources[0x09]	253825	1			T1	10		T3	117		T4	422
valid_sources[0x0a]	255165	1			T1	33		T3	160		T4	342
valid_sources[0x0b]	267232	1			T1	18		T3	101		T4	446
valid_sources[0x0c]	289243	1			T1	76		T3	115		T4	234
valid_sources[0x0d]	716979	1			T1	8		T3	156		T4	415
valid_sources[0x0e]	267669	1			T1	6		T3	145		T4	3945
valid_sources[0x0f]	283956	1			T1	5		T3	133		T4	314
valid_sources[0x10]	624954	1			T1	66		T3	139		T4	599
valid_sources[0x11]	266129	1			T1	34		T3	117		T4	288
valid_sources[0x12]	683020	1			T1	11		T3	86		T4	280
valid_sources[0x13]	262985	1			T1	47		T3	114		T4	338
valid_sources[0x14]	284692	1			T1	133		T3	164		T4	371
valid_sources[0x15]	255791	1			T1	67		T3	120		T4	348
valid_sources[0x16]	290378	1			T1	34		T3	131		T4	214
valid_sources[0x17]	260048	1			T1	26		T3	121		T4	573
valid_sources[0x18]	258584	1			T1	5		T3	95		T4	352
valid_sources[0x19]	259497	1			T1	40		T3	148		T4	439
valid_sources[0x1a]	263371	1			T1	28		T3	113		T4	229
valid_sources[0x1b]	276177	1			T1	9		T3	105		T4	312
valid_sources[0x1c]	258548	1			T1	11		T3	111		T4	767
valid_sources[0x1d]	266546	1			T1	10		T3	140		T4	2462
valid_sources[0x1e]	272852	1			T1	93		T3	128		T4	380
valid_sources[0x1f]	273559	1			T1	15		T3	101		T4	317
valid_sources[0x20]	263903	1			T1	69		T3	111		T4	255
valid_sources[0x21]	262155	1			T1	9		T3	102		T4	516
valid_sources[0x22]	270830	1			T1	47		T3	102		T4	4341
valid_sources[0x23]	267119	1			T1	26		T3	101		T4	270
valid_sources[0x24]	273050	1			T1	46		T3	123		T4	355
valid_sources[0x25]	264734	1			T1	48		T3	94		T4	235
valid_sources[0x26]	267044	1			T1	18		T3	113		T4	430
valid_sources[0x27]	332883	1			T1	29		T3	151		T4	489
valid_sources[0x28]	266254	1			T1	93		T3	117		T4	245
valid_sources[0x29]	268818	1			T1	7		T3	143		T4	327
valid_sources[0x2a]	298311	1			T1	72		T3	107		T4	174
valid_sources[0x2b]	284271	1			T1	192		T3	99		T4	351
valid_sources[0x2c]	260367	1			T1	42		T3	145		T4	293
valid_sources[0x2d]	264261	1			T3	127		T4	315		T5	6065
valid_sources[0x2e]	346604	1			T1	68		T3	150		T4	161
valid_sources[0x2f]	294627	1			T1	76		T3	137		T4	396
valid_sources[0x30]	652566	1			T1	3		T3	97		T4	349
valid_sources[0x31]	291561	1			T1	29		T3	130		T4	412
valid_sources[0x32]	276946	1			T1	19		T3	84		T4	251
valid_sources[0x33]	265065	1			T1	73		T3	153		T4	361
valid_sources[0x34]	257702	1			T1	34		T3	151		T4	353
valid_sources[0x35]	281957	1			T1	2		T3	147		T4	192
valid_sources[0x36]	255884	1			T1	33		T3	135		T4	384
valid_sources[0x37]	254486	1			T1	28		T3	132		T4	413
valid_sources[0x38]	304307	1			T1	31		T3	126		T4	269
valid_sources[0x39]	257983	1			T1	23		T3	139		T4	327
valid_sources[0x3a]	275081	1			T1	143		T3	112		T4	527
valid_sources[0x3b]	268399	1			T1	42		T3	131		T4	364
valid_sources[0x3c]	278338	1			T1	49		T3	104		T4	377
valid_sources[0x3d]	262577	1			T1	5		T3	129		T4	274
valid_sources[0x3e]	257671	1			T1	102		T3	126		T4	330
valid_sources[0x3f]	269570	1			T1	15		T3	135		T4	609
valid_sources[0x40]	254691	1			T1	19		T3	132		T4	390
valid_sources[0x41]	257241	1			T1	48		T3	124		T4	566
valid_sources[0x42]	254710	1			T1	15		T3	128		T4	420
valid_sources[0x43]	296669	1			T1	31		T3	121		T4	369
valid_sources[0x44]	278315	1			T1	7		T3	115		T4	312
valid_sources[0x45]	641766	1			T1	77		T3	131		T4	288
valid_sources[0x46]	277005	1			T1	10		T3	109		T4	1049
valid_sources[0x47]	649000	1			T1	70		T3	139		T4	444
valid_sources[0x48]	268839	1			T1	51		T3	151		T4	371
valid_sources[0x49]	293371	1			T1	32		T3	139		T4	367
valid_sources[0x4a]	255456	1			T1	31		T3	123		T4	376
valid_sources[0x4b]	259910	1			T1	45		T3	136		T4	351
valid_sources[0x4c]	265420	1			T1	6		T3	115		T4	680
valid_sources[0x4d]	262056	1			T1	36		T3	137		T4	351
valid_sources[0x4e]	264755	1			T1	11		T3	132		T4	219
valid_sources[0x4f]	278670	1			T1	18		T3	122		T4	256
valid_sources[0x50]	282635	1			T1	34		T3	134		T4	334
valid_sources[0x51]	261664	1			T1	36		T3	118		T4	286
valid_sources[0x52]	272885	1			T1	33		T3	136		T4	328
valid_sources[0x53]	256854	1			T1	42		T3	81		T4	554
valid_sources[0x54]	306915	1			T1	60		T3	109		T4	333
valid_sources[0x55]	279095	1			T1	23		T3	135		T4	194
valid_sources[0x56]	258140	1			T1	45		T3	118		T4	302
valid_sources[0x57]	663671	1			T1	17		T3	100		T4	346
valid_sources[0x58]	269517	1			T1	50		T3	147		T4	295
valid_sources[0x59]	271519	1			T1	52		T3	112		T4	478
valid_sources[0x5a]	260933	1			T1	12		T3	105		T4	465
valid_sources[0x5b]	259682	1			T1	21		T3	143		T4	439
valid_sources[0x5c]	293125	1			T1	47		T3	128		T4	634
valid_sources[0x5d]	257311	1			T1	37		T3	140		T4	2454
valid_sources[0x5e]	257273	1			T1	36		T3	106		T4	334
valid_sources[0x5f]	278077	1			T1	35		T3	107		T4	253
valid_sources[0x60]	260467	1			T1	40		T3	124		T4	1963
valid_sources[0x61]	261642	1			T1	15		T3	98		T4	317
valid_sources[0x62]	604569	1			T1	78		T3	92		T4	299
valid_sources[0x63]	264435	1			T1	21		T3	108		T4	322
valid_sources[0x64]	264388	1			T1	41		T3	130		T4	383
valid_sources[0x65]	262046	1			T1	87		T3	143		T4	317
valid_sources[0x66]	256525	1			T1	26		T3	121		T4	314
valid_sources[0x67]	271070	1			T1	1		T3	118		T4	542
valid_sources[0x68]	272940	1			T1	113		T3	125		T4	330
valid_sources[0x69]	290098	1			T1	3457		T3	127		T4	296
valid_sources[0x6a]	255124	1			T1	12		T3	145		T4	382
valid_sources[0x6b]	274860	1			T1	2874		T3	81		T4	11518
valid_sources[0x6c]	261961	1			T1	12		T3	106		T4	489
valid_sources[0x6d]	272818	1			T1	28		T3	124		T4	269
valid_sources[0x6e]	297792	1			T1	43		T3	116		T4	299
valid_sources[0x6f]	261366	1			T1	115		T3	144		T4	259
valid_sources[0x70]	255947	1			T1	21		T3	114		T4	470
valid_sources[0x71]	289725	1			T1	41		T3	120		T4	449
valid_sources[0x72]	272404	1			T1	45		T3	115		T4	1482
valid_sources[0x73]	256919	1			T1	18		T3	98		T4	546
valid_sources[0x74]	257451	1			T1	29		T3	113		T4	175
valid_sources[0x75]	279906	1			T1	21		T3	117		T4	347
valid_sources[0x76]	625537	1			T1	56		T3	132		T4	355
valid_sources[0x77]	265320	1			T1	42		T3	106		T4	5089
valid_sources[0x78]	615587	1			T1	80		T3	129		T4	323
valid_sources[0x79]	288947	1			T1	26		T3	154		T4	534
valid_sources[0x7a]	272287	1			T1	38		T3	87		T4	5884
valid_sources[0x7b]	283472	1			T1	6		T3	142		T4	280
valid_sources[0x7c]	273503	1			T1	5		T3	114		T4	238
valid_sources[0x7d]	273120	1			T1	21		T3	118		T4	330
valid_sources[0x7e]	273733	1			T3	142		T4	422		T5	6036
valid_sources[0x7f]	644457	1			T1	56		T3	107		T4	359
valid_sources[0x80]	660641	1			T1	39		T3	115		T4	450

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

15713538

1

T1

3432

T2

1

T3

7785

values[0x0]

all_enables

biggest_size

13868079

1

T1

2312

T3

3654

T4

101709

values[0x1]

all_enables

biggest_size

12474431

1

T1

1997

T3

2971

T4

91152