Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 40675103 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 43099007 1 T1 21163 T2 28288 T3 130



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 33615495 1 T1 18362 T2 24817 T3 135
values[0x0] 23394584 1 T1 11986 T2 16189 T3 62
values[0x1] 26764031 1 T1 13688 T2 19865 T3 68



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 29871124 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 53902986 1 T1 26599 T2 37076 T3 161



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 281426 1 T1 170 T2 231 T3 3
valid_sources[0x01] 291527 1 T1 173 T2 290 T26 3
valid_sources[0x02] 679281 1 T1 183 T2 254 T5 95
valid_sources[0x03] 268807 1 T1 149 T2 296 T5 83
valid_sources[0x04] 282068 1 T1 156 T2 234 T26 9
valid_sources[0x05] 284394 1 T1 140 T2 231 T5 80
valid_sources[0x06] 275780 1 T1 168 T2 309 T3 3
valid_sources[0x07] 294111 1 T1 157 T2 224 T5 105
valid_sources[0x08] 288416 1 T1 190 T2 202 T5 81
valid_sources[0x09] 658099 1 T1 197 T2 170 T3 5
valid_sources[0x0a] 688586 1 T1 154 T2 217 T3 2
valid_sources[0x0b] 278263 1 T1 175 T2 197 T3 1
valid_sources[0x0c] 280561 1 T1 136 T2 214 T26 1
valid_sources[0x0d] 323171 1 T1 187 T2 297 T26 16
valid_sources[0x0e] 264841 1 T1 174 T2 143 T3 1
valid_sources[0x0f] 277306 1 T1 157 T2 198 T3 1
valid_sources[0x10] 304125 1 T1 175 T2 258 T3 2
valid_sources[0x11] 273147 1 T1 192 T2 262 T3 2
valid_sources[0x12] 272817 1 T1 162 T2 242 T5 78
valid_sources[0x13] 706604 1 T1 142 T2 278 T5 105
valid_sources[0x14] 268298 1 T1 177 T2 176 T3 1
valid_sources[0x15] 308074 1 T1 165 T2 221 T5 73
valid_sources[0x16] 322183 1 T1 186 T2 205 T26 2
valid_sources[0x17] 270704 1 T1 147 T2 207 T3 3
valid_sources[0x18] 283382 1 T1 184 T2 171 T3 1
valid_sources[0x19] 276175 1 T1 189 T2 152 T5 89
valid_sources[0x1a] 273730 1 T1 146 T2 261 T5 54
valid_sources[0x1b] 294765 1 T1 175 T2 299 T5 100
valid_sources[0x1c] 278220 1 T1 158 T2 272 T5 107
valid_sources[0x1d] 282685 1 T1 154 T2 271 T5 103
valid_sources[0x1e] 276898 1 T1 144 T2 201 T5 117
valid_sources[0x1f] 270485 1 T1 141 T2 312 T3 1
valid_sources[0x20] 266405 1 T1 121 T2 373 T3 5
valid_sources[0x21] 275905 1 T1 190 T2 257 T5 78
valid_sources[0x22] 274456 1 T1 130 T2 162 T5 120
valid_sources[0x23] 266739 1 T1 160 T2 220 T3 5
valid_sources[0x24] 279046 1 T1 158 T2 289 T3 1
valid_sources[0x25] 723494 1 T1 146 T2 343 T3 1
valid_sources[0x26] 277088 1 T1 168 T2 180 T5 111
valid_sources[0x27] 282005 1 T1 154 T2 290 T3 1
valid_sources[0x28] 317416 1 T1 161 T2 421 T3 1
valid_sources[0x29] 667666 1 T1 180 T2 422 T5 116
valid_sources[0x2a] 297560 1 T1 154 T2 219 T5 76
valid_sources[0x2b] 273955 1 T1 158 T2 139 T3 2
valid_sources[0x2c] 278622 1 T1 148 T2 173 T5 96
valid_sources[0x2d] 694102 1 T1 193 T2 319 T3 1
valid_sources[0x2e] 288194 1 T1 202 T2 185 T3 1
valid_sources[0x2f] 336134 1 T1 130 T2 142 T26 1
valid_sources[0x30] 1215395 1 T1 169 T2 132 T3 2
valid_sources[0x31] 273771 1 T1 198 T2 283 T3 1
valid_sources[0x32] 265284 1 T1 173 T2 223 T5 96
valid_sources[0x33] 276324 1 T1 137 T2 192 T5 98
valid_sources[0x34] 278406 1 T1 173 T2 201 T3 2
valid_sources[0x35] 715075 1 T1 185 T2 308 T3 1
valid_sources[0x36] 282596 1 T1 166 T2 337 T5 61
valid_sources[0x37] 271634 1 T1 150 T2 237 T5 114
valid_sources[0x38] 675589 1 T1 184 T2 234 T5 87
valid_sources[0x39] 274691 1 T1 199 T2 396 T3 1
valid_sources[0x3a] 279816 1 T1 144 T2 165 T3 1
valid_sources[0x3b] 308307 1 T1 174 T2 223 T3 1
valid_sources[0x3c] 270500 1 T1 165 T2 90 T5 96
valid_sources[0x3d] 277849 1 T1 156 T2 280 T3 1
valid_sources[0x3e] 760748 1 T1 186 T2 246 T26 3
valid_sources[0x3f] 263744 1 T1 214 T2 502 T5 93
valid_sources[0x40] 272162 1 T1 172 T2 272 T3 1
valid_sources[0x41] 307108 1 T1 165 T2 251 T5 95
valid_sources[0x42] 302750 1 T1 145 T2 175 T3 1
valid_sources[0x43] 262411 1 T1 159 T2 374 T3 1
valid_sources[0x44] 267163 1 T1 197 T2 270 T3 2
valid_sources[0x45] 273093 1 T1 173 T2 211 T3 1
valid_sources[0x46] 298763 1 T1 158 T2 308 T23 25
valid_sources[0x47] 263361 1 T1 155 T2 125 T5 76
valid_sources[0x48] 280559 1 T1 215 T2 262 T3 3
valid_sources[0x49] 293029 1 T1 149 T2 271 T5 112
valid_sources[0x4a] 271859 1 T1 160 T2 279 T3 2
valid_sources[0x4b] 270624 1 T1 158 T2 275 T3 2
valid_sources[0x4c] 318449 1 T1 127 T2 82 T3 2
valid_sources[0x4d] 286651 1 T1 167 T2 123 T5 103
valid_sources[0x4e] 278879 1 T1 144 T2 142 T5 106
valid_sources[0x4f] 275443 1 T1 208 T2 231 T3 1
valid_sources[0x50] 280374 1 T1 186 T2 344 T26 7
valid_sources[0x51] 270718 1 T1 167 T2 148 T26 8
valid_sources[0x52] 286346 1 T1 151 T2 311 T3 4
valid_sources[0x53] 288699 1 T1 182 T2 135 T26 2
valid_sources[0x54] 275017 1 T1 178 T2 176 T3 1
valid_sources[0x55] 289586 1 T1 177 T2 207 T3 1
valid_sources[0x56] 274954 1 T1 147 T2 311 T3 2
valid_sources[0x57] 273661 1 T1 203 T2 352 T3 3
valid_sources[0x58] 684001 1 T1 202 T2 305 T3 1
valid_sources[0x59] 291847 1 T1 196 T2 135 T3 4
valid_sources[0x5a] 272394 1 T1 200 T2 236 T3 2
valid_sources[0x5b] 302240 1 T1 168 T2 208 T5 92
valid_sources[0x5c] 285365 1 T1 127 T2 125 T3 1
valid_sources[0x5d] 270662 1 T1 240 T2 185 T3 1
valid_sources[0x5e] 263524 1 T1 159 T2 369 T5 112
valid_sources[0x5f] 268576 1 T1 178 T2 239 T5 122
valid_sources[0x60] 1044462 1 T1 152 T2 264 T5 110
valid_sources[0x61] 283568 1 T1 190 T2 232 T5 47
valid_sources[0x62] 277863 1 T1 170 T2 200 T5 74
valid_sources[0x63] 272770 1 T1 142 T2 183 T3 2
valid_sources[0x64] 278052 1 T1 180 T2 214 T3 2
valid_sources[0x65] 308501 1 T1 187 T2 120 T3 3
valid_sources[0x66] 681640 1 T1 215 T2 197 T3 3
valid_sources[0x67] 298642 1 T1 206 T2 352 T3 2
valid_sources[0x68] 288877 1 T1 149 T2 384 T3 1
valid_sources[0x69] 275971 1 T1 160 T2 229 T5 130
valid_sources[0x6a] 301240 1 T1 157 T2 204 T5 112
valid_sources[0x6b] 279794 1 T1 170 T2 225 T5 112
valid_sources[0x6c] 283301 1 T1 163 T2 179 T3 1
valid_sources[0x6d] 289133 1 T1 167 T2 338 T3 3
valid_sources[0x6e] 270213 1 T1 195 T2 386 T3 1
valid_sources[0x6f] 268161 1 T1 210 T2 178 T5 144
valid_sources[0x70] 368119 1 T1 139 T2 179 T5 98
valid_sources[0x71] 308284 1 T1 205 T2 259 T3 2
valid_sources[0x72] 267070 1 T1 214 T2 197 T3 3
valid_sources[0x73] 695495 1 T1 168 T2 335 T3 1
valid_sources[0x74] 324061 1 T1 199 T2 224 T3 1
valid_sources[0x75] 266443 1 T1 196 T2 226 T3 1
valid_sources[0x76] 276209 1 T1 148 T2 166 T5 108
valid_sources[0x77] 270713 1 T1 146 T2 249 T3 2
valid_sources[0x78] 275906 1 T1 155 T2 166 T3 1
valid_sources[0x79] 303029 1 T1 187 T2 114 T5 91
valid_sources[0x7a] 308786 1 T1 223 T2 331 T5 88
valid_sources[0x7b] 275616 1 T1 168 T2 118 T5 115
valid_sources[0x7c] 272286 1 T1 135 T2 342 T5 76
valid_sources[0x7d] 268953 1 T1 170 T2 163 T26 11
valid_sources[0x7e] 286700 1 T1 177 T2 205 T5 101
valid_sources[0x7f] 280422 1 T1 187 T2 154 T5 80
valid_sources[0x80] 275622 1 T1 178 T2 324 T3 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 16051577 1 T1 9229 T2 12334 T3 58
values[0x0] all_enables biggest_size 14239642 1 T1 6428 T2 8454 T3 37
values[0x1] all_enables biggest_size 12807788 1 T1 5506 T2 7500 T3 35

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%