Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 35076623 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 37508893 1 T1 72410 T2 26782 T3 24470



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 28960037 1 T1 60572 T2 24340 T3 10269
values[0x0] 20328264 1 T1 39726 T2 15545 T3 11027
values[0x1] 23297215 1 T1 44462 T2 19475 T3 10895



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 25748615 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 46836901 1 T1 90079 T2 35571 T3 27256



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 254390 1 T1 682 T2 284 T3 120
valid_sources[0x01] 243228 1 T1 203 T2 184 T3 142
valid_sources[0x02] 250405 1 T1 806 T2 144 T3 120
valid_sources[0x03] 264257 1 T1 450 T2 229 T3 116
valid_sources[0x04] 251077 1 T1 565 T2 185 T3 123
valid_sources[0x05] 264850 1 T1 551 T2 183 T3 109
valid_sources[0x06] 281653 1 T1 652 T2 198 T3 109
valid_sources[0x07] 236716 1 T1 566 T2 121 T3 123
valid_sources[0x08] 291832 1 T1 532 T2 165 T3 125
valid_sources[0x09] 242336 1 T1 425 T2 116 T3 126
valid_sources[0x0a] 261744 1 T1 688 T2 154 T3 161
valid_sources[0x0b] 242451 1 T1 484 T2 113 T3 123
valid_sources[0x0c] 239667 1 T1 538 T2 69 T3 127
valid_sources[0x0d] 643651 1 T1 424 T2 179 T3 111
valid_sources[0x0e] 253085 1 T1 481 T2 56 T3 121
valid_sources[0x0f] 258504 1 T1 479 T2 157 T3 138
valid_sources[0x10] 250133 1 T1 385 T2 118 T3 102
valid_sources[0x11] 242655 1 T1 557 T2 123 T3 115
valid_sources[0x12] 259767 1 T1 456 T2 135 T3 123
valid_sources[0x13] 640342 1 T1 522 T2 165 T3 109
valid_sources[0x14] 241805 1 T1 538 T2 247 T3 119
valid_sources[0x15] 239121 1 T1 549 T2 229 T3 139
valid_sources[0x16] 242429 1 T1 811 T2 97 T3 151
valid_sources[0x17] 242065 1 T1 685 T2 253 T3 126
valid_sources[0x18] 253112 1 T1 406 T2 153 T3 129
valid_sources[0x19] 263528 1 T1 556 T2 152 T3 130
valid_sources[0x1a] 287768 1 T1 550 T2 273 T3 129
valid_sources[0x1b] 251375 1 T1 466 T2 210 T3 128
valid_sources[0x1c] 657566 1 T1 559 T2 212 T3 121
valid_sources[0x1d] 243559 1 T1 491 T2 263 T3 100
valid_sources[0x1e] 245469 1 T1 687 T2 174 T3 147
valid_sources[0x1f] 243441 1 T1 567 T2 139 T3 130
valid_sources[0x20] 268684 1 T1 516 T2 187 T3 117
valid_sources[0x21] 241494 1 T1 621 T2 249 T3 140
valid_sources[0x22] 611855 1 T1 484 T2 137 T3 121
valid_sources[0x23] 253833 1 T1 627 T2 199 T3 126
valid_sources[0x24] 240444 1 T1 443 T2 231 T3 149
valid_sources[0x25] 262063 1 T1 517 T2 214 T3 115
valid_sources[0x26] 244407 1 T1 495 T2 151 T3 115
valid_sources[0x27] 240374 1 T1 547 T2 151 T3 128
valid_sources[0x28] 246929 1 T1 606 T2 247 T3 127
valid_sources[0x29] 243984 1 T1 655 T2 68 T3 124
valid_sources[0x2a] 246334 1 T1 585 T2 164 T3 146
valid_sources[0x2b] 609003 1 T1 640 T2 170 T3 118
valid_sources[0x2c] 254006 1 T1 603 T2 128 T3 147
valid_sources[0x2d] 252344 1 T1 700 T2 133 T3 145
valid_sources[0x2e] 300652 1 T1 575 T2 266 T3 148
valid_sources[0x2f] 280075 1 T1 703 T2 102 T3 131
valid_sources[0x30] 249523 1 T1 595 T2 84 T3 120
valid_sources[0x31] 264481 1 T1 571 T2 170 T3 106
valid_sources[0x32] 244229 1 T1 433 T2 34 T3 152
valid_sources[0x33] 264959 1 T1 482 T2 435 T3 124
valid_sources[0x34] 245381 1 T1 658 T2 346 T3 114
valid_sources[0x35] 265277 1 T1 633 T2 70 T3 125
valid_sources[0x36] 306030 1 T1 455 T2 183 T3 127
valid_sources[0x37] 241343 1 T1 654 T2 161 T3 124
valid_sources[0x38] 242330 1 T1 583 T2 124 T3 156
valid_sources[0x39] 239226 1 T1 870 T2 287 T3 98
valid_sources[0x3a] 245403 1 T1 572 T2 217 T3 106
valid_sources[0x3b] 248141 1 T1 559 T2 168 T3 122
valid_sources[0x3c] 258096 1 T1 608 T2 171 T3 103
valid_sources[0x3d] 239848 1 T1 672 T2 262 T3 133
valid_sources[0x3e] 242612 1 T1 739 T2 228 T3 124
valid_sources[0x3f] 245002 1 T1 409 T2 198 T3 126
valid_sources[0x40] 258420 1 T1 574 T2 229 T3 94
valid_sources[0x41] 242742 1 T1 550 T2 203 T3 127
valid_sources[0x42] 247298 1 T1 566 T2 73 T3 133
valid_sources[0x43] 701964 1 T1 565 T2 127 T3 106
valid_sources[0x44] 244120 1 T1 593 T2 316 T3 107
valid_sources[0x45] 263640 1 T1 571 T2 211 T3 112
valid_sources[0x46] 275907 1 T1 612 T2 130 T3 148
valid_sources[0x47] 252752 1 T1 721 T2 197 T3 122
valid_sources[0x48] 242034 1 T1 409 T2 228 T3 125
valid_sources[0x49] 256865 1 T1 526 T2 273 T3 129
valid_sources[0x4a] 246100 1 T1 503 T2 179 T3 112
valid_sources[0x4b] 659564 1 T1 842 T2 219 T3 151
valid_sources[0x4c] 247990 1 T1 493 T2 215 T3 136
valid_sources[0x4d] 265090 1 T1 701 T2 185 T3 124
valid_sources[0x4e] 267804 1 T1 666 T2 1852 T3 139
valid_sources[0x4f] 251463 1 T1 578 T2 114 T3 121
valid_sources[0x50] 253160 1 T1 702 T2 190 T3 123
valid_sources[0x51] 244717 1 T1 454 T2 123 T3 158
valid_sources[0x52] 249761 1 T1 514 T2 337 T3 114
valid_sources[0x53] 665782 1 T1 584 T2 195 T3 131
valid_sources[0x54] 259452 1 T1 830 T2 258 T3 126
valid_sources[0x55] 654443 1 T1 472 T2 197 T3 161
valid_sources[0x56] 306406 1 T1 588 T2 112 T3 135
valid_sources[0x57] 243067 1 T1 408 T2 150 T3 122
valid_sources[0x58] 274588 1 T1 612 T2 104 T3 126
valid_sources[0x59] 247448 1 T1 635 T2 103 T3 135
valid_sources[0x5a] 244578 1 T1 434 T2 295 T3 109
valid_sources[0x5b] 664946 1 T1 571 T2 133 T3 103
valid_sources[0x5c] 254279 1 T1 617 T2 429 T3 115
valid_sources[0x5d] 252463 1 T1 705 T2 149 T3 109
valid_sources[0x5e] 241557 1 T1 807 T2 91 T3 120
valid_sources[0x5f] 256647 1 T1 757 T2 94 T3 127
valid_sources[0x60] 268422 1 T1 589 T2 168 T3 133
valid_sources[0x61] 246904 1 T1 646 T2 183 T3 167
valid_sources[0x62] 242637 1 T1 538 T2 67 T3 100
valid_sources[0x63] 248303 1 T1 750 T2 235 T3 138
valid_sources[0x64] 243895 1 T1 538 T2 71 T3 112
valid_sources[0x65] 286052 1 T1 603 T2 414 T3 127
valid_sources[0x66] 260099 1 T1 456 T2 236 T3 123
valid_sources[0x67] 262439 1 T1 572 T2 167 T3 145
valid_sources[0x68] 251334 1 T1 561 T2 121 T3 89
valid_sources[0x69] 243485 1 T1 656 T2 160 T3 102
valid_sources[0x6a] 243765 1 T1 585 T2 147 T3 147
valid_sources[0x6b] 243944 1 T1 828 T2 108 T3 121
valid_sources[0x6c] 260777 1 T1 774 T2 195 T3 126
valid_sources[0x6d] 263927 1 T1 564 T2 180 T3 132
valid_sources[0x6e] 240959 1 T1 395 T2 146 T3 163
valid_sources[0x6f] 312108 1 T1 420 T2 267 T3 118
valid_sources[0x70] 1013112 1 T1 630 T2 141 T3 127
valid_sources[0x71] 242018 1 T1 656 T2 164 T3 125
valid_sources[0x72] 240502 1 T1 514 T2 152 T3 141
valid_sources[0x73] 236934 1 T1 399 T2 158 T3 123
valid_sources[0x74] 260773 1 T1 630 T2 210 T3 90
valid_sources[0x75] 263962 1 T1 632 T2 298 T3 102
valid_sources[0x76] 236619 1 T1 613 T2 213 T3 130
valid_sources[0x77] 241359 1 T1 564 T2 249 T3 123
valid_sources[0x78] 258196 1 T1 468 T2 169 T3 112
valid_sources[0x79] 300318 1 T1 413 T2 175 T3 111
valid_sources[0x7a] 255547 1 T1 374 T2 207 T3 146
valid_sources[0x7b] 240151 1 T1 531 T2 206 T3 94
valid_sources[0x7c] 255111 1 T1 373 T2 371 T3 139
valid_sources[0x7d] 239562 1 T1 456 T2 103 T3 93
valid_sources[0x7e] 290869 1 T1 699 T2 247 T3 113
valid_sources[0x7f] 259443 1 T1 713 T2 154 T3 137
valid_sources[0x80] 259287 1 T1 409 T2 338 T3 103



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 13899785 1 T1 30172 T2 11742 T3 2996
values[0x0] all_enables biggest_size 12416725 1 T1 22575 T2 7975 T3 10830
values[0x1] all_enables biggest_size 11192383 1 T1 19663 T2 7065 T3 10644

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%