Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	41495761	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

44213827

1

T1

1773

T2

351945

T3

8091

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	34156139	1			T1	1072		T2	282625		T3	10680
values[0x0]	23987233	1			T1	723		T2	194678		T3	3804
values[0x1]	27566216	1			T1	765		T2	224178		T3	3831

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	30464996	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

55244592

1

T1

2098

T2

440774

T3

12831

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	295632	1			T1	6		T2	495		T3	49
valid_sources[0x01]	318833	1			T1	3		T2	663		T3	48
valid_sources[0x02]	288477	1			T1	3		T2	388		T3	68
valid_sources[0x03]	302998	1			T2	909		T3	69		T4	365
valid_sources[0x04]	297692	1			T1	29		T2	7890		T3	62
valid_sources[0x05]	284993	1			T2	918		T3	69		T4	308
valid_sources[0x06]	296222	1			T1	5		T2	586		T3	80
valid_sources[0x07]	285245	1			T2	560		T3	68		T4	292
valid_sources[0x08]	362484	1			T2	718		T3	74		T4	300
valid_sources[0x09]	293883	1			T1	11		T2	626		T3	59
valid_sources[0x0a]	281615	1			T1	3		T2	510		T3	96
valid_sources[0x0b]	296018	1			T2	8269		T3	72		T4	277
valid_sources[0x0c]	316263	1			T2	847		T3	77		T4	294
valid_sources[0x0d]	293629	1			T1	34		T2	666		T3	55
valid_sources[0x0e]	313128	1			T1	8		T2	668		T3	63
valid_sources[0x0f]	289834	1			T2	795		T3	72		T4	282
valid_sources[0x10]	662072	1			T1	6		T2	682		T3	57
valid_sources[0x11]	283203	1			T1	8		T2	579		T3	74
valid_sources[0x12]	327688	1			T1	15		T2	910		T3	66
valid_sources[0x13]	282528	1			T2	563		T3	67		T4	303
valid_sources[0x14]	300534	1			T1	31		T2	509		T3	79
valid_sources[0x15]	293820	1			T1	3		T2	460		T3	106
valid_sources[0x16]	295278	1			T1	11		T2	709		T3	76
valid_sources[0x17]	297658	1			T2	547		T3	62		T4	267
valid_sources[0x18]	284486	1			T1	32		T2	529		T3	79
valid_sources[0x19]	304883	1			T2	948		T3	73		T4	293
valid_sources[0x1a]	297968	1			T1	5		T2	708		T3	82
valid_sources[0x1b]	308871	1			T1	11		T2	568		T3	78
valid_sources[0x1c]	292052	1			T2	567		T3	85		T4	268
valid_sources[0x1d]	285953	1			T1	36		T2	765		T3	88
valid_sources[0x1e]	291196	1			T2	755		T3	76		T4	315
valid_sources[0x1f]	344356	1			T1	11		T2	642		T3	70
valid_sources[0x20]	294850	1			T2	690		T3	86		T4	323
valid_sources[0x21]	282284	1			T1	5		T2	700		T3	101
valid_sources[0x22]	289727	1			T1	21		T2	542		T3	60
valid_sources[0x23]	287772	1			T1	14		T2	638		T3	73
valid_sources[0x24]	301517	1			T1	17		T2	906		T3	87
valid_sources[0x25]	339030	1			T1	8		T2	510		T3	93
valid_sources[0x26]	286429	1			T1	8		T2	827		T3	83
valid_sources[0x27]	289910	1			T1	22		T2	643		T3	55
valid_sources[0x28]	297498	1			T1	3		T2	534		T3	76
valid_sources[0x29]	301924	1			T2	565		T3	75		T4	265
valid_sources[0x2a]	650143	1			T2	884		T3	53		T4	333
valid_sources[0x2b]	296786	1			T1	11		T2	662		T3	70
valid_sources[0x2c]	299375	1			T1	5		T2	478		T3	71
valid_sources[0x2d]	296160	1			T2	7039		T3	55		T4	297
valid_sources[0x2e]	295317	1			T1	17		T2	592		T3	69
valid_sources[0x2f]	286315	1			T1	25		T2	889		T3	61
valid_sources[0x30]	294216	1			T1	45		T2	524		T3	65
valid_sources[0x31]	307882	1			T2	632		T3	94		T4	295
valid_sources[0x32]	292929	1			T2	619		T3	60		T4	291
valid_sources[0x33]	302934	1			T2	17198		T3	86		T4	300
valid_sources[0x34]	285909	1			T1	35		T2	447		T3	70
valid_sources[0x35]	681764	1			T1	9		T2	1016		T3	82
valid_sources[0x36]	293027	1			T1	8		T2	4111		T3	59
valid_sources[0x37]	301128	1			T1	3		T2	698		T3	64
valid_sources[0x38]	295599	1			T1	11		T2	784		T3	68
valid_sources[0x39]	682338	1			T1	33		T2	627		T3	53
valid_sources[0x3a]	285935	1			T1	15		T2	484		T3	73
valid_sources[0x3b]	317951	1			T2	5401		T3	64		T4	291
valid_sources[0x3c]	297691	1			T1	20		T2	328		T3	58
valid_sources[0x3d]	669707	1			T2	665		T3	70		T4	321
valid_sources[0x3e]	309712	1			T1	6		T2	492		T3	63
valid_sources[0x3f]	304940	1			T1	19		T2	674		T3	73
valid_sources[0x40]	281460	1			T2	602		T3	77		T4	311
valid_sources[0x41]	325594	1			T2	622		T3	63		T4	334
valid_sources[0x42]	298532	1			T2	1450		T3	62		T4	259
valid_sources[0x43]	322511	1			T2	779		T3	64		T4	250
valid_sources[0x44]	338144	1			T1	19		T2	563		T3	90
valid_sources[0x45]	291830	1			T1	8		T2	485		T3	82
valid_sources[0x46]	313252	1			T1	2		T2	355		T3	86
valid_sources[0x47]	287603	1			T1	21		T2	646		T3	52
valid_sources[0x48]	304780	1			T1	24		T2	575		T3	46
valid_sources[0x49]	287073	1			T1	13		T2	569		T3	60
valid_sources[0x4a]	327762	1			T1	13		T2	554		T3	75
valid_sources[0x4b]	311471	1			T1	8		T2	652		T3	47
valid_sources[0x4c]	294211	1			T1	11		T2	548		T3	87
valid_sources[0x4d]	301319	1			T1	10		T2	640		T3	82
valid_sources[0x4e]	353825	1			T1	5		T2	64553		T3	92
valid_sources[0x4f]	297189	1			T1	19		T2	614		T3	52
valid_sources[0x50]	284742	1			T1	5		T2	617		T3	92
valid_sources[0x51]	292802	1			T1	4		T2	643		T3	84
valid_sources[0x52]	295661	1			T1	3		T2	628		T3	77
valid_sources[0x53]	322982	1			T2	690		T3	54		T4	283
valid_sources[0x54]	281534	1			T1	25		T2	583		T3	65
valid_sources[0x55]	288394	1			T1	13		T2	744		T3	73
valid_sources[0x56]	296162	1			T2	481		T3	74		T4	299
valid_sources[0x57]	301407	1			T1	21		T2	623		T3	70
valid_sources[0x58]	287039	1			T1	5		T2	598		T3	84
valid_sources[0x59]	286941	1			T1	6		T2	643		T3	65
valid_sources[0x5a]	293557	1			T1	32		T2	585		T3	66
valid_sources[0x5b]	296220	1			T2	678		T3	89		T4	306
valid_sources[0x5c]	321571	1			T2	579		T3	63		T4	313
valid_sources[0x5d]	299308	1			T1	5		T2	813		T3	84
valid_sources[0x5e]	290891	1			T1	18		T2	463		T3	53
valid_sources[0x5f]	350939	1			T1	5		T2	739		T3	83
valid_sources[0x60]	294649	1			T1	6		T2	812		T3	75
valid_sources[0x61]	304791	1			T1	5		T2	784		T3	81
valid_sources[0x62]	301043	1			T1	3		T2	3250		T3	66
valid_sources[0x63]	283421	1			T1	131		T2	608		T3	65
valid_sources[0x64]	298218	1			T1	11		T2	418		T3	75
valid_sources[0x65]	291073	1			T2	587		T3	67		T4	269
valid_sources[0x66]	294528	1			T1	31		T2	512		T3	77
valid_sources[0x67]	303669	1			T1	24		T2	575		T3	71
valid_sources[0x68]	311917	1			T1	11		T2	4500		T3	73
valid_sources[0x69]	296416	1			T1	2		T2	744		T3	54
valid_sources[0x6a]	305159	1			T2	627		T3	64		T4	306
valid_sources[0x6b]	287718	1			T1	17		T2	1884		T3	56
valid_sources[0x6c]	284228	1			T2	664		T3	72		T4	289
valid_sources[0x6d]	290169	1			T2	564		T3	65		T4	256
valid_sources[0x6e]	295106	1			T1	1		T2	584		T3	86
valid_sources[0x6f]	292167	1			T1	38		T2	962		T3	74
valid_sources[0x70]	284863	1			T1	15		T2	707		T3	85
valid_sources[0x71]	297453	1			T1	1		T2	2191		T3	67
valid_sources[0x72]	291958	1			T2	711		T3	63		T4	278
valid_sources[0x73]	1055706	1			T1	47		T2	864		T3	98
valid_sources[0x74]	283106	1			T1	7		T2	601		T3	98
valid_sources[0x75]	295732	1			T1	23		T2	3834		T3	88
valid_sources[0x76]	337679	1			T2	600		T3	76		T4	325
valid_sources[0x77]	291409	1			T1	3		T2	477		T3	73
valid_sources[0x78]	310163	1			T1	13		T2	703		T3	93
valid_sources[0x79]	297278	1			T1	14		T2	761		T3	38
valid_sources[0x7a]	300005	1			T2	582		T3	63		T4	305
valid_sources[0x7b]	286529	1			T2	498		T3	67		T4	305
valid_sources[0x7c]	310234	1			T1	11		T2	524		T3	93
valid_sources[0x7d]	286969	1			T1	32		T2	891		T3	99
valid_sources[0x7e]	294122	1			T1	25		T2	796		T3	54
valid_sources[0x7f]	958717	1			T1	8		T2	321097		T3	78
valid_sources[0x80]	304274	1			T2	486		T3	59		T4	268

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

16471562

1

T1

296

T2

140893

T3

694

values[0x0]

all_enables

biggest_size

14604788

1

T1

718

T2

112321

T3

3714

values[0x1]

all_enables

biggest_size

13137477

1

T1

759

T2

98731

T3

3683