Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 15565230 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 16460838 1 T1 23953 T2 17232 T3 33087



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 12682984 1 T1 7965 T2 6746 T3 29261
values[0x0] 9032626 1 T1 11105 T2 7949 T3 19077
values[0x1] 10310458 1 T1 11146 T2 8033 T3 23985



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 11551867 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 20474201 1 T1 25669 T2 18715 T3 43694



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 112006 1 T1 118 T2 105 T3 321
valid_sources[0x01] 118151 1 T1 103 T2 86 T3 282
valid_sources[0x02] 123780 1 T1 121 T2 52 T3 303
valid_sources[0x03] 114999 1 T1 116 T2 107 T3 231
valid_sources[0x04] 128264 1 T1 107 T2 153 T3 270
valid_sources[0x05] 110389 1 T1 107 T2 88 T3 277
valid_sources[0x06] 163736 1 T1 113 T2 72 T3 255
valid_sources[0x07] 123785 1 T1 121 T2 100 T3 283
valid_sources[0x08] 132521 1 T1 120 T2 55 T3 283
valid_sources[0x09] 130586 1 T1 125 T2 77 T3 278
valid_sources[0x0a] 144629 1 T1 112 T2 85 T3 314
valid_sources[0x0b] 113459 1 T1 118 T2 83 T3 293
valid_sources[0x0c] 209891 1 T1 120 T2 106 T3 249
valid_sources[0x0d] 112044 1 T1 127 T2 106 T3 281
valid_sources[0x0e] 156474 1 T1 120 T2 126 T3 290
valid_sources[0x0f] 128084 1 T1 117 T2 46 T3 287
valid_sources[0x10] 130013 1 T1 114 T2 119 T3 267
valid_sources[0x11] 111720 1 T1 108 T2 92 T3 302
valid_sources[0x12] 120735 1 T1 120 T2 122 T3 279
valid_sources[0x13] 134920 1 T1 115 T2 181 T3 279
valid_sources[0x14] 112420 1 T1 121 T2 128 T3 278
valid_sources[0x15] 199827 1 T1 112 T2 168 T3 261
valid_sources[0x16] 144357 1 T1 142 T2 49 T3 275
valid_sources[0x17] 117123 1 T1 116 T2 88 T3 289
valid_sources[0x18] 111705 1 T1 107 T2 64 T3 252
valid_sources[0x19] 129469 1 T1 128 T2 97 T3 296
valid_sources[0x1a] 127833 1 T1 133 T2 87 T3 291
valid_sources[0x1b] 115021 1 T1 126 T2 59 T3 295
valid_sources[0x1c] 125545 1 T1 121 T2 60 T3 283
valid_sources[0x1d] 113011 1 T1 97 T2 110 T3 262
valid_sources[0x1e] 112873 1 T1 116 T2 56 T3 285
valid_sources[0x1f] 114038 1 T1 113 T2 439 T3 267
valid_sources[0x20] 112068 1 T1 141 T2 63 T3 290
valid_sources[0x21] 140171 1 T1 116 T2 100 T3 295
valid_sources[0x22] 113288 1 T1 109 T2 159 T3 305
valid_sources[0x23] 158567 1 T1 130 T2 48 T3 260
valid_sources[0x24] 126473 1 T1 114 T2 57 T3 261
valid_sources[0x25] 116077 1 T1 112 T2 74 T3 283
valid_sources[0x26] 133576 1 T1 127 T2 65 T3 258
valid_sources[0x27] 122114 1 T1 114 T2 60 T3 246
valid_sources[0x28] 134552 1 T1 112 T2 59 T3 281
valid_sources[0x29] 116692 1 T1 120 T2 299 T3 293
valid_sources[0x2a] 116012 1 T1 102 T2 101 T3 307
valid_sources[0x2b] 117148 1 T1 101 T2 67 T3 253
valid_sources[0x2c] 121733 1 T1 113 T2 44 T3 250
valid_sources[0x2d] 112227 1 T1 123 T2 74 T3 310
valid_sources[0x2e] 117779 1 T1 109 T2 56 T3 289
valid_sources[0x2f] 111644 1 T1 98 T2 84 T3 242
valid_sources[0x30] 192112 1 T1 112 T2 114 T3 239
valid_sources[0x31] 118377 1 T1 120 T2 56 T3 277
valid_sources[0x32] 112314 1 T1 120 T2 53 T3 270
valid_sources[0x33] 111583 1 T1 125 T2 135 T3 324
valid_sources[0x34] 156262 1 T1 121 T2 27 T3 261
valid_sources[0x35] 111746 1 T1 118 T2 112 T3 321
valid_sources[0x36] 111313 1 T1 113 T2 97 T3 277
valid_sources[0x37] 120691 1 T1 113 T2 158 T3 263
valid_sources[0x38] 110769 1 T1 112 T2 113 T3 287
valid_sources[0x39] 118753 1 T1 144 T2 182 T3 273
valid_sources[0x3a] 111871 1 T1 117 T2 71 T3 286
valid_sources[0x3b] 134561 1 T1 112 T2 85 T3 248
valid_sources[0x3c] 116925 1 T1 120 T2 42 T3 292
valid_sources[0x3d] 112069 1 T1 99 T2 65 T3 258
valid_sources[0x3e] 119252 1 T1 121 T2 99 T3 296
valid_sources[0x3f] 142003 1 T1 127 T2 74 T3 292
valid_sources[0x40] 112920 1 T1 104 T2 35 T3 264
valid_sources[0x41] 134728 1 T1 115 T2 73 T3 279
valid_sources[0x42] 112522 1 T1 132 T2 81 T3 259
valid_sources[0x43] 113300 1 T1 109 T2 85 T3 286
valid_sources[0x44] 129027 1 T1 134 T2 67 T3 277
valid_sources[0x45] 116377 1 T1 127 T2 88 T3 290
valid_sources[0x46] 113510 1 T1 149 T2 57 T3 297
valid_sources[0x47] 112690 1 T1 121 T2 71 T3 281
valid_sources[0x48] 110921 1 T1 118 T2 81 T3 285
valid_sources[0x49] 120089 1 T1 117 T2 81 T3 272
valid_sources[0x4a] 131808 1 T1 119 T2 67 T3 283
valid_sources[0x4b] 120380 1 T1 137 T2 63 T3 261
valid_sources[0x4c] 122912 1 T1 103 T2 94 T3 300
valid_sources[0x4d] 155298 1 T1 112 T2 103 T3 284
valid_sources[0x4e] 111240 1 T1 106 T2 61 T3 242
valid_sources[0x4f] 144611 1 T1 119 T2 108 T3 317
valid_sources[0x50] 112083 1 T1 146 T2 102 T3 262
valid_sources[0x51] 172646 1 T1 117 T2 83 T3 256
valid_sources[0x52] 139992 1 T1 112 T2 78 T3 277
valid_sources[0x53] 111665 1 T1 126 T2 118 T3 274
valid_sources[0x54] 192730 1 T1 107 T2 176 T3 269
valid_sources[0x55] 158606 1 T1 124 T2 53 T3 256
valid_sources[0x56] 112859 1 T1 116 T2 89 T3 315
valid_sources[0x57] 168596 1 T1 131 T2 64 T3 276
valid_sources[0x58] 132207 1 T1 110 T2 36 T3 326
valid_sources[0x59] 196953 1 T1 109 T2 113 T3 300
valid_sources[0x5a] 201505 1 T1 147 T2 28 T3 317
valid_sources[0x5b] 111279 1 T1 135 T2 52 T3 290
valid_sources[0x5c] 111899 1 T1 124 T2 34 T3 278
valid_sources[0x5d] 112445 1 T1 112 T2 70 T3 292
valid_sources[0x5e] 114326 1 T1 116 T2 45 T3 312
valid_sources[0x5f] 133358 1 T1 142 T2 92 T3 288
valid_sources[0x60] 128092 1 T1 125 T2 55 T3 315
valid_sources[0x61] 112121 1 T1 120 T2 60 T3 275
valid_sources[0x62] 111159 1 T1 115 T2 67 T3 283
valid_sources[0x63] 111456 1 T1 110 T2 71 T3 254
valid_sources[0x64] 111695 1 T1 122 T2 73 T3 299
valid_sources[0x65] 118982 1 T1 127 T2 93 T3 260
valid_sources[0x66] 111692 1 T1 103 T2 78 T3 303
valid_sources[0x67] 150888 1 T1 120 T2 113 T3 258
valid_sources[0x68] 132840 1 T1 118 T2 74 T3 317
valid_sources[0x69] 113373 1 T1 115 T2 73 T3 275
valid_sources[0x6a] 112911 1 T1 125 T2 112 T3 300
valid_sources[0x6b] 112885 1 T1 145 T2 103 T3 256
valid_sources[0x6c] 111608 1 T1 120 T2 239 T3 270
valid_sources[0x6d] 111539 1 T1 124 T2 134 T3 288
valid_sources[0x6e] 112214 1 T1 120 T2 118 T3 263
valid_sources[0x6f] 119351 1 T1 133 T2 57 T3 262
valid_sources[0x70] 112343 1 T1 130 T2 69 T3 301
valid_sources[0x71] 115197 1 T1 106 T2 202 T3 294
valid_sources[0x72] 114486 1 T1 134 T2 52 T3 275
valid_sources[0x73] 156975 1 T1 109 T2 40 T3 250
valid_sources[0x74] 117717 1 T1 124 T2 65 T3 294
valid_sources[0x75] 126873 1 T1 113 T2 147 T3 248
valid_sources[0x76] 113431 1 T1 109 T2 81 T3 293
valid_sources[0x77] 137531 1 T1 108 T2 91 T3 307
valid_sources[0x78] 113241 1 T1 124 T2 138 T3 263
valid_sources[0x79] 112153 1 T1 114 T2 104 T3 267
valid_sources[0x7a] 115404 1 T1 126 T2 47 T3 294
valid_sources[0x7b] 115910 1 T1 103 T2 27 T3 293
valid_sources[0x7c] 153420 1 T1 104 T2 119 T3 305
valid_sources[0x7d] 112469 1 T1 130 T2 81 T3 298
valid_sources[0x7e] 118197 1 T1 105 T2 93 T3 265
valid_sources[0x7f] 114517 1 T1 119 T2 120 T3 272
valid_sources[0x80] 122404 1 T1 110 T2 66 T3 310



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 6229482 1 T1 3247 T2 2676 T3 14538
values[0x0] all_enables biggest_size 5404184 1 T1 10421 T2 7296 T3 9901
values[0x1] all_enables biggest_size 4827172 1 T1 10285 T2 7260 T3 8648

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%