Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 36045540 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 37940722 1 T1 20974 T2 36141 T3 454740



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 29822496 1 T1 18514 T2 32453 T3 336981
values[0x0] 20553517 1 T1 11943 T2 21003 T3 246471
values[0x1] 23610249 1 T1 14812 T2 26608 T3 281611



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 26745270 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 47240992 1 T1 27453 T2 48106 T3 560158



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 296150 1 T1 55 T2 299 T3 3369
valid_sources[0x01] 268498 1 T1 5 T2 269 T3 3457
valid_sources[0x02] 284903 1 T1 21 T2 316 T3 3393
valid_sources[0x03] 291943 1 T1 20 T2 313 T3 3292
valid_sources[0x04] 273081 1 T1 22 T2 321 T3 3399
valid_sources[0x05] 288051 1 T1 57 T2 334 T3 3387
valid_sources[0x06] 245204 1 T1 34 T2 320 T3 3500
valid_sources[0x07] 273891 1 T1 54 T2 317 T3 3326
valid_sources[0x08] 264325 1 T1 30 T2 350 T3 3424
valid_sources[0x09] 286866 1 T1 38 T2 286 T3 3331
valid_sources[0x0a] 295480 1 T1 86 T2 300 T3 3294
valid_sources[0x0b] 254001 1 T1 91 T2 341 T3 3461
valid_sources[0x0c] 331338 1 T1 41 T2 362 T3 3420
valid_sources[0x0d] 316051 1 T1 56 T2 298 T3 3366
valid_sources[0x0e] 279498 1 T1 14 T2 329 T3 3309
valid_sources[0x0f] 401801 1 T1 68 T2 322 T3 3406
valid_sources[0x10] 281994 1 T1 39 T2 330 T3 3357
valid_sources[0x11] 268071 1 T1 51 T2 298 T3 3449
valid_sources[0x12] 309711 1 T1 39 T2 282 T3 3450
valid_sources[0x13] 288948 1 T1 21 T2 315 T3 3270
valid_sources[0x14] 326257 1 T1 19 T2 332 T3 3332
valid_sources[0x15] 279626 1 T1 81 T2 298 T3 3375
valid_sources[0x16] 277441 1 T1 95 T2 273 T3 3460
valid_sources[0x17] 350860 1 T1 1700 T2 342 T3 3455
valid_sources[0x18] 295147 1 T1 27 T2 311 T3 3376
valid_sources[0x19] 256930 1 T1 68 T2 301 T3 3407
valid_sources[0x1a] 429940 1 T1 33 T2 301 T3 3391
valid_sources[0x1b] 290912 1 T1 61 T2 331 T3 3476
valid_sources[0x1c] 288063 1 T1 33 T2 323 T3 3336
valid_sources[0x1d] 271562 1 T1 47 T2 294 T3 3454
valid_sources[0x1e] 289084 1 T1 125 T2 307 T3 3462
valid_sources[0x1f] 281838 1 T1 58 T2 327 T3 3311
valid_sources[0x20] 354503 1 T1 77 T2 321 T3 3402
valid_sources[0x21] 259114 1 T1 47 T2 309 T3 3358
valid_sources[0x22] 270816 1 T1 13 T2 295 T3 3256
valid_sources[0x23] 398869 1 T1 38 T2 310 T3 3463
valid_sources[0x24] 324295 1 T1 70 T2 333 T3 3472
valid_sources[0x25] 256114 1 T1 9 T2 295 T3 3191
valid_sources[0x26] 275507 1 T1 179 T2 314 T3 3463
valid_sources[0x27] 324047 1 T1 72 T2 316 T3 3412
valid_sources[0x28] 275581 1 T1 77 T2 301 T3 3322
valid_sources[0x29] 295429 1 T1 45 T2 278 T3 3311
valid_sources[0x2a] 276274 1 T1 13 T2 329 T3 3311
valid_sources[0x2b] 257266 1 T1 143 T2 331 T3 3331
valid_sources[0x2c] 275262 1 T1 69 T2 276 T3 3441
valid_sources[0x2d] 304302 1 T1 72 T2 324 T3 3335
valid_sources[0x2e] 274197 1 T1 34 T2 329 T3 3464
valid_sources[0x2f] 304507 1 T1 36 T2 275 T3 3503
valid_sources[0x30] 255433 1 T1 32 T2 344 T3 3314
valid_sources[0x31] 275850 1 T1 9 T2 273 T3 3404
valid_sources[0x32] 291690 1 T1 19 T2 347 T3 3365
valid_sources[0x33] 272510 1 T1 82 T2 287 T3 3276
valid_sources[0x34] 282697 1 T1 45 T2 282 T3 3376
valid_sources[0x35] 434132 1 T1 77 T2 305 T3 3398
valid_sources[0x36] 293007 1 T1 24 T2 309 T3 3404
valid_sources[0x37] 286203 1 T1 75 T2 336 T3 3286
valid_sources[0x38] 250859 1 T1 45 T2 380 T3 3355
valid_sources[0x39] 267827 1 T1 67 T2 239 T3 3444
valid_sources[0x3a] 316373 1 T1 9219 T2 285 T3 3353
valid_sources[0x3b] 277947 1 T1 47 T2 328 T3 3393
valid_sources[0x3c] 264064 1 T1 51 T2 298 T3 3371
valid_sources[0x3d] 288785 1 T1 70 T2 310 T3 3498
valid_sources[0x3e] 300357 1 T1 122 T2 344 T3 3319
valid_sources[0x3f] 271515 1 T1 7094 T2 334 T3 3405
valid_sources[0x40] 292251 1 T1 80 T2 337 T3 3454
valid_sources[0x41] 261422 1 T1 56 T2 327 T3 3376
valid_sources[0x42] 292698 1 T1 32 T2 334 T3 3347
valid_sources[0x43] 287997 1 T1 31 T2 306 T3 3418
valid_sources[0x44] 284667 1 T1 32 T2 338 T3 3435
valid_sources[0x45] 246820 1 T1 61 T2 323 T3 3435
valid_sources[0x46] 285595 1 T1 45 T2 304 T3 3432
valid_sources[0x47] 334082 1 T1 71 T2 325 T3 3301
valid_sources[0x48] 257024 1 T1 1308 T2 296 T3 3421
valid_sources[0x49] 327507 1 T1 21 T2 331 T3 3403
valid_sources[0x4a] 267553 1 T1 199 T2 315 T3 3310
valid_sources[0x4b] 329114 1 T1 46 T2 324 T3 3416
valid_sources[0x4c] 328789 1 T1 13 T2 296 T3 3244
valid_sources[0x4d] 275383 1 T1 60 T2 301 T3 3342
valid_sources[0x4e] 248775 1 T1 78 T2 346 T3 3342
valid_sources[0x4f] 304486 1 T1 31 T2 311 T3 3265
valid_sources[0x50] 294926 1 T1 10 T2 276 T3 3396
valid_sources[0x51] 351155 1 T1 73 T2 287 T3 3333
valid_sources[0x52] 257660 1 T1 95 T2 304 T3 3471
valid_sources[0x53] 292114 1 T1 21 T2 314 T3 3404
valid_sources[0x54] 330876 1 T1 39 T2 292 T3 3308
valid_sources[0x55] 294430 1 T1 77 T2 332 T3 3374
valid_sources[0x56] 260830 1 T1 41 T2 331 T3 3361
valid_sources[0x57] 340238 1 T1 120 T2 287 T3 3288
valid_sources[0x58] 256873 1 T1 66 T2 284 T3 3476
valid_sources[0x59] 303544 1 T1 56 T2 344 T3 3396
valid_sources[0x5a] 291190 1 T1 48 T2 358 T3 3327
valid_sources[0x5b] 322335 1 T1 86 T2 347 T3 3361
valid_sources[0x5c] 275460 1 T1 60 T2 340 T3 3424
valid_sources[0x5d] 293482 1 T1 54 T2 279 T3 3387
valid_sources[0x5e] 248548 1 T1 105 T2 339 T3 3319
valid_sources[0x5f] 352277 1 T1 28 T2 343 T3 3378
valid_sources[0x60] 318695 1 T1 152 T2 366 T3 3446
valid_sources[0x61] 266446 1 T1 51 T2 326 T3 3430
valid_sources[0x62] 260627 1 T1 64 T2 340 T3 3453
valid_sources[0x63] 309643 1 T1 55 T2 316 T3 3396
valid_sources[0x64] 274378 1 T1 3800 T2 299 T3 3506
valid_sources[0x65] 349010 1 T1 49 T2 260 T3 3308
valid_sources[0x66] 250461 1 T1 101 T2 326 T3 3411
valid_sources[0x67] 355106 1 T1 72 T2 270 T3 3345
valid_sources[0x68] 256173 1 T1 37 T2 333 T3 3503
valid_sources[0x69] 251362 1 T1 31 T2 295 T3 3461
valid_sources[0x6a] 308287 1 T1 25 T2 292 T3 3370
valid_sources[0x6b] 313961 1 T1 60 T2 314 T3 3391
valid_sources[0x6c] 255379 1 T1 9 T2 317 T3 3269
valid_sources[0x6d] 270004 1 T1 74 T2 330 T3 3398
valid_sources[0x6e] 305003 1 T1 88 T2 318 T3 3278
valid_sources[0x6f] 306252 1 T1 74 T2 303 T3 3390
valid_sources[0x70] 284396 1 T1 5 T2 338 T3 3432
valid_sources[0x71] 321620 1 T1 62 T2 321 T3 3340
valid_sources[0x72] 269402 1 T1 77 T2 278 T3 3378
valid_sources[0x73] 301428 1 T1 24 T2 326 T3 3381
valid_sources[0x74] 355609 1 T1 55 T2 324 T3 3352
valid_sources[0x75] 348117 1 T1 18 T2 312 T3 3415
valid_sources[0x76] 284968 1 T1 72 T2 274 T3 3362
valid_sources[0x77] 266533 1 T1 65 T2 312 T3 3350
valid_sources[0x78] 262882 1 T1 50 T2 300 T3 3393
valid_sources[0x79] 263214 1 T1 92 T2 345 T3 3460
valid_sources[0x7a] 306174 1 T1 42 T2 304 T3 3345
valid_sources[0x7b] 247399 1 T1 19 T2 335 T3 3329
valid_sources[0x7c] 317269 1 T1 13 T2 305 T3 3494
valid_sources[0x7d] 285812 1 T1 7 T2 318 T3 3266
valid_sources[0x7e] 269407 1 T1 47 T2 323 T3 3315
valid_sources[0x7f] 310046 1 T1 45 T2 297 T3 3409
valid_sources[0x80] 278397 1 T1 5 T2 305 T3 3365



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 14668681 1 T1 9118 T2 15800 T3 164501
values[0x0] all_enables biggest_size 12276986 1 T1 6243 T2 10740 T3 152114
values[0x1] all_enables biggest_size 10995055 1 T1 5613 T2 9601 T3 138125

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%