Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	40743698	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

43370718

1

T1

25500

T2

25118

T3

2219

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	33644872	1			T1	22976		T2	1433		T3	2018
values[0x0]	23467264	1			T1	14796		T2	13145		T3	1340
values[0x1]	27002280	1			T1	18444		T2	14047		T3	1578

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	30167458	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

53946958

1

T1

33855

T2

26541

T3

2925

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	323971	1			T1	202		T2	112		T3	23
valid_sources[0x01]	283091	1			T1	236		T2	104		T5	226
valid_sources[0x02]	360977	1			T1	225		T2	92		T3	18
valid_sources[0x03]	287671	1			T1	202		T2	119		T3	1
valid_sources[0x04]	305429	1			T1	255		T2	125		T3	2
valid_sources[0x05]	322183	1			T1	202		T2	126		T5	174
valid_sources[0x06]	327517	1			T1	236		T2	77		T5	186
valid_sources[0x07]	302206	1			T1	222		T2	118		T5	158
valid_sources[0x08]	325342	1			T1	220		T2	96		T3	1
valid_sources[0x09]	301115	1			T1	234		T2	116		T3	16
valid_sources[0x0a]	330003	1			T1	221		T2	86		T3	7
valid_sources[0x0b]	315831	1			T1	220		T2	137		T3	16
valid_sources[0x0c]	292548	1			T1	264		T2	135		T3	5
valid_sources[0x0d]	400221	1			T1	206		T2	113		T5	146
valid_sources[0x0e]	325176	1			T1	237		T2	89		T3	2
valid_sources[0x0f]	281714	1			T1	226		T2	143		T3	1
valid_sources[0x10]	318902	1			T1	212		T2	98		T3	10
valid_sources[0x11]	301732	1			T1	208		T2	158		T5	170
valid_sources[0x12]	299317	1			T1	228		T2	88		T3	1
valid_sources[0x13]	298689	1			T1	217		T2	120		T3	20
valid_sources[0x14]	330068	1			T1	214		T2	113		T5	173
valid_sources[0x15]	343778	1			T1	253		T2	75		T5	179
valid_sources[0x16]	288152	1			T1	196		T2	144		T3	5
valid_sources[0x17]	322448	1			T1	235		T2	121		T3	19
valid_sources[0x18]	355975	1			T1	215		T2	122		T5	191
valid_sources[0x19]	316448	1			T1	211		T2	104		T3	5
valid_sources[0x1a]	302160	1			T1	242		T2	148		T3	5
valid_sources[0x1b]	320302	1			T1	262		T2	95		T3	1
valid_sources[0x1c]	316616	1			T1	240		T2	131		T5	183
valid_sources[0x1d]	345614	1			T1	230		T2	106		T3	10
valid_sources[0x1e]	282521	1			T1	225		T2	152		T5	186
valid_sources[0x1f]	382346	1			T1	203		T2	110		T3	1
valid_sources[0x20]	340328	1			T1	193		T2	86		T3	19
valid_sources[0x21]	317982	1			T1	236		T2	101		T3	5
valid_sources[0x22]	343955	1			T1	208		T2	155		T5	193
valid_sources[0x23]	307083	1			T1	221		T2	88		T3	5
valid_sources[0x24]	312330	1			T1	234		T2	91		T3	29
valid_sources[0x25]	326018	1			T1	232		T2	137		T3	10
valid_sources[0x26]	322200	1			T1	205		T2	130		T5	197
valid_sources[0x27]	303897	1			T1	220		T2	133		T5	165
valid_sources[0x28]	296585	1			T1	194		T2	105		T3	9
valid_sources[0x29]	319893	1			T1	214		T2	113		T5	147
valid_sources[0x2a]	299197	1			T1	229		T2	139		T3	2478
valid_sources[0x2b]	287763	1			T1	238		T2	131		T3	12
valid_sources[0x2c]	315883	1			T1	238		T2	84		T3	40
valid_sources[0x2d]	341375	1			T1	238		T2	91		T5	178
valid_sources[0x2e]	287028	1			T1	227		T2	117		T3	10
valid_sources[0x2f]	334703	1			T1	220		T2	137		T5	164
valid_sources[0x30]	312422	1			T1	197		T2	82		T3	9
valid_sources[0x31]	320916	1			T1	193		T2	82		T3	1
valid_sources[0x32]	283771	1			T1	199		T2	122		T3	1
valid_sources[0x33]	333942	1			T1	249		T2	118		T3	10
valid_sources[0x34]	314158	1			T1	220		T2	116		T3	9
valid_sources[0x35]	279228	1			T1	231		T2	100		T3	13
valid_sources[0x36]	324246	1			T1	208		T2	90		T3	53
valid_sources[0x37]	324213	1			T1	205		T2	126		T3	1
valid_sources[0x38]	340835	1			T1	211		T2	98		T3	49
valid_sources[0x39]	320787	1			T1	227		T2	118		T3	49
valid_sources[0x3a]	315532	1			T1	228		T2	105		T3	13
valid_sources[0x3b]	303416	1			T1	200		T2	118		T5	190
valid_sources[0x3c]	384752	1			T1	203		T2	119		T5	183
valid_sources[0x3d]	290344	1			T1	230		T2	106		T3	6
valid_sources[0x3e]	299665	1			T1	236		T2	87		T3	1
valid_sources[0x3f]	286582	1			T1	211		T2	139		T5	183
valid_sources[0x40]	281961	1			T1	215		T2	103		T3	1
valid_sources[0x41]	314604	1			T1	206		T2	86		T3	1
valid_sources[0x42]	331010	1			T1	240		T2	105		T5	159
valid_sources[0x43]	314833	1			T1	231		T2	73		T5	187
valid_sources[0x44]	308970	1			T1	228		T2	128		T5	155
valid_sources[0x45]	336491	1			T1	236		T2	115		T3	5
valid_sources[0x46]	288749	1			T1	219		T2	112		T3	2
valid_sources[0x47]	334986	1			T1	205		T2	134		T5	198
valid_sources[0x48]	403971	1			T1	237		T2	100		T3	65
valid_sources[0x49]	362459	1			T1	194		T2	113		T3	30
valid_sources[0x4a]	316043	1			T1	244		T2	81		T5	184
valid_sources[0x4b]	290815	1			T1	216		T2	153		T3	6
valid_sources[0x4c]	329085	1			T1	229		T2	81		T3	28
valid_sources[0x4d]	356096	1			T1	207		T2	117		T3	32
valid_sources[0x4e]	311519	1			T1	196		T2	140		T3	22
valid_sources[0x4f]	299866	1			T1	215		T2	118		T3	10
valid_sources[0x50]	322356	1			T1	238		T2	94		T3	5
valid_sources[0x51]	385440	1			T1	221		T2	168		T3	33
valid_sources[0x52]	348139	1			T1	220		T2	117		T3	7
valid_sources[0x53]	318944	1			T1	189		T2	86		T3	1
valid_sources[0x54]	353666	1			T1	192		T2	144		T3	9
valid_sources[0x55]	329806	1			T1	214		T2	124		T5	158
valid_sources[0x56]	396944	1			T1	217		T2	86		T5	164
valid_sources[0x57]	411027	1			T1	241		T2	101		T5	206
valid_sources[0x58]	309044	1			T1	210		T2	113		T5	178
valid_sources[0x59]	376673	1			T1	220		T2	109		T3	67
valid_sources[0x5a]	283475	1			T1	206		T2	148		T5	188
valid_sources[0x5b]	299613	1			T1	225		T2	108		T3	22
valid_sources[0x5c]	324009	1			T1	209		T2	127		T3	10
valid_sources[0x5d]	330850	1			T1	221		T2	93		T3	37
valid_sources[0x5e]	286012	1			T1	203		T2	107		T5	162
valid_sources[0x5f]	291026	1			T1	198		T2	109		T3	28
valid_sources[0x60]	310550	1			T1	225		T2	136		T3	1
valid_sources[0x61]	365595	1			T1	198		T2	162		T3	18
valid_sources[0x62]	334463	1			T1	228		T2	108		T3	15
valid_sources[0x63]	353504	1			T1	239		T2	125		T3	5
valid_sources[0x64]	292987	1			T1	221		T2	133		T3	15
valid_sources[0x65]	340475	1			T1	201		T2	130		T3	54
valid_sources[0x66]	329178	1			T1	222		T2	120		T3	47
valid_sources[0x67]	335972	1			T1	228		T2	107		T5	166
valid_sources[0x68]	315536	1			T1	240		T2	89		T3	5
valid_sources[0x69]	322852	1			T1	207		T2	151		T5	159
valid_sources[0x6a]	386229	1			T1	210		T2	77		T3	13
valid_sources[0x6b]	356339	1			T1	223		T2	69		T3	5
valid_sources[0x6c]	307251	1			T1	237		T2	104		T5	174
valid_sources[0x6d]	299599	1			T1	236		T2	101		T5	196
valid_sources[0x6e]	291029	1			T1	227		T2	135		T5	190
valid_sources[0x6f]	286800	1			T1	216		T2	106		T3	1
valid_sources[0x70]	322139	1			T1	226		T2	102		T3	5
valid_sources[0x71]	334091	1			T1	192		T2	92		T5	170
valid_sources[0x72]	299696	1			T1	194		T2	121		T3	9
valid_sources[0x73]	378758	1			T1	181		T2	85		T3	43
valid_sources[0x74]	292576	1			T1	217		T2	118		T3	14
valid_sources[0x75]	348952	1			T1	221		T2	155		T5	168
valid_sources[0x76]	370358	1			T1	203		T2	88		T5	181
valid_sources[0x77]	399099	1			T1	223		T2	124		T3	1
valid_sources[0x78]	350577	1			T1	222		T2	92		T3	27
valid_sources[0x79]	312398	1			T1	223		T2	89		T3	68
valid_sources[0x7a]	295092	1			T1	222		T2	133		T3	7
valid_sources[0x7b]	304573	1			T1	211		T2	87		T3	1
valid_sources[0x7c]	328560	1			T1	238		T2	143		T3	5
valid_sources[0x7d]	352719	1			T1	254		T2	102		T5	160
valid_sources[0x7e]	389880	1			T1	216		T2	97		T3	1
valid_sources[0x7f]	326249	1			T1	265		T2	103		T5	187
valid_sources[0x80]	293190	1			T1	219		T2	129		T5	160

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

16583979

1

T1

11163

T2

576

T3

1006

values[0x0]

all_enables

biggest_size

14116596

1

T1

7643

T2

12266

T3

678

values[0x1]

all_enables

biggest_size

12670143

1

T1

6694

T2

12276

T3

535