Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	40181184	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

42131703

1

T1

310

T2

182211

T3

2764

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	33260617	1			T1	309		T2	149055		T3	2325
values[0x0]	22850213	1			T1	153		T2	100221		T3	1098
values[0x1]	26202057	1			T1	141		T2	112116		T3	1081

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	29797349	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

52515538

1

T1

380

T2

226578

T3

3202

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	329358	1			T1	2		T2	1297		T3	18
valid_sources[0x01]	293314	1			T1	1		T2	1529		T3	17
valid_sources[0x02]	284434	1			T1	4		T2	1471		T3	15
valid_sources[0x03]	320615	1			T1	3		T2	1463		T3	10
valid_sources[0x04]	353442	1			T2	1342		T3	15		T6	17
valid_sources[0x05]	314819	1			T2	1585		T3	12		T6	30
valid_sources[0x06]	323908	1			T2	1306		T3	23		T6	25
valid_sources[0x07]	290715	1			T2	1306		T3	16		T6	15
valid_sources[0x08]	292562	1			T2	1589		T3	20		T6	28
valid_sources[0x09]	325629	1			T1	3		T2	1420		T3	39
valid_sources[0x0a]	323611	1			T1	3		T2	1481		T3	21
valid_sources[0x0b]	286850	1			T2	1397		T3	22		T6	20
valid_sources[0x0c]	304252	1			T1	3		T2	1445		T3	16
valid_sources[0x0d]	275436	1			T1	1		T2	1431		T3	10
valid_sources[0x0e]	316442	1			T2	1406		T3	6		T6	23
valid_sources[0x0f]	304856	1			T2	1301		T3	16		T6	26
valid_sources[0x10]	311552	1			T2	1252		T3	23		T6	25
valid_sources[0x11]	312171	1			T1	1		T2	1502		T3	10
valid_sources[0x12]	285753	1			T1	3		T2	1502		T3	41
valid_sources[0x13]	329651	1			T2	1320		T3	8		T6	19
valid_sources[0x14]	358323	1			T2	1496		T3	19		T6	31
valid_sources[0x15]	300402	1			T2	1447		T3	26		T6	27
valid_sources[0x16]	295761	1			T2	1508		T3	10		T6	20
valid_sources[0x17]	326915	1			T2	1416		T3	11		T6	23
valid_sources[0x18]	330855	1			T2	1313		T3	11		T6	22
valid_sources[0x19]	317559	1			T1	1		T2	1202		T3	12
valid_sources[0x1a]	305842	1			T1	1		T2	1567		T3	10
valid_sources[0x1b]	299999	1			T2	1343		T3	19		T6	32
valid_sources[0x1c]	287690	1			T1	1		T2	1423		T3	25
valid_sources[0x1d]	358274	1			T1	7		T2	1408		T3	21
valid_sources[0x1e]	292621	1			T2	1339		T3	10		T6	18
valid_sources[0x1f]	276916	1			T2	1398		T3	25		T6	28
valid_sources[0x20]	313852	1			T2	1475		T3	23		T6	23
valid_sources[0x21]	316833	1			T1	1		T2	1296		T3	23
valid_sources[0x22]	376399	1			T2	1349		T3	22		T6	24
valid_sources[0x23]	431416	1			T2	1535		T3	18		T6	35
valid_sources[0x24]	358434	1			T1	5		T2	1330		T3	8
valid_sources[0x25]	300948	1			T2	1503		T3	14		T6	22
valid_sources[0x26]	340984	1			T1	1		T2	1350		T3	6
valid_sources[0x27]	318128	1			T1	8		T2	1323		T3	15
valid_sources[0x28]	290181	1			T2	1345		T3	19		T6	27
valid_sources[0x29]	286798	1			T1	1		T2	1397		T3	15
valid_sources[0x2a]	302019	1			T2	1318		T3	21		T6	24
valid_sources[0x2b]	287908	1			T2	1423		T3	18		T6	28
valid_sources[0x2c]	272740	1			T1	6		T2	1470		T3	13
valid_sources[0x2d]	422574	1			T2	1499		T3	21		T6	26
valid_sources[0x2e]	296666	1			T2	1229		T3	8		T6	30
valid_sources[0x2f]	300547	1			T1	9		T2	1321		T3	17
valid_sources[0x30]	339015	1			T1	1		T2	1348		T3	14
valid_sources[0x31]	318196	1			T1	3		T2	1530		T3	20
valid_sources[0x32]	355327	1			T1	2		T2	1347		T3	19
valid_sources[0x33]	313578	1			T2	1342		T3	19		T6	21
valid_sources[0x34]	320893	1			T2	1462		T3	14		T6	26
valid_sources[0x35]	281307	1			T2	1325		T3	13		T6	38
valid_sources[0x36]	277988	1			T1	2		T2	1372		T3	11
valid_sources[0x37]	329691	1			T1	4		T2	1397		T3	28
valid_sources[0x38]	288994	1			T2	1320		T3	35		T6	21
valid_sources[0x39]	284748	1			T1	5		T2	1381		T3	13
valid_sources[0x3a]	285307	1			T2	1422		T3	8		T6	12
valid_sources[0x3b]	395119	1			T1	5		T2	1464		T3	13
valid_sources[0x3c]	327698	1			T1	3		T2	1376		T3	11
valid_sources[0x3d]	296815	1			T1	2		T2	1413		T3	25
valid_sources[0x3e]	321965	1			T2	1457		T3	19		T6	19
valid_sources[0x3f]	320844	1			T1	7		T2	1403		T3	26
valid_sources[0x40]	279039	1			T2	1386		T3	16		T6	31
valid_sources[0x41]	280849	1			T2	1591		T3	16		T6	12
valid_sources[0x42]	359713	1			T1	2		T2	1375		T3	13
valid_sources[0x43]	296698	1			T1	2		T2	1302		T3	20
valid_sources[0x44]	309068	1			T2	1480		T3	8		T6	24
valid_sources[0x45]	343846	1			T1	3		T2	1323		T3	6
valid_sources[0x46]	324213	1			T1	2		T2	1270		T3	13
valid_sources[0x47]	289384	1			T2	1495		T3	16		T6	17
valid_sources[0x48]	303123	1			T2	1409		T3	13		T6	23
valid_sources[0x49]	296738	1			T1	2		T2	1319		T3	11
valid_sources[0x4a]	314531	1			T1	9		T2	1355		T3	25
valid_sources[0x4b]	317159	1			T1	5		T2	1266		T3	14
valid_sources[0x4c]	334499	1			T2	1409		T3	18		T6	22
valid_sources[0x4d]	330664	1			T2	1385		T3	25		T6	30
valid_sources[0x4e]	331437	1			T2	1403		T3	14		T6	36
valid_sources[0x4f]	406218	1			T2	1299		T3	24		T6	41
valid_sources[0x50]	327092	1			T2	1324		T3	20		T6	21
valid_sources[0x51]	289046	1			T2	1340		T3	18		T6	20
valid_sources[0x52]	297443	1			T1	8		T2	1448		T3	15
valid_sources[0x53]	303223	1			T1	1		T2	1425		T3	9
valid_sources[0x54]	322038	1			T1	3		T2	1372		T3	13
valid_sources[0x55]	302894	1			T1	5		T2	1351		T3	27
valid_sources[0x56]	334899	1			T1	9		T2	1574		T3	23
valid_sources[0x57]	304612	1			T2	1372		T3	13		T6	21
valid_sources[0x58]	313630	1			T1	4		T2	1415		T3	9
valid_sources[0x59]	282027	1			T1	10		T2	1534		T3	12
valid_sources[0x5a]	336621	1			T1	3		T2	1395		T3	9
valid_sources[0x5b]	304328	1			T1	13		T2	1353		T3	20
valid_sources[0x5c]	319657	1			T2	1409		T3	12		T6	24
valid_sources[0x5d]	337904	1			T2	1415		T3	12		T6	27
valid_sources[0x5e]	339888	1			T2	1556		T3	12		T6	19
valid_sources[0x5f]	325816	1			T2	1401		T3	13		T6	38
valid_sources[0x60]	320147	1			T1	2		T2	1434		T3	30
valid_sources[0x61]	314700	1			T1	3		T2	1412		T3	22
valid_sources[0x62]	302090	1			T2	1448		T3	25		T6	27
valid_sources[0x63]	322481	1			T1	2		T2	1360		T3	18
valid_sources[0x64]	281995	1			T1	1		T2	1342		T3	11
valid_sources[0x65]	279761	1			T1	3		T2	1437		T3	29
valid_sources[0x66]	355918	1			T1	7		T2	1380		T3	27
valid_sources[0x67]	305227	1			T2	1555		T3	22		T6	24
valid_sources[0x68]	308605	1			T1	7		T2	1524		T3	20
valid_sources[0x69]	313399	1			T2	1431		T3	27		T6	20
valid_sources[0x6a]	305635	1			T2	1443		T3	22		T6	22
valid_sources[0x6b]	282925	1			T2	1534		T3	19		T6	24
valid_sources[0x6c]	324073	1			T2	1379		T3	16		T6	19
valid_sources[0x6d]	396790	1			T1	5		T2	1460		T3	14
valid_sources[0x6e]	285881	1			T2	1554		T3	18		T6	23
valid_sources[0x6f]	315618	1			T2	1424		T3	8		T6	33
valid_sources[0x70]	292117	1			T1	13		T2	1388		T3	12
valid_sources[0x71]	281578	1			T2	1393		T3	22		T6	21
valid_sources[0x72]	299156	1			T1	2		T2	1313		T3	26
valid_sources[0x73]	287718	1			T1	4		T2	1484		T3	13
valid_sources[0x74]	460506	1			T1	2		T2	1447		T3	29
valid_sources[0x75]	337858	1			T1	2		T2	1548		T3	18
valid_sources[0x76]	353534	1			T1	2		T2	1492		T3	24
valid_sources[0x77]	317956	1			T1	2		T2	1483		T3	11
valid_sources[0x78]	318798	1			T1	1		T2	1402		T3	20
valid_sources[0x79]	345502	1			T2	1244		T3	11		T6	13
valid_sources[0x7a]	375991	1			T1	6		T2	1382		T3	26
valid_sources[0x7b]	306708	1			T1	2		T2	1225		T3	20
valid_sources[0x7c]	312667	1			T2	1436		T3	17		T6	24
valid_sources[0x7d]	318192	1			T2	1423		T3	28		T6	21
valid_sources[0x7e]	333785	1			T2	1417		T3	18		T6	21
valid_sources[0x7f]	328181	1			T2	1492		T3	21		T6	22
valid_sources[0x80]	293907	1			T2	1408		T3	17		T6	29

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

16350575

1

T1

144

T2

74242

T3

1048

values[0x0]

all_enables

biggest_size

13616841

1

T1

103

T2

57742

T3

905

values[0x1]

all_enables

biggest_size

12164287

1

T1

63

T2

50227

T3

811