Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	85158034	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

89197415

1

T1

13488

T2

29138

T3

52570

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	70433847	1			T1	1262		T2	29178		T3	48839
values[0x0]	48988291	1			T1	7133		T2	15158		T3	26978
values[0x1]	54933311	1			T1	7451		T2	17499		T3	30836

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	63893225	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

110462224

1

T1

14389

T2

36813

T3

65528

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	536025	1			T1	54		T2	237		T3	424
valid_sources[0x01]	543343	1			T1	51		T2	224		T3	396
valid_sources[0x02]	586969	1			T1	48		T2	245		T3	396
valid_sources[0x03]	539149	1			T1	67		T2	265		T3	409
valid_sources[0x04]	537221	1			T1	39		T2	261		T3	433
valid_sources[0x05]	538071	1			T1	87		T2	281		T3	466
valid_sources[0x06]	536334	1			T1	71		T2	244		T3	418
valid_sources[0x07]	537596	1			T1	57		T2	250		T3	394
valid_sources[0x08]	536046	1			T1	59		T2	209		T3	414
valid_sources[0x09]	577367	1			T1	66		T2	220		T3	400
valid_sources[0x0a]	538865	1			T1	57		T2	246		T3	429
valid_sources[0x0b]	535224	1			T1	54		T2	229		T3	417
valid_sources[0x0c]	534627	1			T1	49		T2	240		T3	412
valid_sources[0x0d]	926766	1			T1	83		T2	219		T3	375
valid_sources[0x0e]	538294	1			T1	63		T2	246		T3	394
valid_sources[0x0f]	592848	1			T1	79		T2	261		T3	406
valid_sources[0x10]	536741	1			T1	59		T2	224		T3	430
valid_sources[0x11]	537403	1			T1	86		T2	228		T3	409
valid_sources[0x12]	540085	1			T1	84		T2	206		T3	421
valid_sources[0x13]	541484	1			T1	113		T2	225		T3	399
valid_sources[0x14]	539776	1			T1	56		T2	256		T3	409
valid_sources[0x15]	540395	1			T1	40		T2	235		T3	404
valid_sources[0x16]	537856	1			T1	42		T2	250		T3	407
valid_sources[0x17]	537163	1			T1	74		T2	257		T3	422
valid_sources[0x18]	1902449	1			T1	83		T2	249		T3	466
valid_sources[0x19]	541333	1			T1	62		T2	267		T3	425
valid_sources[0x1a]	636218	1			T1	64		T2	263		T3	453
valid_sources[0x1b]	541191	1			T1	51		T2	232		T3	417
valid_sources[0x1c]	543041	1			T1	34		T2	244		T3	431
valid_sources[0x1d]	534188	1			T1	79		T2	234		T3	397
valid_sources[0x1e]	587884	1			T1	61		T2	255		T3	411
valid_sources[0x1f]	540604	1			T1	85		T2	225		T3	411
valid_sources[0x20]	535399	1			T1	36		T2	239		T3	419
valid_sources[0x21]	535743	1			T1	48		T2	248		T3	493
valid_sources[0x22]	536239	1			T1	74		T2	226		T3	356
valid_sources[0x23]	587256	1			T1	40		T2	218		T3	429
valid_sources[0x24]	547315	1			T1	51		T2	249		T3	427
valid_sources[0x25]	2032075	1			T1	83		T2	217		T3	401
valid_sources[0x26]	539369	1			T1	52		T2	254		T3	429
valid_sources[0x27]	544323	1			T1	71		T2	242		T3	389
valid_sources[0x28]	536408	1			T1	61		T2	219		T3	441
valid_sources[0x29]	538424	1			T1	51		T2	239		T3	410
valid_sources[0x2a]	536265	1			T1	89		T2	258		T3	397
valid_sources[0x2b]	556968	1			T1	109		T2	221		T3	412
valid_sources[0x2c]	2030044	1			T1	46		T2	268		T3	368
valid_sources[0x2d]	542704	1			T1	55		T2	223		T3	437
valid_sources[0x2e]	2048917	1			T1	74		T2	247		T3	421
valid_sources[0x2f]	562981	1			T1	67		T2	231		T3	383
valid_sources[0x30]	572552	1			T1	46		T2	280		T3	363
valid_sources[0x31]	542381	1			T1	88		T2	240		T3	445
valid_sources[0x32]	538521	1			T1	70		T2	242		T3	420
valid_sources[0x33]	536960	1			T1	77		T2	241		T3	473
valid_sources[0x34]	579085	1			T1	58		T2	254		T3	420
valid_sources[0x35]	565071	1			T1	90		T2	251		T3	372
valid_sources[0x36]	537930	1			T1	67		T2	226		T3	388
valid_sources[0x37]	532895	1			T1	39		T2	263		T3	460
valid_sources[0x38]	596759	1			T1	71		T2	242		T3	455
valid_sources[0x39]	544933	1			T1	57		T2	228		T3	382
valid_sources[0x3a]	616206	1			T1	53		T2	263		T3	440
valid_sources[0x3b]	538629	1			T1	67		T2	277		T3	393
valid_sources[0x3c]	912954	1			T1	51		T2	263		T3	402
valid_sources[0x3d]	540155	1			T1	46		T2	238		T3	415
valid_sources[0x3e]	725249	1			T1	40		T2	224		T3	381
valid_sources[0x3f]	538177	1			T1	42		T2	229		T3	465
valid_sources[0x40]	597533	1			T1	50		T2	250		T3	450
valid_sources[0x41]	534575	1			T1	85		T2	229		T3	339
valid_sources[0x42]	539067	1			T1	65		T2	242		T3	391
valid_sources[0x43]	537045	1			T1	65		T2	245		T3	414
valid_sources[0x44]	538280	1			T1	41		T2	218		T3	376
valid_sources[0x45]	539606	1			T1	37		T2	265		T3	385
valid_sources[0x46]	567535	1			T1	69		T2	248		T3	398
valid_sources[0x47]	537612	1			T1	50		T2	222		T3	416
valid_sources[0x48]	543885	1			T1	81		T2	256		T3	451
valid_sources[0x49]	552027	1			T1	55		T2	229		T3	492
valid_sources[0x4a]	539922	1			T1	74		T2	233		T3	428
valid_sources[0x4b]	588348	1			T1	54		T2	265		T3	426
valid_sources[0x4c]	537985	1			T1	44		T2	250		T3	392
valid_sources[0x4d]	537983	1			T1	47		T2	203		T3	477
valid_sources[0x4e]	537353	1			T1	54		T2	272		T3	478
valid_sources[0x4f]	536497	1			T1	45		T2	277		T3	394
valid_sources[0x50]	544335	1			T1	59		T2	230		T3	432
valid_sources[0x51]	537478	1			T1	39		T2	254		T3	410
valid_sources[0x52]	538531	1			T1	50		T2	220		T3	412
valid_sources[0x53]	542425	1			T1	83		T2	275		T3	417
valid_sources[0x54]	539887	1			T1	78		T2	234		T3	404
valid_sources[0x55]	560691	1			T1	79		T2	235		T3	421
valid_sources[0x56]	536757	1			T1	88		T2	245		T3	445
valid_sources[0x57]	541740	1			T1	51		T2	223		T3	433
valid_sources[0x58]	538912	1			T1	68		T2	236		T3	421
valid_sources[0x59]	538783	1			T1	63		T2	239		T3	377
valid_sources[0x5a]	2114706	1			T1	59		T2	229		T3	407
valid_sources[0x5b]	640526	1			T1	49		T2	245		T3	382
valid_sources[0x5c]	1885516	1			T1	28		T2	251		T3	458
valid_sources[0x5d]	536590	1			T1	40		T2	218		T3	462
valid_sources[0x5e]	542057	1			T1	53		T2	244		T3	433
valid_sources[0x5f]	2500247	1			T1	61		T2	269		T3	406
valid_sources[0x60]	660952	1			T1	61		T2	218		T3	414
valid_sources[0x61]	536704	1			T1	65		T2	294		T3	381
valid_sources[0x62]	653278	1			T1	100		T2	232		T3	427
valid_sources[0x63]	534623	1			T1	99		T2	242		T3	411
valid_sources[0x64]	536334	1			T1	88		T2	259		T3	382
valid_sources[0x65]	961416	1			T1	58		T2	234		T3	399
valid_sources[0x66]	596213	1			T1	81		T2	211		T3	415
valid_sources[0x67]	2030116	1			T1	73		T2	243		T3	400
valid_sources[0x68]	536695	1			T1	54		T2	255		T3	397
valid_sources[0x69]	555275	1			T1	48		T2	267		T3	427
valid_sources[0x6a]	598044	1			T1	47		T2	232		T3	360
valid_sources[0x6b]	535791	1			T1	88		T2	237		T3	425
valid_sources[0x6c]	1823092	1			T1	64		T2	234		T3	361
valid_sources[0x6d]	543476	1			T1	49		T2	226		T3	445
valid_sources[0x6e]	537229	1			T1	98		T2	267		T3	395
valid_sources[0x6f]	579884	1			T1	35		T2	261		T3	374
valid_sources[0x70]	539763	1			T1	80		T2	256		T3	424
valid_sources[0x71]	535508	1			T1	57		T2	251		T3	399
valid_sources[0x72]	539009	1			T1	88		T2	228		T3	443
valid_sources[0x73]	535316	1			T1	66		T2	284		T3	375
valid_sources[0x74]	538303	1			T1	63		T2	263		T3	393
valid_sources[0x75]	1969118	1			T1	72		T2	225		T3	419
valid_sources[0x76]	542208	1			T1	61		T2	250		T3	423
valid_sources[0x77]	551565	1			T1	73		T2	195		T3	406
valid_sources[0x78]	1202043	1			T1	60		T2	249		T3	417
valid_sources[0x79]	535616	1			T1	64		T2	253		T3	359
valid_sources[0x7a]	538035	1			T1	41		T2	232		T3	415
valid_sources[0x7b]	541957	1			T1	81		T2	201		T3	449
valid_sources[0x7c]	538535	1			T1	51		T2	230		T3	406
valid_sources[0x7d]	544705	1			T1	58		T2	230		T3	455
valid_sources[0x7e]	539208	1			T1	75		T2	279		T3	466
valid_sources[0x7f]	539954	1			T1	47		T2	217		T3	415
valid_sources[0x80]	534003	1			T1	79		T2	174		T3	455

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

35040672

1

T1

414

T2

14431

T3

24245

values[0x0]

all_enables

biggest_size

28772551

1

T1

6619

T2

7979

T3

15035

values[0x1]

all_enables

biggest_size

25384192

1

T1

6455

T2

6728

T3

13290