Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 90415694 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 95052190 1 T1 51957 T2 32620 T3 1727



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 74787518 1 T1 46114 T2 29006 T3 1407
values[0x0] 52126075 1 T1 30542 T2 18984 T3 785
values[0x1] 58554291 1 T1 37802 T2 23643 T3 864



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 67790677 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 117677207 1 T1 68754 T2 43192 T3 2080



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1928263 1 T2 211 T3 8 T4 506
valid_sources[0x01] 489835 1 T2 524 T3 5 T4 532
valid_sources[0x02] 570879 1 T2 351 T3 16 T4 549
valid_sources[0x03] 654150 1 T2 462 T3 11 T4 554
valid_sources[0x04] 1972579 1 T2 472 T3 6 T4 628
valid_sources[0x05] 1859857 1 T2 120 T3 6 T4 611
valid_sources[0x06] 2268351 1 T2 376 T3 15 T4 622
valid_sources[0x07] 491245 1 T2 164 T3 10 T4 634
valid_sources[0x08] 489575 1 T2 334 T3 10 T4 608
valid_sources[0x09] 487913 1 T2 168 T3 10 T4 699
valid_sources[0x0a] 489730 1 T2 535 T3 11 T4 742
valid_sources[0x0b] 490824 1 T2 173 T3 9 T4 669
valid_sources[0x0c] 489510 1 T2 284 T3 18 T4 584
valid_sources[0x0d] 490397 1 T2 140 T3 13 T4 502
valid_sources[0x0e] 489191 1 T2 114 T3 14 T4 428
valid_sources[0x0f] 510654 1 T2 175 T3 14 T4 584
valid_sources[0x10] 544340 1 T2 89 T3 10 T4 580
valid_sources[0x11] 576006 1 T2 350 T3 8 T4 525
valid_sources[0x12] 498594 1 T2 357 T3 17 T4 600
valid_sources[0x13] 617176 1 T2 329 T3 14 T4 671
valid_sources[0x14] 492442 1 T2 395 T3 12 T4 643
valid_sources[0x15] 492250 1 T2 169 T3 13 T4 608
valid_sources[0x16] 487876 1 T2 623 T3 12 T4 549
valid_sources[0x17] 890129 1 T3 7 T4 572 T5 186
valid_sources[0x18] 851665 1 T2 573 T3 12 T4 698
valid_sources[0x19] 492607 1 T2 892 T3 15 T4 643
valid_sources[0x1a] 487312 1 T2 139 T3 13 T4 558
valid_sources[0x1b] 490987 1 T2 373 T3 7 T4 719
valid_sources[0x1c] 554528 1 T2 481 T3 20 T4 498
valid_sources[0x1d] 489225 1 T2 339 T3 17 T4 501
valid_sources[0x1e] 488983 1 T2 522 T3 18 T4 467
valid_sources[0x1f] 495861 1 T2 455 T3 6 T4 519
valid_sources[0x20] 2131249 1 T2 604 T3 11 T4 634
valid_sources[0x21] 488167 1 T2 404 T3 9 T4 530
valid_sources[0x22] 1918142 1 T2 169 T3 15 T4 573
valid_sources[0x23] 488977 1 T2 532 T3 10 T4 579
valid_sources[0x24] 561217 1 T2 266 T3 15 T4 535
valid_sources[0x25] 512072 1 T2 260 T3 14 T4 507
valid_sources[0x26] 488434 1 T2 118 T3 15 T4 621
valid_sources[0x27] 487187 1 T2 511 T3 14 T4 686
valid_sources[0x28] 487783 1 T2 258 T3 9 T4 471
valid_sources[0x29] 488315 1 T2 113 T3 11 T4 462
valid_sources[0x2a] 491135 1 T2 260 T3 10 T4 600
valid_sources[0x2b] 490683 1 T2 68 T3 6 T4 564
valid_sources[0x2c] 488557 1 T2 38 T3 16 T4 498
valid_sources[0x2d] 490867 1 T2 280 T3 9 T4 673
valid_sources[0x2e] 488244 1 T2 223 T3 18 T4 576
valid_sources[0x2f] 491593 1 T2 213 T3 10 T4 517
valid_sources[0x30] 605233 1 T2 587 T3 19 T4 551
valid_sources[0x31] 490199 1 T2 199 T3 9 T4 641
valid_sources[0x32] 561205 1 T2 449 T3 10 T4 457
valid_sources[0x33] 630859 1 T2 370 T3 15 T4 541
valid_sources[0x34] 501332 1 T2 282 T3 9 T4 558
valid_sources[0x35] 489055 1 T2 189 T3 10 T4 489
valid_sources[0x36] 488384 1 T2 274 T3 13 T4 533
valid_sources[0x37] 489777 1 T2 298 T3 17 T4 504
valid_sources[0x38] 544664 1 T2 119 T3 10 T4 717
valid_sources[0x39] 489227 1 T2 447 T3 12 T4 661
valid_sources[0x3a] 2109531 1 T2 388 T3 11 T4 575
valid_sources[0x3b] 2052198 1 T2 281 T3 10 T4 646
valid_sources[0x3c] 1936782 1 T2 341 T3 12 T4 593
valid_sources[0x3d] 519636 1 T2 469 T3 9 T4 564
valid_sources[0x3e] 490768 1 T2 169 T3 8 T4 456
valid_sources[0x3f] 488739 1 T2 308 T3 11 T4 584
valid_sources[0x40] 590180 1 T2 268 T3 9 T4 533
valid_sources[0x41] 501751 1 T2 326 T3 12 T4 563
valid_sources[0x42] 2178484 1 T2 57 T3 7 T4 710
valid_sources[0x43] 488965 1 T2 254 T3 10 T4 563
valid_sources[0x44] 487249 1 T2 425 T3 10 T4 564
valid_sources[0x45] 2121483 1 T2 600 T3 10 T4 530
valid_sources[0x46] 494116 1 T2 81 T3 8 T4 548
valid_sources[0x47] 487610 1 T2 92 T3 13 T4 647
valid_sources[0x48] 622751 1 T1 114458 T2 422 T3 14
valid_sources[0x49] 488903 1 T2 534 T3 17 T4 501
valid_sources[0x4a] 490866 1 T2 145 T3 13 T4 582
valid_sources[0x4b] 493256 1 T2 335 T3 15 T4 655
valid_sources[0x4c] 491149 1 T2 440 T3 5 T4 570
valid_sources[0x4d] 499881 1 T2 359 T3 11 T4 537
valid_sources[0x4e] 488494 1 T2 252 T3 14 T4 493
valid_sources[0x4f] 489402 1 T2 377 T3 11 T4 539
valid_sources[0x50] 570741 1 T2 449 T3 8 T4 627
valid_sources[0x51] 488537 1 T2 137 T3 12 T4 610
valid_sources[0x52] 491776 1 T2 895 T3 18 T4 594
valid_sources[0x53] 554340 1 T2 405 T3 17 T4 734
valid_sources[0x54] 487089 1 T2 92 T3 10 T4 674
valid_sources[0x55] 498698 1 T2 240 T3 14 T4 488
valid_sources[0x56] 532711 1 T2 209 T3 10 T4 483
valid_sources[0x57] 489191 1 T2 363 T3 9 T4 619
valid_sources[0x58] 488107 1 T2 251 T3 10 T4 616
valid_sources[0x59] 2061265 1 T2 438 T3 13 T4 601
valid_sources[0x5a] 486930 1 T2 148 T3 10 T4 637
valid_sources[0x5b] 490229 1 T2 178 T3 10 T4 564
valid_sources[0x5c] 487053 1 T2 181 T3 14 T4 423
valid_sources[0x5d] 489366 1 T2 918 T3 4 T4 571
valid_sources[0x5e] 2082325 1 T2 426 T3 16 T4 511
valid_sources[0x5f] 494141 1 T2 295 T3 14 T4 679
valid_sources[0x60] 857613 1 T2 395 T3 17 T4 642
valid_sources[0x61] 491034 1 T2 228 T3 14 T4 644
valid_sources[0x62] 489985 1 T2 157 T3 17 T4 644
valid_sources[0x63] 960622 1 T2 226 T3 9 T4 579
valid_sources[0x64] 489710 1 T2 177 T3 11 T4 636
valid_sources[0x65] 485879 1 T2 110 T3 24 T4 568
valid_sources[0x66] 487930 1 T2 205 T3 16 T4 655
valid_sources[0x67] 488096 1 T2 319 T3 10 T4 557
valid_sources[0x68] 1932970 1 T2 260 T3 16 T4 710
valid_sources[0x69] 490496 1 T2 383 T3 15 T4 610
valid_sources[0x6a] 489073 1 T2 450 T3 8 T4 583
valid_sources[0x6b] 701348 1 T2 39 T3 15 T4 563
valid_sources[0x6c] 489897 1 T2 267 T3 8 T4 541
valid_sources[0x6d] 637299 1 T2 42 T3 21 T4 560
valid_sources[0x6e] 489717 1 T2 302 T3 17 T4 573
valid_sources[0x6f] 688985 1 T2 431 T3 9 T4 689
valid_sources[0x70] 491166 1 T2 179 T3 18 T4 614
valid_sources[0x71] 487976 1 T2 399 T3 9 T4 690
valid_sources[0x72] 490121 1 T2 649 T3 17 T4 638
valid_sources[0x73] 488458 1 T2 266 T3 11 T4 511
valid_sources[0x74] 488327 1 T2 289 T3 14 T4 558
valid_sources[0x75] 489647 1 T2 116 T3 17 T4 649
valid_sources[0x76] 888678 1 T2 249 T3 11 T4 565
valid_sources[0x77] 490472 1 T2 480 T3 6 T4 656
valid_sources[0x78] 488758 1 T2 135 T3 8 T4 605
valid_sources[0x79] 517065 1 T2 298 T3 15 T4 558
valid_sources[0x7a] 653063 1 T2 251 T3 10 T4 572
valid_sources[0x7b] 1987777 1 T2 383 T3 13 T4 611
valid_sources[0x7c] 535608 1 T2 267 T3 9 T4 528
valid_sources[0x7d] 491616 1 T2 86 T3 17 T4 512
valid_sources[0x7e] 487676 1 T2 317 T3 6 T4 559
valid_sources[0x7f] 2019513 1 T2 150 T3 10 T4 486
valid_sources[0x80] 512063 1 T2 103 T3 16 T4 619



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 37265652 1 T1 22910 T2 14461 T3 685
values[0x0] all_enables biggest_size 30680953 1 T1 15453 T2 9626 T3 532
values[0x1] all_enables biggest_size 27105585 1 T1 13594 T2 8533 T3 510

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%