Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	44211544	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

41911795

1

T1

48047

T2

29605

T3

1176

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	40923064	1			T1	54631		T2	32938		T3	1162
values[0x0]	21156382	1			T1	24735		T2	14924		T3	546
values[0x1]	24043893	1			T1	29003		T2	17867		T3	595

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	33965300	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

52158039

1

T1

61752

T2

37961

T3

1443

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	256507	1			T1	412		T2	207		T4	51
valid_sources[0x01]	267453	1			T1	448		T2	250		T4	53
valid_sources[0x02]	296782	1			T1	418		T2	291		T4	46
valid_sources[0x03]	264645	1			T1	416		T2	114		T4	38
valid_sources[0x04]	263745	1			T1	415		T2	170		T4	36
valid_sources[0x05]	261913	1			T1	422		T2	162		T4	46
valid_sources[0x06]	274493	1			T1	436		T2	145		T4	44
valid_sources[0x07]	255799	1			T1	429		T2	360		T4	51
valid_sources[0x08]	338084	1			T1	423		T2	130		T4	39
valid_sources[0x09]	458070	1			T1	407		T2	309		T4	51
valid_sources[0x0a]	259594	1			T1	381		T2	222		T4	60
valid_sources[0x0b]	263506	1			T1	461		T2	237		T4	39
valid_sources[0x0c]	259048	1			T1	391		T2	196		T4	51
valid_sources[0x0d]	261744	1			T1	417		T2	148		T4	62
valid_sources[0x0e]	891227	1			T1	422		T2	310		T4	46
valid_sources[0x0f]	265435	1			T1	407		T2	270		T4	58
valid_sources[0x10]	252158	1			T1	414		T2	152		T4	36
valid_sources[0x11]	251218	1			T1	412		T2	142		T4	52
valid_sources[0x12]	429199	1			T1	406		T2	197		T4	39
valid_sources[0x13]	261002	1			T1	453		T2	444		T4	49
valid_sources[0x14]	261012	1			T1	439		T2	209		T4	49
valid_sources[0x15]	274210	1			T1	453		T2	123		T4	55
valid_sources[0x16]	259719	1			T1	412		T2	167		T4	60
valid_sources[0x17]	261311	1			T1	401		T2	243		T4	60
valid_sources[0x18]	252694	1			T1	418		T2	299		T4	52
valid_sources[0x19]	619604	1			T1	431		T2	200		T4	45
valid_sources[0x1a]	407672	1			T1	419		T2	156		T4	41
valid_sources[0x1b]	306021	1			T1	428		T2	287		T4	26
valid_sources[0x1c]	340639	1			T1	446		T2	198		T4	57
valid_sources[0x1d]	260748	1			T1	413		T2	320		T4	40
valid_sources[0x1e]	264720	1			T1	425		T2	277		T4	35
valid_sources[0x1f]	262370	1			T1	477		T2	344		T17	1
valid_sources[0x20]	259594	1			T1	410		T2	252		T4	48
valid_sources[0x21]	553763	1			T1	458		T2	224		T4	33
valid_sources[0x22]	272042	1			T1	408		T2	229		T12	7378
valid_sources[0x23]	263933	1			T1	361		T2	247		T4	47
valid_sources[0x24]	265166	1			T1	379		T2	290		T4	49
valid_sources[0x25]	263677	1			T1	476		T2	194		T4	49
valid_sources[0x26]	307469	1			T1	422		T2	332		T4	53
valid_sources[0x27]	254707	1			T1	401		T2	244		T4	63
valid_sources[0x28]	270401	1			T1	426		T2	331		T4	33
valid_sources[0x29]	306181	1			T1	418		T2	419		T4	46
valid_sources[0x2a]	262377	1			T1	442		T2	170		T4	48
valid_sources[0x2b]	253891	1			T1	405		T2	297		T4	48
valid_sources[0x2c]	2249428	1			T1	425		T2	278		T4	68
valid_sources[0x2d]	259629	1			T1	462		T2	182		T4	48
valid_sources[0x2e]	256862	1			T1	430		T2	255		T4	55
valid_sources[0x2f]	375274	1			T1	414		T2	226		T4	42
valid_sources[0x30]	956945	1			T1	427		T2	175		T4	39
valid_sources[0x31]	285122	1			T1	427		T2	402		T4	19
valid_sources[0x32]	257900	1			T1	392		T2	248		T4	58
valid_sources[0x33]	269362	1			T1	430		T2	288		T4	28
valid_sources[0x34]	302224	1			T1	406		T2	353		T4	60
valid_sources[0x35]	944881	1			T1	374		T2	226		T4	50
valid_sources[0x36]	258109	1			T1	408		T2	206		T4	43
valid_sources[0x37]	264208	1			T1	445		T2	376		T4	59
valid_sources[0x38]	261401	1			T1	408		T2	315		T4	48
valid_sources[0x39]	258431	1			T1	393		T2	313		T4	60
valid_sources[0x3a]	255486	1			T1	413		T2	396		T4	67
valid_sources[0x3b]	361973	1			T1	453		T2	317		T4	64
valid_sources[0x3c]	321739	1			T1	438		T2	180		T4	49
valid_sources[0x3d]	257387	1			T1	451		T2	210		T4	39
valid_sources[0x3e]	360058	1			T1	443		T2	154		T4	58
valid_sources[0x3f]	260821	1			T1	381		T2	326		T4	50
valid_sources[0x40]	259223	1			T1	458		T2	200		T4	37
valid_sources[0x41]	266307	1			T1	430		T2	338		T4	57
valid_sources[0x42]	250357	1			T1	410		T2	196		T4	58
valid_sources[0x43]	545101	1			T1	422		T2	372		T4	53
valid_sources[0x44]	359715	1			T1	405		T2	508		T4	47
valid_sources[0x45]	575492	1			T1	426		T2	277		T17	1
valid_sources[0x46]	316193	1			T1	392		T2	225		T4	48
valid_sources[0x47]	259847	1			T1	394		T2	298		T4	33
valid_sources[0x48]	258421	1			T1	433		T2	143		T4	43
valid_sources[0x49]	251843	1			T1	448		T2	294		T4	58
valid_sources[0x4a]	267842	1			T1	408		T2	270		T4	45
valid_sources[0x4b]	260943	1			T1	462		T2	221		T4	52
valid_sources[0x4c]	253431	1			T1	463		T2	526		T4	35
valid_sources[0x4d]	267605	1			T1	392		T2	243		T4	47
valid_sources[0x4e]	261044	1			T1	447		T2	210		T4	33
valid_sources[0x4f]	264140	1			T1	395		T2	270		T4	41
valid_sources[0x50]	432970	1			T1	436		T2	89		T4	38
valid_sources[0x51]	267075	1			T1	425		T2	318		T4	36
valid_sources[0x52]	269317	1			T1	450		T2	209		T4	61
valid_sources[0x53]	255141	1			T1	398		T2	245		T4	29
valid_sources[0x54]	256193	1			T1	408		T2	212		T4	47
valid_sources[0x55]	296907	1			T1	472		T2	254		T4	44
valid_sources[0x56]	1265029	1			T1	425		T2	285		T4	50
valid_sources[0x57]	264543	1			T1	405		T2	336		T4	29
valid_sources[0x58]	258648	1			T1	410		T2	228		T4	56
valid_sources[0x59]	340107	1			T1	392		T2	270		T4	58
valid_sources[0x5a]	259625	1			T1	414		T2	277		T4	43
valid_sources[0x5b]	275849	1			T1	379		T2	243		T4	40
valid_sources[0x5c]	266221	1			T1	388		T2	398		T4	46
valid_sources[0x5d]	267757	1			T1	415		T2	193		T4	36
valid_sources[0x5e]	343474	1			T1	485		T2	290		T4	37
valid_sources[0x5f]	332002	1			T1	453		T2	238		T4	52
valid_sources[0x60]	257316	1			T1	418		T2	449		T4	58
valid_sources[0x61]	472134	1			T1	461		T2	148		T4	46
valid_sources[0x62]	265519	1			T1	453		T2	297		T4	43
valid_sources[0x63]	254758	1			T1	439		T2	359		T4	75
valid_sources[0x64]	416054	1			T1	441		T2	261		T4	52
valid_sources[0x65]	264203	1			T1	419		T2	260		T4	72
valid_sources[0x66]	259956	1			T1	428		T2	197		T4	33
valid_sources[0x67]	260103	1			T1	413		T2	419		T4	55
valid_sources[0x68]	260822	1			T1	406		T2	241		T4	48
valid_sources[0x69]	328082	1			T1	456		T2	295		T4	47
valid_sources[0x6a]	260074	1			T1	390		T2	381		T3	2303
valid_sources[0x6b]	874768	1			T1	427		T2	344		T4	51
valid_sources[0x6c]	318948	1			T1	413		T2	203		T4	46
valid_sources[0x6d]	260030	1			T1	432		T2	335		T4	55
valid_sources[0x6e]	255685	1			T1	451		T2	312		T17	1
valid_sources[0x6f]	260389	1			T1	414		T2	115		T4	33
valid_sources[0x70]	396379	1			T1	426		T2	262		T4	37
valid_sources[0x71]	313694	1			T1	410		T2	336		T4	58
valid_sources[0x72]	652923	1			T1	426		T2	564		T4	61
valid_sources[0x73]	255629	1			T1	430		T2	181		T4	49
valid_sources[0x74]	309040	1			T1	443		T2	169		T4	34
valid_sources[0x75]	261687	1			T1	379		T2	184		T4	35
valid_sources[0x76]	258668	1			T1	385		T2	152		T4	51
valid_sources[0x77]	332063	1			T1	455		T2	434		T4	34
valid_sources[0x78]	302982	1			T1	406		T2	201		T4	40
valid_sources[0x79]	252398	1			T1	415		T2	176		T4	45
valid_sources[0x7a]	253851	1			T1	444		T2	241		T4	65
valid_sources[0x7b]	254678	1			T1	425		T2	306		T4	48
valid_sources[0x7c]	260944	1			T1	420		T2	302		T4	55
valid_sources[0x7d]	267353	1			T1	437		T2	224		T4	59
valid_sources[0x7e]	260334	1			T1	401		T2	261		T4	44
valid_sources[0x7f]	259297	1			T1	455		T2	408		T4	54
valid_sources[0x80]	257981	1			T1	392		T2	189		T4	34

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

20179683

1

T1

27289

T2

16481

T3

574

values[0x0]

all_enables

biggest_size

11698832

1

T1

11569

T2

7141

T3

335

values[0x1]

all_enables

biggest_size

10033280

1

T1

9189

T2

5983

T3

267