Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	40322527	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

38139517

1

T1

83825

T2

37010

T3

3840

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	37264385	1			T1	95311		T2	41461		T3	3658
values[0x0]	19315815	1			T1	43747		T2	18826		T3	1748
values[0x1]	21881844	1			T1	51195		T2	22186		T3	1871

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	31052881	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

47409163

1

T1

108244

T2

47331

T3

4665

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	254105	1			T2	307		T4	257		T15	49
valid_sources[0x01]	256754	1			T2	395		T4	250		T15	66
valid_sources[0x02]	259330	1			T2	287		T4	256		T15	51
valid_sources[0x03]	257067	1			T2	332		T4	217		T15	46
valid_sources[0x04]	261459	1			T2	312		T4	254		T15	41
valid_sources[0x05]	379009	1			T2	296		T4	260		T15	47
valid_sources[0x06]	310963	1			T2	315		T4	230		T15	50
valid_sources[0x07]	254526	1			T2	300		T4	253		T15	53
valid_sources[0x08]	255683	1			T2	322		T4	260		T15	43
valid_sources[0x09]	261565	1			T2	329		T4	253		T15	42
valid_sources[0x0a]	263201	1			T2	295		T4	272		T15	41
valid_sources[0x0b]	261195	1			T2	301		T4	284		T15	59
valid_sources[0x0c]	255731	1			T2	339		T4	242		T15	50
valid_sources[0x0d]	349791	1			T2	319		T4	235		T14	21849
valid_sources[0x0e]	259034	1			T2	359		T4	265		T15	37
valid_sources[0x0f]	257047	1			T2	294		T4	267		T15	52
valid_sources[0x10]	344279	1			T2	317		T4	244		T15	54
valid_sources[0x11]	254055	1			T2	318		T4	240		T15	49
valid_sources[0x12]	254728	1			T2	344		T4	273		T15	55
valid_sources[0x13]	254304	1			T2	306		T4	291		T15	58
valid_sources[0x14]	255977	1			T2	303		T4	236		T15	41
valid_sources[0x15]	377696	1			T2	384		T4	275		T15	42
valid_sources[0x16]	2178027	1			T2	310		T4	244		T15	48
valid_sources[0x17]	939217	1			T2	322		T4	271		T15	50
valid_sources[0x18]	252970	1			T2	322		T4	288		T15	42
valid_sources[0x19]	270976	1			T2	298		T4	241		T15	40
valid_sources[0x1a]	260820	1			T2	309		T4	252		T15	41
valid_sources[0x1b]	256400	1			T2	329		T4	259		T15	38
valid_sources[0x1c]	253511	1			T2	314		T4	264		T15	43
valid_sources[0x1d]	464447	1			T2	312		T4	247		T15	35
valid_sources[0x1e]	256145	1			T2	295		T4	251		T15	37
valid_sources[0x1f]	269028	1			T2	299		T4	249		T15	63
valid_sources[0x20]	259234	1			T2	326		T4	255		T15	62
valid_sources[0x21]	255418	1			T2	296		T4	254		T15	42
valid_sources[0x22]	296361	1			T2	283		T4	255		T15	37
valid_sources[0x23]	253021	1			T2	309		T4	224		T15	38
valid_sources[0x24]	256931	1			T2	333		T4	241		T15	36
valid_sources[0x25]	253610	1			T2	305		T4	251		T15	50
valid_sources[0x26]	262073	1			T2	309		T4	241		T15	49
valid_sources[0x27]	324697	1			T2	338		T4	253		T15	51
valid_sources[0x28]	307668	1			T2	347		T4	267		T15	51
valid_sources[0x29]	259520	1			T2	324		T4	249		T15	57
valid_sources[0x2a]	256537	1			T2	339		T4	258		T15	44
valid_sources[0x2b]	255325	1			T2	353		T4	246		T15	52
valid_sources[0x2c]	310434	1			T2	310		T4	263		T15	41
valid_sources[0x2d]	332880	1			T2	343		T4	280		T15	34
valid_sources[0x2e]	359375	1			T2	333		T4	235		T15	54
valid_sources[0x2f]	258004	1			T2	309		T4	241		T15	48
valid_sources[0x30]	254523	1			T2	344		T4	219		T15	48
valid_sources[0x31]	1188382	1			T2	331		T4	265		T15	49
valid_sources[0x32]	261109	1			T2	324		T4	272		T15	48
valid_sources[0x33]	256435	1			T2	300		T4	221		T15	57
valid_sources[0x34]	261920	1			T2	329		T4	242		T15	43
valid_sources[0x35]	255598	1			T2	366		T4	248		T15	46
valid_sources[0x36]	263766	1			T2	330		T4	249		T15	46
valid_sources[0x37]	253833	1			T2	261		T4	276		T15	41
valid_sources[0x38]	298381	1			T2	296		T4	248		T15	46
valid_sources[0x39]	260131	1			T2	321		T4	272		T15	46
valid_sources[0x3a]	253052	1			T2	324		T4	277		T15	45
valid_sources[0x3b]	275623	1			T2	335		T4	258		T15	54
valid_sources[0x3c]	255044	1			T2	328		T4	282		T15	46
valid_sources[0x3d]	265238	1			T2	352		T4	241		T15	49
valid_sources[0x3e]	254467	1			T2	316		T4	266		T15	36
valid_sources[0x3f]	390742	1			T2	327		T4	245		T15	52
valid_sources[0x40]	255786	1			T2	324		T4	267		T15	39
valid_sources[0x41]	264224	1			T2	338		T4	267		T15	56
valid_sources[0x42]	440902	1			T2	351		T4	237		T15	48
valid_sources[0x43]	255696	1			T2	284		T4	248		T15	55
valid_sources[0x44]	295479	1			T2	317		T4	259		T15	33
valid_sources[0x45]	255369	1			T2	314		T4	271		T15	44
valid_sources[0x46]	341185	1			T2	291		T4	257		T15	35
valid_sources[0x47]	259112	1			T2	349		T4	239		T15	41
valid_sources[0x48]	274945	1			T2	333		T4	252		T15	48
valid_sources[0x49]	255573	1			T2	317		T4	267		T15	44
valid_sources[0x4a]	380744	1			T2	339		T4	260		T15	49
valid_sources[0x4b]	272346	1			T2	363		T4	223		T15	41
valid_sources[0x4c]	375107	1			T2	331		T4	204		T15	42
valid_sources[0x4d]	264994	1			T2	290		T4	261		T15	44
valid_sources[0x4e]	286197	1			T2	343		T4	271		T15	45
valid_sources[0x4f]	310642	1			T2	322		T4	240		T15	31
valid_sources[0x50]	304197	1			T2	336		T4	253		T15	42
valid_sources[0x51]	255961	1			T2	315		T4	267		T15	39
valid_sources[0x52]	275112	1			T2	308		T4	266		T15	44
valid_sources[0x53]	289344	1			T2	345		T4	240		T15	37
valid_sources[0x54]	272365	1			T2	335		T4	290		T15	38
valid_sources[0x55]	260282	1			T2	336		T4	302		T15	56
valid_sources[0x56]	281519	1			T2	286		T4	263		T15	37
valid_sources[0x57]	256316	1			T2	355		T4	237		T15	45
valid_sources[0x58]	254520	1			T2	329		T4	254		T15	41
valid_sources[0x59]	253593	1			T2	337		T4	236		T15	41
valid_sources[0x5a]	373992	1			T2	299		T4	222		T15	46
valid_sources[0x5b]	254833	1			T2	299		T4	257		T15	34
valid_sources[0x5c]	259383	1			T2	329		T4	224		T15	47
valid_sources[0x5d]	289083	1			T2	340		T4	249		T15	48
valid_sources[0x5e]	259260	1			T2	319		T4	244		T15	39
valid_sources[0x5f]	255589	1			T2	314		T4	255		T15	42
valid_sources[0x60]	275882	1			T2	271		T4	247		T15	40
valid_sources[0x61]	260197	1			T2	344		T4	265		T15	47
valid_sources[0x62]	292535	1			T2	291		T4	244		T15	39
valid_sources[0x63]	272605	1			T2	317		T4	252		T15	52
valid_sources[0x64]	659280	1			T2	366		T4	267		T15	54
valid_sources[0x65]	256250	1			T2	313		T4	249		T15	40
valid_sources[0x66]	254653	1			T2	368		T4	271		T15	54
valid_sources[0x67]	252621	1			T2	345		T4	269		T15	36
valid_sources[0x68]	261791	1			T2	326		T3	7277		T4	271
valid_sources[0x69]	259941	1			T2	332		T4	276		T15	47
valid_sources[0x6a]	265400	1			T2	311		T4	242		T15	40
valid_sources[0x6b]	257498	1			T2	335		T4	236		T15	44
valid_sources[0x6c]	320882	1			T2	291		T4	268		T15	44
valid_sources[0x6d]	254818	1			T2	326		T4	242		T15	44
valid_sources[0x6e]	255735	1			T2	327		T4	245		T15	45
valid_sources[0x6f]	653144	1			T2	333		T4	250		T15	44
valid_sources[0x70]	260755	1			T2	350		T4	246		T15	37
valid_sources[0x71]	255138	1			T2	332		T4	264		T15	43
valid_sources[0x72]	254924	1			T2	359		T4	227		T15	49
valid_sources[0x73]	258890	1			T2	318		T4	238		T15	40
valid_sources[0x74]	253739	1			T2	319		T4	272		T15	46
valid_sources[0x75]	255565	1			T2	319		T4	235		T15	50
valid_sources[0x76]	261316	1			T2	320		T4	275		T15	55
valid_sources[0x77]	254589	1			T2	305		T4	219		T15	45
valid_sources[0x78]	254656	1			T2	317		T4	267		T15	53
valid_sources[0x79]	254497	1			T2	315		T4	290		T15	53
valid_sources[0x7a]	304676	1			T2	301		T4	279		T15	44
valid_sources[0x7b]	256975	1			T2	355		T4	238		T15	53
valid_sources[0x7c]	255422	1			T2	313		T4	258		T15	43
valid_sources[0x7d]	264620	1			T2	328		T4	258		T15	49
valid_sources[0x7e]	259030	1			T2	301		T4	280		T15	45
valid_sources[0x7f]	258051	1			T2	261		T4	280		T15	45
valid_sources[0x80]	269589	1			T2	375		T4	283		T15	41

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

18421314

1

T1

47523

T2

20670

T3

1787

values[0x0]

all_enables

biggest_size

10623987

1

T1

20193

T2

9002

T3

1097

values[0x1]

all_enables

biggest_size

9094216

1

T1

16109

T2

7338

T3

956