Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 43046661 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 41381923 1 T1 3 T2 31226 T3 1



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 40039083 1 T1 1 T2 35215 T3 1
values[0x0] 20810991 1 T1 5 T2 16022 T7 10989
values[0x1] 23578510 1 T1 2 T2 18792 T7 12012



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 33148684 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 51279900 1 T1 3 T2 40095 T3 1



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 568875 1 T2 263 T7 199 T4 151
valid_sources[0x01] 255743 1 T2 301 T7 195 T4 123
valid_sources[0x02] 247402 1 T2 317 T7 184 T4 179
valid_sources[0x03] 292428 1 T2 248 T7 194 T4 127
valid_sources[0x04] 383076 1 T2 243 T7 164 T4 159
valid_sources[0x05] 256511 1 T2 295 T7 200 T4 134
valid_sources[0x06] 291846 1 T2 256 T7 167 T4 154
valid_sources[0x07] 289440 1 T2 302 T7 187 T4 154
valid_sources[0x08] 276956 1 T2 193 T7 167 T4 122
valid_sources[0x09] 254924 1 T2 281 T7 190 T4 116
valid_sources[0x0a] 255375 1 T2 273 T7 187 T4 148
valid_sources[0x0b] 249380 1 T2 283 T7 182 T4 151
valid_sources[0x0c] 254757 1 T2 274 T7 202 T4 152
valid_sources[0x0d] 281061 1 T2 292 T7 202 T4 177
valid_sources[0x0e] 353659 1 T2 240 T7 179 T4 164
valid_sources[0x0f] 254834 1 T2 266 T7 154 T4 132
valid_sources[0x10] 256206 1 T2 255 T7 186 T4 116
valid_sources[0x11] 249029 1 T2 271 T7 177 T4 209
valid_sources[0x12] 279804 1 T2 302 T7 164 T4 130
valid_sources[0x13] 248021 1 T2 336 T7 178 T4 142
valid_sources[0x14] 329934 1 T2 291 T7 179 T4 147
valid_sources[0x15] 261016 1 T2 242 T7 183 T4 181
valid_sources[0x16] 258355 1 T2 252 T7 163 T4 161
valid_sources[0x17] 270442 1 T2 294 T7 194 T4 176
valid_sources[0x18] 348003 1 T2 261 T7 172 T4 129
valid_sources[0x19] 243684 1 T2 319 T7 170 T4 118
valid_sources[0x1a] 270438 1 T2 269 T7 183 T4 173
valid_sources[0x1b] 248032 1 T2 265 T7 217 T4 132
valid_sources[0x1c] 245847 1 T2 260 T7 154 T4 164
valid_sources[0x1d] 255598 1 T2 291 T7 156 T4 128
valid_sources[0x1e] 245493 1 T2 302 T7 160 T4 195
valid_sources[0x1f] 244281 1 T2 286 T7 177 T4 131
valid_sources[0x20] 2192566 1 T2 311 T7 176 T4 154
valid_sources[0x21] 248980 1 T2 289 T7 190 T4 154
valid_sources[0x22] 244321 1 T2 228 T7 167 T4 150
valid_sources[0x23] 239219 1 T2 274 T7 189 T4 137
valid_sources[0x24] 249526 1 T2 322 T7 172 T4 137
valid_sources[0x25] 260905 1 T2 257 T7 172 T4 153
valid_sources[0x26] 251758 1 T2 306 T7 174 T4 160
valid_sources[0x27] 771144 1 T2 273 T7 197 T4 164
valid_sources[0x28] 329489 1 T2 277 T7 176 T4 138
valid_sources[0x29] 318901 1 T2 277 T7 184 T4 180
valid_sources[0x2a] 253638 1 T2 248 T7 201 T4 126
valid_sources[0x2b] 249003 1 T2 249 T7 158 T4 124
valid_sources[0x2c] 290635 1 T2 265 T7 196 T4 162
valid_sources[0x2d] 379801 1 T2 254 T7 208 T4 119
valid_sources[0x2e] 252616 1 T2 260 T7 166 T4 144
valid_sources[0x2f] 253292 1 T2 297 T7 182 T4 161
valid_sources[0x30] 326639 1 T2 265 T7 181 T4 153
valid_sources[0x31] 244709 1 T2 272 T7 133 T4 154
valid_sources[0x32] 246228 1 T2 281 T7 178 T4 158
valid_sources[0x33] 251652 1 T2 262 T7 206 T4 192
valid_sources[0x34] 252603 1 T2 291 T7 192 T4 141
valid_sources[0x35] 870671 1 T2 243 T7 190 T4 148
valid_sources[0x36] 247245 1 T2 259 T7 183 T4 139
valid_sources[0x37] 252316 1 T2 308 T7 162 T4 127
valid_sources[0x38] 267717 1 T2 299 T7 179 T4 135
valid_sources[0x39] 1157126 1 T2 267 T7 193 T4 132
valid_sources[0x3a] 244931 1 T2 258 T7 188 T4 113
valid_sources[0x3b] 249955 1 T2 301 T7 178 T4 123
valid_sources[0x3c] 261014 1 T2 249 T7 169 T4 123
valid_sources[0x3d] 1153624 1 T2 262 T7 167 T4 143
valid_sources[0x3e] 245654 1 T2 295 T7 190 T4 163
valid_sources[0x3f] 251938 1 T2 272 T7 180 T4 156
valid_sources[0x40] 244602 1 T2 272 T7 214 T4 145
valid_sources[0x41] 293718 1 T2 282 T7 181 T4 153
valid_sources[0x42] 253685 1 T2 246 T7 180 T4 134
valid_sources[0x43] 384809 1 T2 298 T7 194 T4 161
valid_sources[0x44] 254207 1 T2 249 T7 157 T4 153
valid_sources[0x45] 251844 1 T2 256 T7 190 T4 170
valid_sources[0x46] 243362 1 T2 231 T7 188 T4 127
valid_sources[0x47] 247887 1 T2 310 T7 167 T4 174
valid_sources[0x48] 243628 1 T2 251 T7 172 T4 158
valid_sources[0x49] 247993 1 T2 319 T7 180 T4 128
valid_sources[0x4a] 251462 1 T2 335 T7 182 T4 162
valid_sources[0x4b] 250622 1 T2 263 T7 184 T4 174
valid_sources[0x4c] 249780 1 T2 273 T7 172 T4 168
valid_sources[0x4d] 248761 1 T2 276 T3 1 T7 184
valid_sources[0x4e] 251089 1 T2 283 T7 159 T4 126
valid_sources[0x4f] 319042 1 T2 253 T7 181 T4 221
valid_sources[0x50] 254584 1 T2 280 T7 192 T4 140
valid_sources[0x51] 271766 1 T2 288 T7 171 T4 121
valid_sources[0x52] 249085 1 T2 292 T7 188 T4 162
valid_sources[0x53] 829269 1 T2 253 T7 164 T4 148
valid_sources[0x54] 252857 1 T2 310 T7 199 T4 163
valid_sources[0x55] 255912 1 T2 238 T7 180 T4 153
valid_sources[0x56] 253463 1 T2 224 T7 180 T4 124
valid_sources[0x57] 243949 1 T2 276 T7 159 T4 131
valid_sources[0x58] 248727 1 T2 265 T7 162 T4 116
valid_sources[0x59] 258310 1 T2 235 T7 183 T4 154
valid_sources[0x5a] 262200 1 T2 265 T7 195 T4 161
valid_sources[0x5b] 346743 1 T2 275 T7 207 T4 161
valid_sources[0x5c] 246374 1 T2 257 T7 163 T4 125
valid_sources[0x5d] 248513 1 T2 296 T7 191 T4 151
valid_sources[0x5e] 249487 1 T2 255 T7 189 T4 205
valid_sources[0x5f] 253691 1 T2 300 T7 186 T4 156
valid_sources[0x60] 311030 1 T2 306 T7 172 T4 142
valid_sources[0x61] 263807 1 T2 261 T7 185 T4 132
valid_sources[0x62] 279117 1 T2 297 T7 171 T4 134
valid_sources[0x63] 628131 1 T2 281 T7 176 T4 132
valid_sources[0x64] 250492 1 T2 239 T7 181 T4 135
valid_sources[0x65] 266370 1 T2 255 T7 179 T4 144
valid_sources[0x66] 256789 1 T2 283 T7 161 T4 124
valid_sources[0x67] 249999 1 T2 320 T7 180 T4 107
valid_sources[0x68] 253110 1 T2 285 T7 191 T4 134
valid_sources[0x69] 323503 1 T2 318 T7 202 T4 150
valid_sources[0x6a] 415894 1 T2 264 T7 176 T4 143
valid_sources[0x6b] 251696 1 T2 231 T7 184 T4 139
valid_sources[0x6c] 303169 1 T2 277 T7 178 T4 144
valid_sources[0x6d] 517638 1 T2 307 T7 206 T4 153
valid_sources[0x6e] 247979 1 T2 268 T7 165 T4 135
valid_sources[0x6f] 2532162 1 T2 261 T7 223 T4 139
valid_sources[0x70] 241911 1 T2 262 T7 149 T4 146
valid_sources[0x71] 269609 1 T2 309 T7 177 T4 114
valid_sources[0x72] 244180 1 T2 324 T7 163 T4 160
valid_sources[0x73] 353355 1 T2 277 T7 197 T4 142
valid_sources[0x74] 649309 1 T2 269 T7 189 T4 154
valid_sources[0x75] 247980 1 T2 250 T7 182 T4 143
valid_sources[0x76] 241878 1 T2 252 T7 197 T4 166
valid_sources[0x77] 327720 1 T2 267 T7 194 T4 137
valid_sources[0x78] 252866 1 T2 293 T7 186 T4 143
valid_sources[0x79] 1277144 1 T2 279 T7 194 T4 163
valid_sources[0x7a] 246331 1 T2 271 T7 179 T4 123
valid_sources[0x7b] 255607 1 T2 263 T7 202 T4 173
valid_sources[0x7c] 445122 1 T2 295 T7 149 T4 141
valid_sources[0x7d] 246561 1 T2 241 T7 192 T4 121
valid_sources[0x7e] 258057 1 T2 291 T7 165 T4 130
valid_sources[0x7f] 247091 1 T2 281 T7 170 T4 112
valid_sources[0x80] 242647 1 T2 249 T7 162 T4 153



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 19822343 1 T2 17629 T3 1 T7 11627
values[0x0] all_enables biggest_size 11591257 1 T1 2 T2 7468 T7 6189
values[0x1] all_enables biggest_size 9968323 1 T1 1 T2 6129 T7 5464

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%