Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 44609142 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 41802252 1 T1 437 T2 62139 T3 3



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 41246389 1 T1 392 T2 66151 T3 1
values[0x0] 21124509 1 T1 181 T2 32170 T3 2
values[0x1] 24040496 1 T1 180 T2 36673 T3 3



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 34330414 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 52080980 1 T1 516 T2 78780 T3 4



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 274966 1 T2 513 T9 157 T18 19
valid_sources[0x01] 314777 1 T2 420 T9 120 T18 24
valid_sources[0x02] 270899 1 T2 455 T9 132 T18 29
valid_sources[0x03] 295745 1 T2 462 T9 132 T18 21
valid_sources[0x04] 270896 1 T2 355 T9 157 T18 35
valid_sources[0x05] 417109 1 T2 479 T9 119 T18 24
valid_sources[0x06] 272133 1 T2 469 T9 153 T18 25
valid_sources[0x07] 279920 1 T2 490 T3 1 T9 153
valid_sources[0x08] 267120 1 T2 620 T9 125 T18 32
valid_sources[0x09] 269101 1 T2 809 T9 163 T18 15
valid_sources[0x0a] 268517 1 T2 394 T9 177 T18 26
valid_sources[0x0b] 273219 1 T2 624 T9 126 T18 23
valid_sources[0x0c] 335528 1 T2 350 T9 123 T18 26
valid_sources[0x0d] 270855 1 T2 493 T9 135 T18 30
valid_sources[0x0e] 272554 1 T2 347 T9 133 T18 30
valid_sources[0x0f] 272006 1 T2 462 T9 160 T18 26
valid_sources[0x10] 2205438 1 T2 529 T9 142 T18 18
valid_sources[0x11] 274929 1 T2 602 T9 167 T18 20
valid_sources[0x12] 271617 1 T2 421 T9 128 T18 25
valid_sources[0x13] 274048 1 T2 713 T9 146 T18 14
valid_sources[0x14] 271893 1 T2 426 T9 113 T18 29
valid_sources[0x15] 273017 1 T2 646 T9 146 T17 1
valid_sources[0x16] 273341 1 T2 728 T9 131 T18 41
valid_sources[0x17] 271420 1 T2 763 T9 142 T18 28
valid_sources[0x18] 273521 1 T2 545 T9 202 T18 20
valid_sources[0x19] 267881 1 T2 475 T9 174 T18 20
valid_sources[0x1a] 275169 1 T2 717 T9 128 T18 26
valid_sources[0x1b] 273406 1 T2 782 T9 147 T18 23
valid_sources[0x1c] 300096 1 T2 660 T9 170 T18 31
valid_sources[0x1d] 311751 1 T2 368 T9 158 T18 29
valid_sources[0x1e] 272058 1 T2 742 T9 148 T18 27
valid_sources[0x1f] 270987 1 T2 489 T9 130 T18 28
valid_sources[0x20] 408694 1 T2 535 T9 131 T18 30
valid_sources[0x21] 275209 1 T2 812 T9 137 T18 36
valid_sources[0x22] 328227 1 T2 570 T9 125 T18 18
valid_sources[0x23] 1103089 1 T2 666 T9 150 T18 18
valid_sources[0x24] 270107 1 T2 612 T9 128 T18 17
valid_sources[0x25] 381357 1 T2 396 T9 154 T18 28
valid_sources[0x26] 273466 1 T2 522 T9 142 T18 22
valid_sources[0x27] 272101 1 T2 707 T9 145 T18 40
valid_sources[0x28] 269804 1 T2 504 T9 135 T18 31
valid_sources[0x29] 341539 1 T2 540 T9 142 T18 31
valid_sources[0x2a] 271185 1 T2 663 T9 175 T18 23
valid_sources[0x2b] 273068 1 T2 388 T9 175 T18 21
valid_sources[0x2c] 277315 1 T2 611 T9 136 T18 28
valid_sources[0x2d] 269501 1 T2 528 T9 132 T18 19
valid_sources[0x2e] 271171 1 T2 636 T9 149 T18 24
valid_sources[0x2f] 273144 1 T2 454 T9 140 T18 24
valid_sources[0x30] 276531 1 T2 477 T9 143 T17 1
valid_sources[0x31] 267555 1 T2 735 T9 146 T18 23
valid_sources[0x32] 333559 1 T2 469 T9 127 T18 24
valid_sources[0x33] 284683 1 T2 457 T9 145 T18 25
valid_sources[0x34] 268193 1 T2 539 T9 137 T18 27
valid_sources[0x35] 304744 1 T2 608 T9 130 T18 17
valid_sources[0x36] 269180 1 T2 522 T9 145 T18 27
valid_sources[0x37] 270758 1 T2 373 T9 169 T18 29
valid_sources[0x38] 270293 1 T2 551 T9 149 T18 19
valid_sources[0x39] 279322 1 T2 525 T9 127 T18 33
valid_sources[0x3a] 581385 1 T2 496 T9 125 T18 18
valid_sources[0x3b] 272540 1 T2 305 T9 147 T18 24
valid_sources[0x3c] 270445 1 T2 586 T9 128 T18 19
valid_sources[0x3d] 269525 1 T2 357 T9 150 T18 24
valid_sources[0x3e] 272053 1 T2 729 T9 128 T18 17
valid_sources[0x3f] 305989 1 T2 665 T9 107 T18 25
valid_sources[0x40] 268502 1 T2 520 T9 109 T18 33
valid_sources[0x41] 273600 1 T2 522 T9 128 T18 32
valid_sources[0x42] 277369 1 T2 549 T9 150 T18 22
valid_sources[0x43] 269529 1 T2 442 T9 140 T18 31
valid_sources[0x44] 384196 1 T2 632 T9 149 T18 25
valid_sources[0x45] 267627 1 T2 581 T9 154 T18 21
valid_sources[0x46] 273239 1 T2 457 T9 121 T18 29
valid_sources[0x47] 284384 1 T2 505 T9 184 T18 27
valid_sources[0x48] 294797 1 T2 544 T9 163 T18 24
valid_sources[0x49] 269186 1 T2 456 T9 166 T18 40
valid_sources[0x4a] 267888 1 T2 445 T9 127 T18 25
valid_sources[0x4b] 327479 1 T2 418 T9 163 T18 19
valid_sources[0x4c] 272147 1 T2 411 T9 122 T18 29
valid_sources[0x4d] 269819 1 T2 308 T9 152 T18 37
valid_sources[0x4e] 272714 1 T2 504 T9 144 T18 21
valid_sources[0x4f] 473425 1 T2 295 T9 151 T18 25
valid_sources[0x50] 691679 1 T2 438 T9 105 T18 22
valid_sources[0x51] 272895 1 T2 544 T9 136 T18 22
valid_sources[0x52] 1264894 1 T2 537 T9 142 T18 22
valid_sources[0x53] 273835 1 T2 364 T9 117 T18 19
valid_sources[0x54] 270321 1 T2 603 T9 137 T18 25
valid_sources[0x55] 269919 1 T2 255 T9 164 T18 32
valid_sources[0x56] 318767 1 T2 483 T9 156 T18 40
valid_sources[0x57] 297943 1 T2 859 T9 140 T18 28
valid_sources[0x58] 269094 1 T2 366 T9 157 T18 27
valid_sources[0x59] 589882 1 T2 180 T9 127 T18 26
valid_sources[0x5a] 278281 1 T2 487 T9 140 T18 21
valid_sources[0x5b] 270112 1 T2 914 T9 147 T18 27
valid_sources[0x5c] 269047 1 T2 586 T9 139 T18 29
valid_sources[0x5d] 270758 1 T2 621 T9 145 T18 18
valid_sources[0x5e] 274363 1 T2 265 T9 159 T18 31
valid_sources[0x5f] 272737 1 T2 422 T9 123 T18 27
valid_sources[0x60] 275419 1 T2 751 T9 117 T18 21
valid_sources[0x61] 367747 1 T2 332 T9 145 T18 39
valid_sources[0x62] 274532 1 T2 271 T9 167 T18 41
valid_sources[0x63] 288455 1 T2 688 T9 154 T18 31
valid_sources[0x64] 274866 1 T2 387 T9 152 T18 26
valid_sources[0x65] 291734 1 T2 928 T9 142 T18 25
valid_sources[0x66] 268232 1 T2 287 T3 1 T9 120
valid_sources[0x67] 272092 1 T2 438 T9 122 T18 16
valid_sources[0x68] 278719 1 T2 459 T9 145 T18 23
valid_sources[0x69] 526907 1 T2 552 T9 147 T18 25
valid_sources[0x6a] 286673 1 T2 466 T9 165 T18 27
valid_sources[0x6b] 267972 1 T2 447 T9 125 T18 23
valid_sources[0x6c] 270149 1 T2 590 T9 142 T18 24
valid_sources[0x6d] 270835 1 T2 511 T9 132 T18 40
valid_sources[0x6e] 269603 1 T2 623 T9 150 T18 24
valid_sources[0x6f] 286486 1 T2 601 T9 134 T18 23
valid_sources[0x70] 295155 1 T2 589 T9 146 T18 25
valid_sources[0x71] 432435 1 T2 523 T9 155 T18 33
valid_sources[0x72] 268622 1 T2 543 T9 160 T18 29
valid_sources[0x73] 271725 1 T2 721 T9 142 T18 29
valid_sources[0x74] 269652 1 T2 479 T9 118 T18 28
valid_sources[0x75] 275039 1 T2 586 T9 176 T18 28
valid_sources[0x76] 271446 1 T2 551 T9 123 T18 24
valid_sources[0x77] 275473 1 T2 561 T9 136 T18 25
valid_sources[0x78] 418628 1 T2 512 T9 162 T18 37
valid_sources[0x79] 305062 1 T2 565 T9 109 T18 27
valid_sources[0x7a] 280679 1 T2 547 T9 171 T18 32
valid_sources[0x7b] 270490 1 T2 653 T9 142 T17 1
valid_sources[0x7c] 269770 1 T2 441 T9 149 T18 41
valid_sources[0x7d] 272616 1 T2 329 T9 135 T18 26
valid_sources[0x7e] 301568 1 T2 537 T9 152 T18 21
valid_sources[0x7f] 476670 1 T2 396 T9 148 T18 25
valid_sources[0x80] 2282314 1 T2 377 T7 201211 T9 150



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 20432806 1 T1 192 T2 32964 T3 1
values[0x0] all_enables biggest_size 11525768 1 T1 134 T2 15993 T3 1
values[0x1] all_enables biggest_size 9843678 1 T1 111 T2 13182 T3 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%