Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	41625085	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

39603761

1

T1

9

T2

1184

T3

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	38584940	1			T1	1		T2	1386		T3	1
values[0x0]	19990601	1			T1	8		T2	533		T3	1
values[0x1]	22653305	1			T1	9		T2	549		T7	49107

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	32028590	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

49200256

1

T1

10

T2

1488

T3

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	223991	1			T2	13		T7	680		T4	12
valid_sources[0x01]	592576	1			T2	20		T7	709		T4	52
valid_sources[0x02]	221700	1			T2	10		T7	795		T4	193
valid_sources[0x03]	226145	1			T2	13		T7	622		T4	51
valid_sources[0x04]	224743	1			T2	3		T7	787		T4	90
valid_sources[0x05]	225769	1			T3	1		T7	660		T4	6
valid_sources[0x06]	388180	1			T2	38		T7	834		T4	137
valid_sources[0x07]	227825	1			T2	7		T7	730		T4	49
valid_sources[0x08]	234285	1			T2	12		T7	687		T4	86
valid_sources[0x09]	227533	1			T2	11		T7	838		T4	59
valid_sources[0x0a]	225471	1			T2	10		T7	745		T4	107
valid_sources[0x0b]	227728	1			T7	668		T4	155		T5	3375
valid_sources[0x0c]	224623	1			T2	13		T7	711		T4	160
valid_sources[0x0d]	225186	1			T2	7		T7	680		T4	109
valid_sources[0x0e]	223051	1			T2	45		T7	654		T4	4
valid_sources[0x0f]	224068	1			T2	21		T7	773		T5	3403
valid_sources[0x10]	298457	1			T7	605		T4	67		T5	3435
valid_sources[0x11]	357120	1			T2	1		T7	770		T4	170
valid_sources[0x12]	238379	1			T7	724		T4	37		T5	3376
valid_sources[0x13]	335163	1			T7	602		T4	118		T5	3244
valid_sources[0x14]	266703	1			T2	34		T7	731		T4	109
valid_sources[0x15]	484293	1			T2	6		T7	692		T4	90
valid_sources[0x16]	225265	1			T7	581		T4	112		T5	3242
valid_sources[0x17]	224808	1			T7	798		T4	34		T5	3347
valid_sources[0x18]	224935	1			T2	35		T7	860		T4	57
valid_sources[0x19]	224827	1			T2	11		T7	679		T4	260
valid_sources[0x1a]	817625	1			T7	631		T4	274		T5	3282
valid_sources[0x1b]	225432	1			T2	2		T7	667		T4	164
valid_sources[0x1c]	1022500	1			T2	8		T7	679		T4	177
valid_sources[0x1d]	331062	1			T2	18		T7	671		T4	69
valid_sources[0x1e]	227237	1			T7	626		T4	125		T5	3379
valid_sources[0x1f]	226376	1			T2	16		T7	623		T4	114
valid_sources[0x20]	233378	1			T2	6		T7	723		T4	22
valid_sources[0x21]	222929	1			T7	716		T4	141		T5	3334
valid_sources[0x22]	225107	1			T2	13		T7	801		T4	27
valid_sources[0x23]	275611	1			T2	10		T7	778		T4	128
valid_sources[0x24]	260100	1			T7	751		T4	15		T5	3327
valid_sources[0x25]	222708	1			T7	752		T4	181		T5	3320
valid_sources[0x26]	229947	1			T2	15		T7	715		T4	92
valid_sources[0x27]	225752	1			T2	3		T7	727		T4	103
valid_sources[0x28]	224460	1			T2	10		T7	664		T5	3089
valid_sources[0x29]	229577	1			T2	8		T7	726		T4	90
valid_sources[0x2a]	226167	1			T7	646		T4	27		T5	3356
valid_sources[0x2b]	276395	1			T2	4		T7	757		T4	327
valid_sources[0x2c]	2149345	1			T1	9		T2	12		T7	702
valid_sources[0x2d]	356249	1			T7	739		T5	3280		T8	64
valid_sources[0x2e]	480385	1			T2	4		T7	556		T4	12
valid_sources[0x2f]	378530	1			T7	698		T4	177		T5	3359
valid_sources[0x30]	354710	1			T2	3		T7	796		T4	70
valid_sources[0x31]	262869	1			T2	16		T7	747		T4	14
valid_sources[0x32]	230917	1			T2	31		T7	669		T4	75
valid_sources[0x33]	224698	1			T2	2		T7	551		T4	170
valid_sources[0x34]	242912	1			T2	10		T7	667		T4	119
valid_sources[0x35]	227820	1			T7	759		T4	40		T5	3342
valid_sources[0x36]	225609	1			T2	16		T7	656		T4	67
valid_sources[0x37]	311556	1			T7	725		T4	80		T5	3152
valid_sources[0x38]	228435	1			T2	10		T7	691		T4	67
valid_sources[0x39]	225411	1			T2	6		T7	605		T4	93
valid_sources[0x3a]	288484	1			T2	9		T7	641		T4	82
valid_sources[0x3b]	227831	1			T2	1		T7	697		T4	100
valid_sources[0x3c]	226775	1			T2	15		T7	698		T4	51
valid_sources[0x3d]	281790	1			T2	10		T7	584		T4	41
valid_sources[0x3e]	232020	1			T2	6		T7	764		T4	211
valid_sources[0x3f]	226399	1			T2	3		T7	577		T4	205
valid_sources[0x40]	910339	1			T7	768		T4	277		T5	3369
valid_sources[0x41]	2999026	1			T7	615		T4	15		T5	3299
valid_sources[0x42]	229456	1			T2	3		T7	641		T4	3
valid_sources[0x43]	222044	1			T2	26		T7	714		T4	46
valid_sources[0x44]	225565	1			T2	18		T7	648		T4	128
valid_sources[0x45]	226782	1			T7	624		T4	175		T5	3243
valid_sources[0x46]	514207	1			T2	12		T7	746		T4	89
valid_sources[0x47]	728663	1			T2	1		T7	661		T4	246
valid_sources[0x48]	228559	1			T2	38		T7	738		T4	77
valid_sources[0x49]	227394	1			T2	31		T7	686		T4	79
valid_sources[0x4a]	241849	1			T2	38		T7	719		T4	164
valid_sources[0x4b]	223841	1			T2	17		T7	690		T4	120
valid_sources[0x4c]	256059	1			T2	8		T7	678		T4	24
valid_sources[0x4d]	226009	1			T2	3		T7	838		T4	51
valid_sources[0x4e]	228623	1			T2	7		T7	583		T4	26
valid_sources[0x4f]	227146	1			T2	17		T7	735		T4	119
valid_sources[0x50]	225141	1			T2	3		T7	799		T4	51
valid_sources[0x51]	429959	1			T2	8		T7	673		T4	280
valid_sources[0x52]	221743	1			T2	19		T7	657		T4	42
valid_sources[0x53]	322038	1			T2	12		T7	706		T4	99
valid_sources[0x54]	423730	1			T2	9		T7	697		T5	3297
valid_sources[0x55]	238928	1			T7	872		T4	199		T5	3368
valid_sources[0x56]	542939	1			T2	6		T7	739		T4	29
valid_sources[0x57]	226942	1			T7	730		T4	72		T5	3266
valid_sources[0x58]	229014	1			T2	15		T7	711		T4	122
valid_sources[0x59]	221791	1			T7	608		T4	87		T5	3202
valid_sources[0x5a]	225420	1			T2	30		T7	641		T4	70
valid_sources[0x5b]	786594	1			T2	3		T7	603		T4	45
valid_sources[0x5c]	226212	1			T7	693		T4	93		T5	3340
valid_sources[0x5d]	225925	1			T2	9		T7	689		T4	15
valid_sources[0x5e]	225509	1			T2	35		T7	641		T4	47
valid_sources[0x5f]	419968	1			T2	20		T7	638		T4	30
valid_sources[0x60]	224017	1			T2	24		T7	621		T4	112
valid_sources[0x61]	226770	1			T2	8		T7	680		T4	8
valid_sources[0x62]	222650	1			T2	21		T7	677		T4	61
valid_sources[0x63]	296718	1			T7	639		T4	101		T5	3248
valid_sources[0x64]	363793	1			T7	624		T4	165		T5	3338
valid_sources[0x65]	228170	1			T1	9		T7	786		T4	97
valid_sources[0x66]	227569	1			T2	9		T7	433		T4	124
valid_sources[0x67]	229384	1			T2	16		T7	797		T4	16
valid_sources[0x68]	227843	1			T2	15		T7	690		T4	37
valid_sources[0x69]	279463	1			T2	18		T7	693		T4	113
valid_sources[0x6a]	226861	1			T2	16		T7	636		T4	134
valid_sources[0x6b]	226204	1			T2	18		T7	611		T4	367
valid_sources[0x6c]	226731	1			T2	7		T7	732		T4	22
valid_sources[0x6d]	224641	1			T2	5		T7	658		T4	5
valid_sources[0x6e]	355352	1			T2	7		T7	706		T4	37
valid_sources[0x6f]	225379	1			T2	9		T7	715		T4	95
valid_sources[0x70]	224458	1			T2	12		T7	697		T4	99
valid_sources[0x71]	244106	1			T2	8		T7	602		T5	3257
valid_sources[0x72]	270053	1			T2	7		T3	1		T7	678
valid_sources[0x73]	223751	1			T7	658		T4	165		T5	3304
valid_sources[0x74]	225373	1			T2	16		T7	773		T4	59
valid_sources[0x75]	387276	1			T7	691		T4	97		T5	3355
valid_sources[0x76]	247095	1			T2	9		T7	769		T4	39
valid_sources[0x77]	226924	1			T2	9		T7	715		T4	61
valid_sources[0x78]	229224	1			T7	708		T4	109		T5	3147
valid_sources[0x79]	359340	1			T2	2		T7	543		T4	209
valid_sources[0x7a]	400244	1			T7	756		T4	39		T5	3264
valid_sources[0x7b]	239450	1			T2	2		T7	734		T4	69
valid_sources[0x7c]	225486	1			T2	51		T7	729		T4	29
valid_sources[0x7d]	277045	1			T2	31		T7	613		T4	163
valid_sources[0x7e]	224974	1			T2	19		T7	761		T4	84
valid_sources[0x7f]	403450	1			T2	35		T7	663		T4	23
valid_sources[0x80]	301485	1			T2	1		T7	738		T4	105

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

19050927

1

T1

1

T2

575

T3

1

values[0x0]

all_enables

biggest_size

11065117

1

T1

5

T2

329

T7

20897

values[0x1]

all_enables

biggest_size

9487717

1

T1

3

T2

280

T7

16663