Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	41830659	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

39335629

1

T1

11162

T2

58872

T3

237067

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	38734590	1			T1	8088		T2	67389		T3	222711
values[0x0]	19881017	1			T1	5011		T2	30714		T3	117394
values[0x1]	22550681	1			T1	5028		T2	36375		T3	131870

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	32215844	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

48950444

1

T1

13469

T2

76190

T3

290658

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	253637	1			T1	72		T2	518		T4	21
valid_sources[0x01]	253766	1			T1	87		T2	503		T4	23
valid_sources[0x02]	255570	1			T1	56		T2	527		T4	15
valid_sources[0x03]	250551	1			T1	55		T2	482		T4	17
valid_sources[0x04]	255372	1			T1	86		T2	490		T4	18
valid_sources[0x05]	257437	1			T1	63		T2	488		T4	28
valid_sources[0x06]	270750	1			T1	71		T2	485		T4	16
valid_sources[0x07]	253684	1			T1	75		T2	458		T4	10
valid_sources[0x08]	255624	1			T1	89		T2	522		T4	17
valid_sources[0x09]	255488	1			T1	63		T2	581		T4	12
valid_sources[0x0a]	306293	1			T1	76		T2	456		T4	11
valid_sources[0x0b]	380151	1			T1	62		T2	496		T4	11
valid_sources[0x0c]	700263	1			T1	85		T2	462		T4	40
valid_sources[0x0d]	274749	1			T1	91		T2	653		T4	29
valid_sources[0x0e]	255887	1			T1	65		T2	446		T4	26
valid_sources[0x0f]	299699	1			T1	81		T2	484		T4	33
valid_sources[0x10]	253003	1			T1	81		T2	548		T4	22
valid_sources[0x11]	256475	1			T1	70		T2	479		T4	17
valid_sources[0x12]	253837	1			T1	76		T2	466		T4	18
valid_sources[0x13]	256150	1			T1	77		T2	480		T4	20
valid_sources[0x14]	384030	1			T1	59		T2	507		T4	24
valid_sources[0x15]	254642	1			T1	55		T2	483		T4	21
valid_sources[0x16]	290585	1			T1	59		T2	535		T4	24
valid_sources[0x17]	256294	1			T1	76		T2	493		T4	17
valid_sources[0x18]	253473	1			T1	64		T2	515		T4	29
valid_sources[0x19]	257084	1			T1	85		T2	646		T4	20
valid_sources[0x1a]	255036	1			T1	73		T2	610		T4	17
valid_sources[0x1b]	253693	1			T1	85		T2	548		T4	29
valid_sources[0x1c]	255456	1			T1	51		T2	457		T4	15
valid_sources[0x1d]	251857	1			T1	69		T2	568		T4	17
valid_sources[0x1e]	256200	1			T1	58		T2	482		T4	21
valid_sources[0x1f]	746747	1			T1	55		T2	449		T4	25
valid_sources[0x20]	316254	1			T1	59		T2	588		T4	19
valid_sources[0x21]	290779	1			T1	68		T2	480		T4	24
valid_sources[0x22]	336842	1			T1	59		T2	600		T4	25
valid_sources[0x23]	250887	1			T1	67		T2	544		T4	15
valid_sources[0x24]	252318	1			T1	59		T2	548		T4	14
valid_sources[0x25]	322662	1			T1	85		T2	510		T4	18
valid_sources[0x26]	601548	1			T1	68		T2	483		T4	28
valid_sources[0x27]	255508	1			T1	91		T2	446		T4	33
valid_sources[0x28]	252293	1			T1	65		T2	519		T4	25
valid_sources[0x29]	255731	1			T1	65		T2	458		T4	32
valid_sources[0x2a]	294508	1			T1	75		T2	533		T4	24
valid_sources[0x2b]	318079	1			T1	82		T2	553		T4	25
valid_sources[0x2c]	254166	1			T1	56		T2	480		T4	15
valid_sources[0x2d]	262128	1			T1	68		T2	483		T4	29
valid_sources[0x2e]	255162	1			T1	78		T2	585		T4	31
valid_sources[0x2f]	254572	1			T1	79		T2	453		T4	14
valid_sources[0x30]	252756	1			T1	83		T2	474		T4	25
valid_sources[0x31]	264560	1			T1	73		T2	503		T4	22
valid_sources[0x32]	257227	1			T1	68		T2	461		T4	26
valid_sources[0x33]	254054	1			T1	60		T2	521		T4	23
valid_sources[0x34]	258777	1			T1	57		T2	553		T4	21
valid_sources[0x35]	255078	1			T1	63		T2	593		T4	21
valid_sources[0x36]	254826	1			T1	74		T2	513		T4	19
valid_sources[0x37]	253727	1			T1	69		T2	499		T4	33
valid_sources[0x38]	254235	1			T1	60		T2	555		T4	16
valid_sources[0x39]	353716	1			T1	64		T2	545		T4	15
valid_sources[0x3a]	1062257	1			T1	71		T2	457		T4	19
valid_sources[0x3b]	784840	1			T1	66		T2	505		T4	15
valid_sources[0x3c]	328160	1			T1	67		T2	529		T4	29
valid_sources[0x3d]	251817	1			T1	69		T2	462		T4	18
valid_sources[0x3e]	262462	1			T1	75		T2	430		T4	14
valid_sources[0x3f]	253286	1			T1	74		T2	447		T4	23
valid_sources[0x40]	251977	1			T1	73		T2	474		T4	36
valid_sources[0x41]	250709	1			T1	69		T2	510		T4	24
valid_sources[0x42]	255686	1			T1	80		T2	554		T4	18
valid_sources[0x43]	366157	1			T1	70		T2	538		T4	11
valid_sources[0x44]	309161	1			T1	57		T2	476		T4	24
valid_sources[0x45]	255339	1			T1	70		T2	456		T4	11
valid_sources[0x46]	255675	1			T1	77		T2	663		T4	25
valid_sources[0x47]	257667	1			T1	75		T2	516		T4	25
valid_sources[0x48]	296609	1			T1	72		T2	524		T4	17
valid_sources[0x49]	254205	1			T1	66		T2	492		T4	18
valid_sources[0x4a]	330778	1			T1	70		T2	487		T4	14
valid_sources[0x4b]	411698	1			T1	80		T2	516		T4	21
valid_sources[0x4c]	256244	1			T1	60		T2	476		T4	19
valid_sources[0x4d]	252312	1			T1	73		T2	538		T4	20
valid_sources[0x4e]	253602	1			T1	67		T2	528		T4	19
valid_sources[0x4f]	256763	1			T1	80		T2	514		T4	36
valid_sources[0x50]	256779	1			T1	69		T2	484		T4	22
valid_sources[0x51]	259357	1			T1	69		T2	591		T4	24
valid_sources[0x52]	254123	1			T1	80		T2	557		T4	13
valid_sources[0x53]	252425	1			T1	74		T2	502		T4	15
valid_sources[0x54]	254144	1			T1	66		T2	486		T4	25
valid_sources[0x55]	252448	1			T1	89		T2	539		T4	19
valid_sources[0x56]	255026	1			T1	82		T2	561		T4	31
valid_sources[0x57]	255235	1			T1	60		T2	583		T4	32
valid_sources[0x58]	250170	1			T1	70		T2	601		T4	16
valid_sources[0x59]	250635	1			T1	64		T2	476		T4	23
valid_sources[0x5a]	358621	1			T1	59		T2	549		T4	23
valid_sources[0x5b]	259781	1			T1	55		T2	492		T4	20
valid_sources[0x5c]	252415	1			T1	64		T2	523		T4	22
valid_sources[0x5d]	259290	1			T1	71		T2	466		T4	19
valid_sources[0x5e]	254386	1			T1	90		T2	475		T4	14
valid_sources[0x5f]	437364	1			T1	83		T2	556		T4	24
valid_sources[0x60]	257615	1			T1	92		T2	548		T4	23
valid_sources[0x61]	281895	1			T1	73		T2	529		T4	22
valid_sources[0x62]	422434	1			T1	65		T2	610		T4	21
valid_sources[0x63]	255002	1			T1	71		T2	471		T4	25
valid_sources[0x64]	636948	1			T1	60		T2	520		T4	16
valid_sources[0x65]	283847	1			T1	61		T2	535		T4	19
valid_sources[0x66]	262979	1			T1	60		T2	494		T4	27
valid_sources[0x67]	254775	1			T1	67		T2	625		T4	12
valid_sources[0x68]	448998	1			T1	65		T2	532		T4	20
valid_sources[0x69]	383032	1			T1	65		T2	504		T4	16
valid_sources[0x6a]	330291	1			T1	89		T2	573		T4	13
valid_sources[0x6b]	255310	1			T1	66		T2	588		T4	16
valid_sources[0x6c]	252934	1			T1	63		T2	594		T4	25
valid_sources[0x6d]	252183	1			T1	81		T2	495		T4	16
valid_sources[0x6e]	251654	1			T1	70		T2	511		T4	28
valid_sources[0x6f]	314626	1			T1	65		T2	432		T4	18
valid_sources[0x70]	264824	1			T1	52		T2	593		T4	19
valid_sources[0x71]	298136	1			T1	58		T2	532		T4	18
valid_sources[0x72]	255515	1			T1	76		T2	505		T4	29
valid_sources[0x73]	253362	1			T1	64		T2	481		T4	17
valid_sources[0x74]	282667	1			T1	75		T2	502		T4	22
valid_sources[0x75]	258160	1			T1	60		T2	524		T4	24
valid_sources[0x76]	254774	1			T1	62		T2	521		T4	23
valid_sources[0x77]	251607	1			T1	76		T2	515		T4	17
valid_sources[0x78]	254824	1			T1	64		T2	465		T4	29
valid_sources[0x79]	259104	1			T1	77		T2	456		T4	16
valid_sources[0x7a]	253753	1			T1	75		T2	560		T4	26
valid_sources[0x7b]	256596	1			T1	58		T2	593		T4	25
valid_sources[0x7c]	480858	1			T1	77		T2	518		T4	15
valid_sources[0x7d]	254706	1			T1	69		T2	532		T4	18
valid_sources[0x7e]	252210	1			T1	79		T2	428		T4	24
valid_sources[0x7f]	252334	1			T1	50		T2	622		T4	25
valid_sources[0x80]	251729	1			T1	65		T2	586		T4	19

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

19160108

1

T1

2337

T2

33500

T3

109644

values[0x0]

all_enables

biggest_size

10880248

1

T1

4474

T2

14048

T3

67793

values[0x1]

all_enables

biggest_size

9295273

1

T1

4351

T2

11324

T3

59630