Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_hmac_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	45887618	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

43593352

1

T1

2

T2

931985

T3

16839

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	42514608	1			T1	1		T2	893668		T3	18186
values[0x0]	21979732	1			T1	3		T2	460014		T3	8451
values[0x1]	24986630	1			T1	4		T2	542402		T3	9573

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	35280521	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

54200449

1

T1

2

T2

116617

T3

21222

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	260019	1			T2	8521		T3	168		T7	47
valid_sources[0x01]	603735	1			T2	6178		T3	123		T7	34
valid_sources[0x02]	261640	1			T2	10651		T3	141		T7	25
valid_sources[0x03]	252280	1			T2	7452		T3	165		T7	31
valid_sources[0x04]	353583	1			T2	6357		T3	209		T7	32
valid_sources[0x05]	1089229	1			T2	8114		T3	154		T7	37
valid_sources[0x06]	256412	1			T2	1861		T3	159		T7	42
valid_sources[0x07]	1448746	1			T2	2805		T3	126		T7	40
valid_sources[0x08]	251729	1			T2	5950		T3	160		T7	32
valid_sources[0x09]	249877	1			T2	6034		T3	170		T7	45
valid_sources[0x0a]	275945	1			T2	17888		T3	118		T7	44
valid_sources[0x0b]	277143	1			T2	7100		T3	99		T7	32
valid_sources[0x0c]	268323	1			T2	4469		T3	129		T7	37
valid_sources[0x0d]	281045	1			T2	4616		T3	187		T7	26
valid_sources[0x0e]	445773	1			T2	11317		T3	68		T7	36
valid_sources[0x0f]	254501	1			T2	10594		T3	69		T7	33
valid_sources[0x10]	248694	1			T2	3516		T3	206		T7	38
valid_sources[0x11]	252861	1			T2	6133		T3	165		T7	34
valid_sources[0x12]	257648	1			T2	6127		T3	139		T7	27
valid_sources[0x13]	252642	1			T2	1860		T3	121		T7	24
valid_sources[0x14]	257701	1			T2	9474		T3	89		T7	30
valid_sources[0x15]	265336	1			T2	8560		T3	103		T7	26
valid_sources[0x16]	271276	1			T2	9582		T3	156		T7	33
valid_sources[0x17]	253267	1			T2	8869		T3	85		T7	52
valid_sources[0x18]	909606	1			T2	8311		T3	121		T7	28
valid_sources[0x19]	250388	1			T2	4752		T3	133		T7	42
valid_sources[0x1a]	264400	1			T2	11708		T3	193		T7	50
valid_sources[0x1b]	262198	1			T2	9098		T3	107		T7	47
valid_sources[0x1c]	503209	1			T2	5625		T3	141		T7	28
valid_sources[0x1d]	251148	1			T1	3		T2	7304		T3	159
valid_sources[0x1e]	259432	1			T2	4890		T3	96		T7	28
valid_sources[0x1f]	450261	1			T2	5583		T3	100		T7	48
valid_sources[0x20]	264553	1			T2	10817		T3	221		T7	37
valid_sources[0x21]	772079	1			T2	8577		T3	136		T7	44
valid_sources[0x22]	260441	1			T2	4849		T3	182		T7	46
valid_sources[0x23]	256580	1			T2	3172		T3	192		T7	30
valid_sources[0x24]	290168	1			T2	1557		T3	116		T7	44
valid_sources[0x25]	445624	1			T2	12288		T3	145		T7	42
valid_sources[0x26]	396308	1			T2	2105		T3	91		T7	33
valid_sources[0x27]	293815	1			T2	9089		T3	176		T7	34
valid_sources[0x28]	254041	1			T2	5722		T3	153		T7	30
valid_sources[0x29]	258592	1			T2	5414		T3	202		T7	44
valid_sources[0x2a]	254893	1			T2	5797		T3	145		T7	45
valid_sources[0x2b]	288811	1			T2	10275		T3	131		T7	41
valid_sources[0x2c]	255484	1			T2	8626		T3	45		T7	42
valid_sources[0x2d]	257721	1			T2	5209		T3	122		T7	36
valid_sources[0x2e]	738097	1			T2	1346		T3	167		T7	33
valid_sources[0x2f]	249069	1			T2	3701		T3	114		T7	38
valid_sources[0x30]	265248	1			T2	1507		T3	168		T7	30
valid_sources[0x31]	318330	1			T2	8708		T3	189		T7	35
valid_sources[0x32]	259476	1			T2	4339		T3	118		T7	27
valid_sources[0x33]	256976	1			T2	7311		T3	244		T7	22
valid_sources[0x34]	258968	1			T2	3505		T3	97		T7	38
valid_sources[0x35]	258205	1			T2	1645		T3	81		T7	46
valid_sources[0x36]	260950	1			T2	8942		T3	116		T7	39
valid_sources[0x37]	1750832	1			T2	9108		T3	119		T7	43
valid_sources[0x38]	266339	1			T2	13840		T3	109		T7	31
valid_sources[0x39]	251516	1			T2	4520		T3	158		T7	30
valid_sources[0x3a]	257886	1			T2	11746		T3	185		T7	44
valid_sources[0x3b]	288792	1			T2	9399		T3	92		T7	27
valid_sources[0x3c]	314096	1			T2	11036		T3	196		T7	24
valid_sources[0x3d]	251621	1			T2	2365		T3	259		T7	53
valid_sources[0x3e]	261257	1			T2	6292		T3	188		T7	50
valid_sources[0x3f]	262583	1			T2	9802		T3	118		T7	41
valid_sources[0x40]	290551	1			T2	4912		T3	159		T7	39
valid_sources[0x41]	256392	1			T2	11296		T3	151		T7	37
valid_sources[0x42]	579588	1			T2	8156		T3	139		T7	41
valid_sources[0x43]	263463	1			T2	11026		T3	125		T7	35
valid_sources[0x44]	251459	1			T2	8505		T3	205		T7	35
valid_sources[0x45]	260951	1			T2	3564		T3	118		T7	44
valid_sources[0x46]	277828	1			T2	4902		T3	77		T7	35
valid_sources[0x47]	266574	1			T2	4005		T3	98		T7	36
valid_sources[0x48]	271401	1			T2	14969		T3	209		T7	34
valid_sources[0x49]	257339	1			T2	8487		T3	114		T7	37
valid_sources[0x4a]	344277	1			T2	5823		T3	97		T7	45
valid_sources[0x4b]	883388	1			T2	23263		T3	140		T7	55
valid_sources[0x4c]	256289	1			T2	6005		T3	106		T7	37
valid_sources[0x4d]	309399	1			T2	6715		T3	155		T7	43
valid_sources[0x4e]	253152	1			T2	2061		T3	150		T7	34
valid_sources[0x4f]	260090	1			T2	12952		T3	123		T7	31
valid_sources[0x50]	254018	1			T2	3218		T3	153		T7	49
valid_sources[0x51]	263451	1			T2	6082		T3	174		T7	40
valid_sources[0x52]	263446	1			T2	9046		T3	125		T7	53
valid_sources[0x53]	1722228	1			T2	6278		T3	129		T7	51
valid_sources[0x54]	265932	1			T2	6471		T3	129		T7	37
valid_sources[0x55]	416674	1			T2	1327		T3	147		T7	31
valid_sources[0x56]	275181	1			T2	17307		T3	127		T7	33
valid_sources[0x57]	259154	1			T2	4925		T3	176		T7	43
valid_sources[0x58]	252588	1			T2	3023		T3	135		T7	45
valid_sources[0x59]	265592	1			T2	8976		T3	154		T7	39
valid_sources[0x5a]	269586	1			T2	16078		T3	137		T7	39
valid_sources[0x5b]	245407	1			T2	2329		T3	160		T7	51
valid_sources[0x5c]	263341	1			T2	5717		T3	108		T7	16
valid_sources[0x5d]	850708	1			T2	1317		T3	129		T7	39
valid_sources[0x5e]	597133	1			T2	12583		T3	126		T7	43
valid_sources[0x5f]	261139	1			T2	6885		T3	116		T7	32
valid_sources[0x60]	259836	1			T2	14210		T3	156		T7	36
valid_sources[0x61]	251361	1			T2	2605		T3	61		T7	43
valid_sources[0x62]	338470	1			T2	1685		T3	130		T7	23
valid_sources[0x63]	256745	1			T2	5132		T3	138		T7	26
valid_sources[0x64]	317460	1			T2	7136		T3	129		T7	37
valid_sources[0x65]	267722	1			T2	12726		T3	138		T7	40
valid_sources[0x66]	309986	1			T2	5836		T3	131		T7	45
valid_sources[0x67]	263690	1			T2	8696		T3	143		T7	47
valid_sources[0x68]	299868	1			T2	11110		T3	162		T7	35
valid_sources[0x69]	263460	1			T2	3594		T3	207		T7	35
valid_sources[0x6a]	259158	1			T2	8390		T3	98		T7	45
valid_sources[0x6b]	256063	1			T2	5035		T3	93		T7	31
valid_sources[0x6c]	253134	1			T2	6637		T3	124		T7	40
valid_sources[0x6d]	266582	1			T2	13612		T3	128		T7	38
valid_sources[0x6e]	244568	1			T2	1926		T3	123		T7	46
valid_sources[0x6f]	254904	1			T2	11914		T3	175		T7	26
valid_sources[0x70]	261401	1			T2	4190		T3	179		T7	38
valid_sources[0x71]	334344	1			T2	1515		T3	223		T7	39
valid_sources[0x72]	278897	1			T2	18198		T3	180		T7	34
valid_sources[0x73]	299599	1			T2	6555		T3	135		T7	34
valid_sources[0x74]	261161	1			T2	7777		T3	156		T7	61
valid_sources[0x75]	272668	1			T2	12716		T3	111		T7	36
valid_sources[0x76]	254216	1			T2	9391		T3	217		T7	46
valid_sources[0x77]	249481	1			T2	1784		T3	112		T7	43
valid_sources[0x78]	425991	1			T2	4686		T3	137		T7	29
valid_sources[0x79]	704416	1			T2	12832		T3	164		T7	47
valid_sources[0x7a]	274009	1			T2	3705		T3	169		T7	35
valid_sources[0x7b]	262844	1			T2	7772		T3	159		T7	40
valid_sources[0x7c]	265602	1			T2	17668		T3	112		T7	28
valid_sources[0x7d]	265446	1			T2	3722		T3	258		T7	34
valid_sources[0x7e]	253837	1			T2	3207		T3	123		T7	37
valid_sources[0x7f]	261540	1			T2	10376		T3	86		T7	38
valid_sources[0x80]	256981	1			T2	10878		T3	156		T7	37

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

21036094

1

T1

1

T2

449239

T3

9102

values[0x0]

all_enables

biggest_size

12144814

1

T2

258401

T3

4249

T6

3762

values[0x1]

all_enables

biggest_size

10412444

1

T1

1

T2

224345

T3

3488